FI4318618T3 - Suprajohtava laite, suprajohtavan laitteen valmistusmenetelmä ja laminoitu runko - Google Patents
Suprajohtava laite, suprajohtavan laitteen valmistusmenetelmä ja laminoitu runkoInfo
- Publication number
- FI4318618T3 FI4318618T3 FIEP21932866.3T FI21932866T FI4318618T3 FI 4318618 T3 FI4318618 T3 FI 4318618T3 FI 21932866 T FI21932866 T FI 21932866T FI 4318618 T3 FI4318618 T3 FI 4318618T3
- Authority
- FI
- Finland
- Prior art keywords
- electrode
- metal
- forming
- substrate
- hole
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/82—Current path
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
- H10N60/12—Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Data Mining & Analysis (AREA)
- Computing Systems (AREA)
- Artificial Intelligence (AREA)
- Computational Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Evolutionary Computation (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Containers, Films, And Cooling For Superconductive Devices (AREA)
- Superconductors And Manufacturing Methods Therefor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2021/011752 WO2022201253A1 (ja) | 2021-03-22 | 2021-03-22 | 超電導デバイス、超電導デバイスの製造方法及び積層体 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| FI4318618T3 true FI4318618T3 (fi) | 2025-10-17 |
Family
ID=83395369
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FIEP21932866.3T FI4318618T3 (fi) | 2021-03-22 | 2021-03-22 | Suprajohtava laite, suprajohtavan laitteen valmistusmenetelmä ja laminoitu runko |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20240237557A1 (enExample) |
| EP (1) | EP4318618B1 (enExample) |
| JP (1) | JP7563578B2 (enExample) |
| CN (1) | CN116897616A (enExample) |
| FI (1) | FI4318618T3 (enExample) |
| WO (1) | WO2022201253A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20240155767A1 (en) * | 2022-11-09 | 2024-05-09 | Micron Technology, Inc. | Filling cracks on a substrate via |
| EP4626213A1 (en) * | 2022-11-22 | 2025-10-01 | Fujitsu Limited | Device and manufacturing method for device |
| WO2025046715A1 (ja) * | 2023-08-28 | 2025-03-06 | 富士通株式会社 | 量子ビットデバイス及び量子ビットデバイスの製造方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6029165B2 (ja) * | 1977-02-08 | 1985-07-09 | 三菱電機株式会社 | 超電導化合物線およびその製造方法 |
| JPH0269994A (ja) * | 1988-09-05 | 1990-03-08 | Mitsubishi Mining & Cement Co Ltd | セラミック超伝導体多層配線基板およびその製造方法 |
| JP3118562B2 (ja) * | 1997-12-08 | 2000-12-18 | 工業技術院長 | 超電導集積回路構造及びその製造方法 |
| US9836699B1 (en) * | 2015-04-27 | 2017-12-05 | Rigetti & Co. | Microwave integrated quantum circuits with interposer |
| US10242968B2 (en) * | 2015-11-05 | 2019-03-26 | Massachusetts Institute Of Technology | Interconnect structure and semiconductor structures for assembly of cryogenic electronic packages |
| KR102109070B1 (ko) * | 2015-12-15 | 2020-05-11 | 구글 엘엘씨 | 초전도 범프 본드 |
| US10291231B2 (en) * | 2016-07-20 | 2019-05-14 | Microsoft Technology Licensing, Llc | Superconducting device with dummy elements |
| US10325870B2 (en) | 2017-05-09 | 2019-06-18 | International Business Machines Corporation | Through-substrate-vias with self-aligned solder bumps |
-
2021
- 2021-03-22 JP JP2023508173A patent/JP7563578B2/ja active Active
- 2021-03-22 FI FIEP21932866.3T patent/FI4318618T3/fi active
- 2021-03-22 CN CN202180091628.5A patent/CN116897616A/zh active Pending
- 2021-03-22 EP EP21932866.3A patent/EP4318618B1/en active Active
- 2021-03-22 WO PCT/JP2021/011752 patent/WO2022201253A1/ja not_active Ceased
-
2023
- 2023-07-13 US US18/351,575 patent/US20240237557A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| WO2022201253A1 (ja) | 2022-09-29 |
| CN116897616A (zh) | 2023-10-17 |
| JP7563578B2 (ja) | 2024-10-08 |
| JPWO2022201253A1 (enExample) | 2022-09-29 |
| EP4318618B1 (en) | 2025-09-10 |
| US20240237557A1 (en) | 2024-07-11 |
| EP4318618A4 (en) | 2024-06-05 |
| EP4318618A1 (en) | 2024-02-07 |
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