ES8308459A1 - Un metodo de poner en fase un oscilador con una senal de entrada. - Google Patents
Un metodo de poner en fase un oscilador con una senal de entrada.Info
- Publication number
- ES8308459A1 ES8308459A1 ES517762A ES517762A ES8308459A1 ES 8308459 A1 ES8308459 A1 ES 8308459A1 ES 517762 A ES517762 A ES 517762A ES 517762 A ES517762 A ES 517762A ES 8308459 A1 ES8308459 A1 ES 8308459A1
- Authority
- ES
- Spain
- Prior art keywords
- oscillator
- incoming signal
- phase
- bringing
- carrying
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Communication Control (AREA)
Abstract
METODO PARA PONER UN OSCILADOR EN FASE CON UNA SEÑAL ENTRANTE. CONSISTE EN DETERMINAR SI LA DIFERENCIA DE FASE ENTRE LA SEÑAL DE SALIDA DEL OSCILADOR Y LA SEÑAL ENTRANTE ES POSITIVA O NEGATIVA Y, EN RESPUESTA A ELLO, SE HACE QUE EL OSCILADOR EMITA UNA U OTRA DE DOS FRECUENCIAS DE SEÑAL DE SALIDA, DE LAS CUALES UNA ES PREFIJADAMENTE SUPERIOR, MIENTRAS LA OTRA ES PREFIJADAMENTE INFERIOR, A LA FRECUENCIA DE SEÑAL ENTRANTE. EL OSCILADOR SE PONE DE ESTE MODO EN FASE CON LA SEÑAL ENTRANTE CUANDO LAS DOS FRECUENCIAS DE SEÑAL DE SALIDA SE EMITEN ALTERNATIVAMENTE.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8107121A SE439083B (sv) | 1981-11-30 | 1981-11-30 | Sett att bringa en oscillator i fas med en inkommande signal jemte anordning for genomforandet av settet |
Publications (2)
Publication Number | Publication Date |
---|---|
ES8308459A1 true ES8308459A1 (es) | 1983-08-16 |
ES517762A0 ES517762A0 (es) | 1983-08-16 |
Family
ID=20345158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES517762A Granted ES517762A0 (es) | 1981-11-30 | 1982-11-29 | Un metodo de poner en fase un oscilador con una senal de entrada. |
Country Status (18)
Country | Link |
---|---|
US (1) | US4573024A (es) |
EP (1) | EP0094956B1 (es) |
JP (1) | JPS58502030A (es) |
KR (1) | KR880000676B1 (es) |
AU (1) | AU555339B2 (es) |
BR (1) | BR8207995A (es) |
CA (1) | CA1196394A (es) |
DE (1) | DE3264690D1 (es) |
DK (1) | DK152635C (es) |
ES (1) | ES517762A0 (es) |
FI (1) | FI832294A0 (es) |
IE (1) | IE54055B1 (es) |
IT (1) | IT1154352B (es) |
MX (1) | MX157578A (es) |
MY (1) | MY8600367A (es) |
SE (1) | SE439083B (es) |
WO (1) | WO1983002045A1 (es) |
YU (1) | YU264282A (es) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL8401310A (nl) * | 1984-04-24 | 1985-11-18 | Philips Nv | Inrichting voor het opwekken van een kloksignaal. |
DE3431419C1 (de) * | 1984-08-27 | 1986-02-13 | Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt | Schaltungsanordnung zum Synchronisieren des empfangsseitig erzeugten Taktsignals mit bei digitaler Informationsuebertragung empfangenen Taktsignale in Fernmeldeanlagen |
US4825448A (en) * | 1986-08-07 | 1989-04-25 | International Mobile Machines Corporation | Subscriber unit for wireless digital telephone system |
US4727752A (en) * | 1987-02-04 | 1988-03-01 | Sundstrand Data Control, Inc. | Pseudosinusoidal oscillator drive system |
US5031230A (en) * | 1988-10-24 | 1991-07-09 | Simulcomm Partnership | Frequency, phase and modulation control system which is especially useful in simulcast transmission systems |
JP2864143B2 (ja) * | 1990-03-20 | 1999-03-03 | 富士通株式会社 | 信号検出回路 |
US6674331B2 (en) | 2001-11-09 | 2004-01-06 | Agere Systems, Inc. | Method and apparatus for simplified tuning of a two-point modulated PLL |
US7502468B2 (en) * | 2003-09-02 | 2009-03-10 | Ncipher Corporation Ltd. | Method and system for generating a cryptographically random number stream |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3344361A (en) * | 1964-10-28 | 1967-09-26 | Aga Ab | Phase controlled oscillator loop including an electronic counter |
FR2230116B1 (es) * | 1973-05-14 | 1976-11-12 | Thomson Csf | |
JPS5178678A (es) * | 1974-12-29 | 1976-07-08 | Fujitsu Ltd | |
US4179671A (en) * | 1977-01-10 | 1979-12-18 | Citizen Watch Company Limited | Capacitor switching circuits for adjusting crystal oscillator frequency |
JPS53131745A (en) * | 1977-04-22 | 1978-11-16 | Seiko Instr & Electronics Ltd | Oscillator circuit |
JPS5597644A (en) * | 1979-01-19 | 1980-07-25 | Toshiba Corp | Order reexecution system |
JPS56748A (en) * | 1979-06-15 | 1981-01-07 | Fujitsu Ltd | Phase control circuit |
US4308619A (en) * | 1979-12-26 | 1981-12-29 | General Electric Company | Apparatus and methods for synchronizing a digital receiver |
US4330759A (en) * | 1980-03-05 | 1982-05-18 | Bell Telephone Laboratories, Incorporated | Apparatus for generating synchronized timing pulses from binary data signals |
US4333060A (en) * | 1980-07-10 | 1982-06-01 | E-Systems, Inc. | Phase locked loop for recovering data bit timing |
EP0054322B1 (en) * | 1980-12-12 | 1985-07-03 | Philips Electronics Uk Limited | Phase sensitive detector |
US4513255A (en) * | 1983-01-25 | 1985-04-23 | Hughes Aircraft Company | Phase locked crystal oscillator implemented with digital logic elements |
-
1981
- 1981-11-30 SE SE8107121A patent/SE439083B/sv not_active IP Right Cessation
-
1982
- 1982-11-17 MX MX195214A patent/MX157578A/es unknown
- 1982-11-20 KR KR8205242A patent/KR880000676B1/ko active
- 1982-11-22 CA CA000416045A patent/CA1196394A/en not_active Expired
- 1982-11-23 IE IE2791/82A patent/IE54055B1/en unknown
- 1982-11-25 AU AU10127/83A patent/AU555339B2/en not_active Ceased
- 1982-11-25 EP EP82903497A patent/EP0094956B1/en not_active Expired
- 1982-11-25 DE DE8282903497T patent/DE3264690D1/de not_active Expired
- 1982-11-25 JP JP82503566A patent/JPS58502030A/ja active Pending
- 1982-11-25 WO PCT/SE1982/000399 patent/WO1983002045A1/en active IP Right Grant
- 1982-11-25 BR BR8207995A patent/BR8207995A/pt not_active IP Right Cessation
- 1982-11-25 US US06/522,162 patent/US4573024A/en not_active Expired - Lifetime
- 1982-11-25 YU YU02642/82A patent/YU264282A/xx unknown
- 1982-11-29 ES ES517762A patent/ES517762A0/es active Granted
- 1982-11-30 IT IT24502/82A patent/IT1154352B/it active
-
1983
- 1983-06-22 FI FI832294A patent/FI832294A0/fi not_active Application Discontinuation
- 1983-07-29 DK DK349783A patent/DK152635C/da not_active IP Right Cessation
-
1986
- 1986-12-30 MY MY367/86A patent/MY8600367A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
IE822791L (en) | 1983-05-30 |
ES517762A0 (es) | 1983-08-16 |
DK152635B (da) | 1988-03-28 |
JPS58502030A (ja) | 1983-11-24 |
AU1012783A (en) | 1983-06-17 |
DE3264690D1 (en) | 1985-08-14 |
IT8224502A1 (it) | 1984-05-30 |
IT1154352B (it) | 1987-01-21 |
MY8600367A (en) | 1986-12-31 |
BR8207995A (pt) | 1983-10-18 |
EP0094956A1 (en) | 1983-11-30 |
FI832294L (fi) | 1983-06-22 |
DK349783D0 (da) | 1983-07-29 |
AU555339B2 (en) | 1986-09-18 |
KR840002602A (ko) | 1984-07-02 |
SE8107121L (sv) | 1983-05-31 |
WO1983002045A1 (en) | 1983-06-09 |
KR880000676B1 (ko) | 1988-04-20 |
YU264282A (en) | 1985-06-30 |
IE54055B1 (en) | 1989-05-24 |
US4573024A (en) | 1986-02-25 |
FI832294A0 (fi) | 1983-06-22 |
EP0094956B1 (en) | 1985-07-10 |
CA1196394A (en) | 1985-11-05 |
DK349783A (da) | 1983-07-29 |
SE439083B (sv) | 1985-05-28 |
IT8224502A0 (it) | 1982-11-30 |
MX157578A (es) | 1988-12-02 |
DK152635C (da) | 1988-08-15 |
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