JPS5597644A - Order reexecution system - Google Patents

Order reexecution system

Info

Publication number
JPS5597644A
JPS5597644A JP388179A JP388179A JPS5597644A JP S5597644 A JPS5597644 A JP S5597644A JP 388179 A JP388179 A JP 388179A JP 388179 A JP388179 A JP 388179A JP S5597644 A JPS5597644 A JP S5597644A
Authority
JP
Japan
Prior art keywords
order
interruption
operand
flag
shows
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP388179A
Other languages
Japanese (ja)
Inventor
Yasuo Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP388179A priority Critical patent/JPS5597644A/en
Publication of JPS5597644A publication Critical patent/JPS5597644A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the processing time when the order handling the long operand is executed in the virtual memory system, by avoiding setting of the flag FF which shows that the interruption has already reset to the order when the first operand of the order is read.
CONSTITUTION: In case the interruption is given under execution of the order, FF22 shows that the order is the reexecution order. And FF14 shows the first operand reading or writing action. Here the output of AND gate 19 is supplied to the set input of FF22. Thus output 20 of gate 19 becomes "0" since flag FF14 is set although signal 17 showing that the interruption has already reset to the order is "1". Thus flag FF22 cannot be set. In such way, FF22 showing that the interruption has already reset to the order is not set although the missing falut occurs when the first operand of the order is read in execution of the order handling the long operand in the virtural memory system. As a result, the order can be executed immediately and from the beginning after resetting of the interruption, thus reducing the processing time.
COPYRIGHT: (C)1980,JPO&Japio
JP388179A 1979-01-19 1979-01-19 Order reexecution system Pending JPS5597644A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP388179A JPS5597644A (en) 1979-01-19 1979-01-19 Order reexecution system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP388179A JPS5597644A (en) 1979-01-19 1979-01-19 Order reexecution system

Publications (1)

Publication Number Publication Date
JPS5597644A true JPS5597644A (en) 1980-07-25

Family

ID=11569516

Family Applications (1)

Application Number Title Priority Date Filing Date
JP388179A Pending JPS5597644A (en) 1979-01-19 1979-01-19 Order reexecution system

Country Status (1)

Country Link
JP (1) JPS5597644A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58502030A (en) * 1981-11-30 1983-11-24 テレフオンアクチ−ボラゲツト　エル　エム　エリクソン Device that aligns the phase of the oscillator with the input signal
JPH05143331A (en) * 1991-11-20 1993-06-11 Pfu Ltd Instruction interruption information control system for virtual storage control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58502030A (en) * 1981-11-30 1983-11-24 テレフオンアクチ−ボラゲツト　エル　エム　エリクソン Device that aligns the phase of the oscillator with the input signal
JPH05143331A (en) * 1991-11-20 1993-06-11 Pfu Ltd Instruction interruption information control system for virtual storage control

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