ES549560A0 - Procedimiento para fabricar un circuito integrado - Google Patents

Procedimiento para fabricar un circuito integrado

Info

Publication number
ES549560A0
ES549560A0 ES549560A ES549560A ES549560A0 ES 549560 A0 ES549560 A0 ES 549560A0 ES 549560 A ES549560 A ES 549560A ES 549560 A ES549560 A ES 549560A ES 549560 A0 ES549560 A0 ES 549560A0
Authority
ES
Spain
Prior art keywords
procedure
manufacture
integrated circuit
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES549560A
Other languages
English (en)
Other versions
ES8801968A1 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of ES549560A0 publication Critical patent/ES549560A0/es
Publication of ES8801968A1 publication Critical patent/ES8801968A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
ES549560A 1984-12-05 1985-12-04 Procedimiento para fabricar un circuito integrado Expired ES8801968A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/678,569 US4623912A (en) 1984-12-05 1984-12-05 Nitrided silicon dioxide layers for semiconductor integrated circuits

Publications (2)

Publication Number Publication Date
ES549560A0 true ES549560A0 (es) 1988-03-16
ES8801968A1 ES8801968A1 (es) 1988-03-16

Family

ID=24723349

Family Applications (1)

Application Number Title Priority Date Filing Date
ES549560A Expired ES8801968A1 (es) 1984-12-05 1985-12-04 Procedimiento para fabricar un circuito integrado

Country Status (9)

Country Link
US (1) US4623912A (es)
EP (1) EP0205613B1 (es)
JP (1) JP2568527B2 (es)
KR (1) KR960000378B1 (es)
CA (1) CA1260364A (es)
DE (1) DE3578656D1 (es)
ES (1) ES8801968A1 (es)
IE (1) IE57207B1 (es)
WO (1) WO1986003621A1 (es)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4882649A (en) * 1988-03-29 1989-11-21 Texas Instruments Incorporated Nitride/oxide/nitride capacitor dielectric
JPH0793298B2 (ja) * 1988-10-11 1995-10-09 日本電気株式会社 半導体装置の形成方法
US5874766A (en) * 1988-12-20 1999-02-23 Matsushita Electric Industrial Co., Ltd. Semiconductor device having an oxynitride film
JPH02288235A (ja) * 1989-04-27 1990-11-28 Fujitsu Ltd 半導設装置の製造方法
US5242848A (en) * 1990-01-22 1993-09-07 Silicon Storage Technology, Inc. Self-aligned method of making a split gate single transistor non-volatile electrically alterable semiconductor memory device
US5572054A (en) * 1990-01-22 1996-11-05 Silicon Storage Technology, Inc. Method of operating a single transistor non-volatile electrically alterable semiconductor memory device
JP2907344B2 (ja) * 1990-06-27 1999-06-21 株式会社東芝 半導体装置およびその製造方法
US5254489A (en) * 1990-10-18 1993-10-19 Nec Corporation Method of manufacturing semiconductor device by forming first and second oxide films by use of nitridation
KR940011483B1 (ko) * 1990-11-28 1994-12-19 가부시끼가이샤 도시바 반도체 디바이스를 제조하기 위한 방법 및 이 방법에 의해 제조되는 반도체 디바이스
JP2652108B2 (ja) * 1991-09-05 1997-09-10 三菱電機株式会社 電界効果トランジスタおよびその製造方法
US5250456A (en) * 1991-09-13 1993-10-05 Sgs-Thomson Microelectronics, Inc. Method of forming an integrated circuit capacitor dielectric and a capacitor formed thereby
US5449941A (en) * 1991-10-29 1995-09-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
US5726087A (en) * 1992-04-30 1998-03-10 Motorola, Inc. Method of formation of semiconductor gate dielectric
US6791131B1 (en) * 1993-04-02 2004-09-14 Micron Technology, Inc. Method for forming a storage cell capacitor compatible with high dielectric constant materials
US6531730B2 (en) * 1993-08-10 2003-03-11 Micron Technology, Inc. Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same
US5392189A (en) * 1993-04-02 1995-02-21 Micron Semiconductor, Inc. Capacitor compatible with high dielectric constant materials having two independent insulative layers and the method for forming same
TW264575B (es) * 1993-10-29 1995-12-01 Handotai Energy Kenkyusho Kk
US5397720A (en) * 1994-01-07 1995-03-14 The Regents Of The University Of Texas System Method of making MOS transistor having improved oxynitride dielectric
US5629221A (en) * 1995-11-24 1997-05-13 National Science Council Of Republic Of China Process for suppressing boron penetration in BF2 + -implanted P+ -poly-Si gate using inductively-coupled nitrogen plasma
US5808335A (en) * 1996-06-13 1998-09-15 Vanguard International Semiconductor Corporation Reduced mask DRAM process
US5969397A (en) * 1996-11-26 1999-10-19 Texas Instruments Incorporated Low defect density composite dielectric
US6331468B1 (en) * 1998-05-11 2001-12-18 Lsi Logic Corporation Formation of integrated circuit structure using one or more silicon layers for implantation and out-diffusion in formation of defect-free source/drain regions and also for subsequent formation of silicon nitride spacers
US6177363B1 (en) 1998-09-29 2001-01-23 Lucent Technologies Inc. Method for forming a nitride layer suitable for use in advanced gate dielectric materials
US6380055B2 (en) 1998-10-22 2002-04-30 Advanced Micro Devices, Inc. Dopant diffusion-retarding barrier region formed within polysilicon gate layer
US6087236A (en) * 1998-11-24 2000-07-11 Intel Corporation Integrated circuit with multiple gate dielectric structures
US6303520B1 (en) 1998-12-15 2001-10-16 Mattson Technology, Inc. Silicon oxynitride film
JP3350478B2 (ja) * 1999-04-21 2002-11-25 宮城沖電気株式会社 半導体素子の製造方法
US6323143B1 (en) * 2000-03-24 2001-11-27 Taiwan Semiconductor Manufacturing Company Method for making silicon nitride-oxide ultra-thin gate insulating layers for submicrometer field effect transistors
US6559007B1 (en) * 2000-04-06 2003-05-06 Micron Technology, Inc. Method for forming flash memory device having a tunnel dielectric comprising nitrided oxide
DE50006609D1 (de) 2000-08-28 2004-07-01 Medela Ag Baar Brusthaubeneinsatz
US6544908B1 (en) * 2000-08-30 2003-04-08 Micron Technology, Inc. Ammonia gas passivation on nitride encapsulated devices
JP2004538650A (ja) * 2001-08-10 2004-12-24 スピネカ セミコンダクター， インコーポレイテッド 基板とのショットキーコンタクトを形成する高誘電率ゲート絶縁層、ソースおよびドレインを有するトランジスタ
US6878415B2 (en) * 2002-04-15 2005-04-12 Varian Semiconductor Equipment Associates, Inc. Methods for chemical formation of thin film layers using short-time thermal processes
US6780720B2 (en) 2002-07-01 2004-08-24 International Business Machines Corporation Method for fabricating a nitrided silicon-oxide gate dielectric
KR20110057645A (ko) * 2009-11-24 2011-06-01 삼성전자주식회사 절연막 형성 방법 및 이를 포함하는 트랜지스터 형성 방법
KR101562020B1 (ko) * 2010-02-22 2015-10-21 삼성전자주식회사 반도체 소자 및 그 제조 방법

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0006706B2 (en) * 1978-06-14 1993-03-17 Fujitsu Limited Process for producing a semiconductor device having an insulating layer of silicon dioxide covered by a film of silicon oxynitride

Also Published As

Publication number Publication date
EP0205613A1 (en) 1986-12-30
EP0205613B1 (en) 1990-07-11
IE57207B1 (en) 1992-06-03
JPS62501184A (ja) 1987-05-07
CA1260364A (en) 1989-09-26
KR880700460A (ko) 1988-03-15
WO1986003621A1 (en) 1986-06-19
US4623912A (en) 1986-11-18
JP2568527B2 (ja) 1997-01-08
IE853050L (en) 1986-06-05
ES8801968A1 (es) 1988-03-16
DE3578656D1 (de) 1990-08-16
KR960000378B1 (ko) 1996-01-05

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