ES535993A0 - Un circuito para la sincronizacion de trama y fase de un reloj de muestreo local - Google Patents

Un circuito para la sincronizacion de trama y fase de un reloj de muestreo local

Info

Publication number
ES535993A0
ES535993A0 ES535993A ES535993A ES535993A0 ES 535993 A0 ES535993 A0 ES 535993A0 ES 535993 A ES535993 A ES 535993A ES 535993 A ES535993 A ES 535993A ES 535993 A0 ES535993 A0 ES 535993A0
Authority
ES
Spain
Prior art keywords
frame
clock
phase
circuit
received
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES535993A
Other languages
English (en)
Other versions
ES8606757A1 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES8606757A1 publication Critical patent/ES8606757A1/es
Publication of ES535993A0 publication Critical patent/ES535993A0/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/08—Speed or phase control by synchronisation signals the synchronisation signals recurring cyclically

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
ES535993A 1983-09-17 1984-09-17 Un circuito para la sincronizacion de trama y fase de un reloj de muestreo local Expired ES8606757A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19833333714 DE3333714A1 (de) 1983-09-17 1983-09-17 Schaltungsanordnung zur rahmen- und phasensynchronisation eines empfangsseitigen abtasttaktes

Publications (2)

Publication Number Publication Date
ES8606757A1 ES8606757A1 (es) 1986-04-01
ES535993A0 true ES535993A0 (es) 1986-04-01

Family

ID=6209424

Family Applications (1)

Application Number Title Priority Date Filing Date
ES535993A Expired ES8606757A1 (es) 1983-09-17 1984-09-17 Un circuito para la sincronizacion de trama y fase de un reloj de muestreo local

Country Status (8)

Country Link
US (1) US4598413A (es)
EP (1) EP0141194B1 (es)
JP (1) JPS6094552A (es)
AT (1) ATE54785T1 (es)
CA (1) CA1226636A (es)
CH (1) CH665925A5 (es)
DE (2) DE3333714A1 (es)
ES (1) ES8606757A1 (es)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3429453C1 (de) * 1984-08-10 1992-05-27 Siemens Ag Verfahren zur gesicherten Funksignaluebertragung
US4937843A (en) * 1986-03-28 1990-06-26 Ampex Corporation Digital data block synchronizer
DE3719659A1 (de) * 1987-06-12 1988-12-29 Standard Elektrik Lorenz Ag Einrichtung zur schnellen rahmen- und phasensynchronisation
GB2211051B (en) * 1987-10-10 1991-07-10 Stc Plc Code correlation arrangement
JPH0795731B2 (ja) * 1987-10-30 1995-10-11 株式会社ケンウッド データ受信装置の最適クロック形成装置
FR2651941B1 (fr) * 1989-09-12 1991-10-25 Alcatel Business Systems Dispositif de synchronisation a deux modes, notamment pour la recuperation de la phase de l'horloge trame dans un systeme de transmission a l'alternat.
US5241545A (en) * 1990-11-14 1993-08-31 Motorola, Inc. Apparatus and method for recovering a time-varying signal using multiple sampling points
DE4128713A1 (de) * 1991-08-29 1993-03-04 Daimler Benz Ag Verfahren und anordnung zur messung der traegerfrequenzablage in einem mehrkanaluebertragungssystem
US5426633A (en) * 1992-06-02 1995-06-20 Nec Corporation System for processing synchronization signals with phase synchronization in a mobile communication network
NZ251238A (en) * 1992-03-31 1995-07-26 Commw Of Australia Demultiplexer synchroniser: cross correlated sync bits summed
AU668149B2 (en) * 1992-03-31 1996-04-26 Commonwealth Of Australia, The Demultiplexer synchroniser
US5408506A (en) * 1993-07-09 1995-04-18 Apple Computer, Inc. Distributed time synchronization system and method
US5450456A (en) * 1993-11-12 1995-09-12 Daimler Benz Ag Method and arrangement for measuring the carrier frequency deviation in a multi-channel transmission system
DE4417954A1 (de) * 1994-05-21 1995-11-23 Sel Alcatel Ag Synchronisationsverfahren sowie Synchronisationseinrichtungen, Endgerät und Vermittlungsstelle dafür
JP2731722B2 (ja) * 1994-05-26 1998-03-25 日本電気株式会社 クロック周波数自動制御方式及びそれに用いる送信装置と受信装置
JP2940454B2 (ja) 1995-12-28 1999-08-25 日本電気株式会社 スロット受信同期回路
DE19653056A1 (de) * 1996-12-19 1998-06-25 Motorola Inc Verfahren zur Synchronisation bei digitaler Übertragung von Daten
US8861622B2 (en) * 1999-02-24 2014-10-14 Sony Deutschland Gmbh Transmitting apparatus and method for a digital telecommunication system
ATE468674T1 (de) * 1999-02-24 2010-06-15 Sony Deutschland Gmbh Empfangsvorrichtung und synchronisationsverfahren für ein digitales nachrichtenübertragungssystem
US6430212B1 (en) * 1999-05-06 2002-08-06 Navcom Technology, Inc. Spread-spectrum GMSK/M-ary radio
US6711221B1 (en) * 2000-02-16 2004-03-23 Thomson Licensing S.A. Sampling offset correction in an orthogonal frequency division multiplexing system
GB2366971A (en) * 2000-09-13 2002-03-20 Marconi Comm Ltd Bit and frame synchronisation
JP3793724B2 (ja) * 2001-10-29 2006-07-05 沖電気工業株式会社 受信回路及び受信方法
JP2017163204A (ja) * 2016-03-07 2017-09-14 ＡＰＲＥＳＩＡ Ｓｙｓｔｅｍｓ株式会社 通信装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3144515A (en) * 1959-10-20 1964-08-11 Nippon Electric Co Synchronization system in timedivision code transmission
US3251034A (en) * 1962-05-21 1966-05-10 Texas Instruments Inc Synchronizing system for digital data recovery apparatus
US3575554A (en) * 1968-04-16 1971-04-20 Communications Satellite Corp Frame synchronizer for a biorthogonal decoder
JPS5324761B1 (es) * 1968-10-11 1978-07-22
US3735045A (en) * 1970-08-24 1973-05-22 Itt Corp Nutley Frame synchronization system for a digital communication system
US3770897A (en) * 1971-12-06 1973-11-06 Itt Frame synchronization system
US3798378A (en) * 1972-11-07 1974-03-19 Itt Frame synchronization system
FR2250447A5 (es) * 1973-11-06 1975-05-30 Ibm France
DE2607433C3 (de) * 1976-02-24 1980-01-17 Siemens Ag Digitaler Korrelationsempfänger
US4203002A (en) * 1977-10-11 1980-05-13 Rca Corporation Code correlator loop using arithmetic synthesizer
DE3201934A1 (de) * 1982-01-22 1983-08-04 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt System zur uebertragung von digitalen informatonssignalen
DE3227151C2 (de) * 1982-07-21 1986-04-17 Standard Elektrik Lorenz Ag, 7000 Stuttgart Einrichtung zur empfangsseitigen Phasensynchronisation des Abtasttaktes auf die Phasenlage der Zeichen eines empfangenen Zeitmultiplex-Zeichenstroms

Also Published As

Publication number Publication date
ATE54785T1 (de) 1990-08-15
JPH0317424B2 (es) 1991-03-08
CH665925A5 (de) 1988-06-15
US4598413A (en) 1986-07-01
EP0141194A3 (en) 1987-11-04
ES8606757A1 (es) 1986-04-01
JPS6094552A (ja) 1985-05-27
EP0141194A2 (de) 1985-05-15
CA1226636A (en) 1987-09-08
EP0141194B1 (de) 1990-07-18
DE3333714A1 (de) 1985-04-04
DE3482742D1 (de) 1990-08-23

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 20051001