ES464591A1 - Un equipo de tratamiento de interrupcion en un sistema de tratamiento de datos de programas multiples. - Google Patents

Un equipo de tratamiento de interrupcion en un sistema de tratamiento de datos de programas multiples.

Info

Publication number
ES464591A1
ES464591A1 ES464591A ES464591A ES464591A1 ES 464591 A1 ES464591 A1 ES 464591A1 ES 464591 A ES464591 A ES 464591A ES 464591 A ES464591 A ES 464591A ES 464591 A1 ES464591 A1 ES 464591A1
Authority
ES
Spain
Prior art keywords
interrupt
data processing
program
interrogation
execution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES464591A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES464591A1 publication Critical patent/ES464591A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

Un equipo de tratamiento de interrupción en un sistema de tratamiento de datos de programas múltiplesdestinado a relacionar el tratamiento recursivo de interruptores no específicas en una primera clase de interrupciones con el tratamiento programado de una interrupción original en dicha primera clase sin desplazamiento de información de estado de programa almacenadacomprendiendo dicho equipo: medios que responden a información en un programa de supervisión para tratar interrupciones en dicha primera clasepara hacer que dicho sistema determine el estado de pendiente o no pendiente de una solicitud activa de interrupcióncon relación a un conjunto de fuentes de solicitud de interrupción no específicas asociadas con dicha primera clase.
ES464591A 1977-01-13 1977-11-30 Un equipo de tratamiento de interrupcion en un sistema de tratamiento de datos de programas multiples. Expired ES464591A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US75916477A 1977-01-13 1977-01-13

Publications (1)

Publication Number Publication Date
ES464591A1 true ES464591A1 (es) 1978-09-01

Family

ID=25054630

Family Applications (1)

Application Number Title Priority Date Filing Date
ES464591A Expired ES464591A1 (es) 1977-01-13 1977-11-30 Un equipo de tratamiento de interrupcion en un sistema de tratamiento de datos de programas multiples.

Country Status (8)

Country Link
JP (1) JPS5394846A (es)
AU (1) AU520734B2 (es)
BR (1) BR7708760A (es)
CA (1) CA1092714A (es)
CH (1) CH631820A5 (es)
ES (1) ES464591A1 (es)
GB (1) GB1584419A (es)
IT (1) IT1115694B (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59211141A (ja) * 1983-05-16 1984-11-29 Omron Tateisi Electronics Co 割込処理方式
US5341482A (en) * 1987-03-20 1994-08-23 Digital Equipment Corporation Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions
US10282327B2 (en) * 2017-01-19 2019-05-07 International Business Machines Corporation Test pending external interruption instruction

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5137499A (es) * 1974-09-27 1976-03-29 Ishikawajima Harima Heavy Ind

Also Published As

Publication number Publication date
AU520734B2 (en) 1982-02-25
BR7708760A (pt) 1979-07-24
CA1092714A (en) 1980-12-30
JPS5611340B2 (es) 1981-03-13
JPS5394846A (en) 1978-08-19
CH631820A5 (en) 1982-08-31
GB1584419A (en) 1981-02-11
AU3236078A (en) 1979-07-19
IT1115694B (it) 1986-02-03

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19991213