JPS56168272A - Parallel processing system for program of information processor - Google Patents

Parallel processing system for program of information processor

Info

Publication number
JPS56168272A
JPS56168272A JP7080780A JP7080780A JPS56168272A JP S56168272 A JPS56168272 A JP S56168272A JP 7080780 A JP7080780 A JP 7080780A JP 7080780 A JP7080780 A JP 7080780A JP S56168272 A JPS56168272 A JP S56168272A
Authority
JP
Japan
Prior art keywords
programs
parallel
parallel processing
program
processing system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7080780A
Other languages
Japanese (ja)
Other versions
JPS6119064B2 (en
Inventor
Keiji Sato
Naoki Yamaguchi
Manabu Oda
Yasunori Tarui
Yoshinori Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7080780A priority Critical patent/JPS56168272A/en
Publication of JPS56168272A publication Critical patent/JPS56168272A/en
Publication of JPS6119064B2 publication Critical patent/JPS6119064B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To process programs in parallel and reduce execution time by providing an auxiliary central processor. CONSTITUTION:Mainly, a control part CT makes analysis with respect to programs prior to starting of information processing, finds those that can be divided and independently used, and beforehand divide them in parallel processing units. It sets the loading addresses, etc. of the programs and loads them in a main memory device MM. The MCC of the main CPU causes the programs having been loaded into the main memory to be processed in parallel in each of the SCC1-SCCn of an auxiliary CPU when it comes to the parallel processable parts after the start of operation.
JP7080780A 1980-05-29 1980-05-29 Parallel processing system for program of information processor Granted JPS56168272A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7080780A JPS56168272A (en) 1980-05-29 1980-05-29 Parallel processing system for program of information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7080780A JPS56168272A (en) 1980-05-29 1980-05-29 Parallel processing system for program of information processor

Publications (2)

Publication Number Publication Date
JPS56168272A true JPS56168272A (en) 1981-12-24
JPS6119064B2 JPS6119064B2 (en) 1986-05-15

Family

ID=13442194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7080780A Granted JPS56168272A (en) 1980-05-29 1980-05-29 Parallel processing system for program of information processor

Country Status (1)

Country Link
JP (1) JPS56168272A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5998255A (en) * 1982-07-14 1984-06-06 ヒュンダイ・エレクトロニクス・インダストリーズ・カンパニー・リミテッド Digital computer for executing several sets of instructions in simultaneously interleaved form
JPS61245239A (en) * 1985-04-23 1986-10-31 Toshiba Corp Logical circuit system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5998255A (en) * 1982-07-14 1984-06-06 ヒュンダイ・エレクトロニクス・インダストリーズ・カンパニー・リミテッド Digital computer for executing several sets of instructions in simultaneously interleaved form
JPH0441378B2 (en) * 1982-07-14 1992-07-08 Unisys Corp
JPS61245239A (en) * 1985-04-23 1986-10-31 Toshiba Corp Logical circuit system

Also Published As

Publication number Publication date
JPS6119064B2 (en) 1986-05-15

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