ES456534A1 - Un circuito para proteger los datos transmitidos. - Google Patents

Un circuito para proteger los datos transmitidos.

Info

Publication number
ES456534A1
ES456534A1 ES456534A ES456534A ES456534A1 ES 456534 A1 ES456534 A1 ES 456534A1 ES 456534 A ES456534 A ES 456534A ES 456534 A ES456534 A ES 456534A ES 456534 A1 ES456534 A1 ES 456534A1
Authority
ES
Spain
Prior art keywords
checking circuit
gate
register
interrogate
duplicating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES456534A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES456534A1 publication Critical patent/ES456534A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007—Fail-safe circuits
    • H03K19/0075—Fail-safe circuits by using two redundant chains

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Hardware Redundancy (AREA)

Abstract

Un circuito para proteger los datos transmitidos, en donde los datos codificados se comprueban cíclicamente para detectar errores mediante una comprobación redundante que se realiza dividiendo las palabras en código en un registro de conversión y realimentación cuyo estado es interrogado por una puerta, caracterizado porque incluye una segunda puerta (G2) en paralelo con la puerta de interrogación (G1), y porque los potenciales que aparecen en las salidas de la puerta se aplican a un circuito de comparación (VS).
ES456534A 1976-03-05 1977-03-04 Un circuito para proteger los datos transmitidos. Expired ES456534A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762609107 DE2609107A1 (de) 1976-03-05 1976-03-05 Schaltung zur sicherung uebermittelter daten

Publications (1)

Publication Number Publication Date
ES456534A1 true ES456534A1 (es) 1978-02-16

Family

ID=5971596

Family Applications (1)

Application Number Title Priority Date Filing Date
ES456534A Expired ES456534A1 (es) 1976-03-05 1977-03-04 Un circuito para proteger los datos transmitidos.

Country Status (2)

Country Link
DE (1) DE2609107A1 (es)
ES (1) ES456534A1 (es)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3442418A1 (de) * 1984-11-20 1986-05-22 Siemens AG, 1000 Berlin und 8000 München Verfahren zum betrieb eines signaltechnisch sicheren mehrrechnersystems mit mehreren signaltechnisch nicht sicheren ein/ausgabebaugruppen
US4959836A (en) * 1987-12-09 1990-09-25 Siemens Transmission Systems, Inc. Register robustness improvement circuit and method

Also Published As

Publication number Publication date
DE2609107A1 (de) 1977-09-08

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