ES414009A1 - Perfeccionamientos en sistemas de tratamiento de datos. - Google Patents

Perfeccionamientos en sistemas de tratamiento de datos.

Info

Publication number
ES414009A1
ES414009A1 ES414009A ES414009A ES414009A1 ES 414009 A1 ES414009 A1 ES 414009A1 ES 414009 A ES414009 A ES 414009A ES 414009 A ES414009 A ES 414009A ES 414009 A1 ES414009 A1 ES 414009A1
Authority
ES
Spain
Prior art keywords
processors
processor
exchanges
exchange
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES414009A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compagnie Internationale pour lInformatique
Original Assignee
Compagnie Internationale pour lInformatique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compagnie Internationale pour lInformatique filed Critical Compagnie Internationale pour lInformatique
Publication of ES414009A1 publication Critical patent/ES414009A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1633—Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
ES414009A 1972-04-24 1973-04-24 Perfeccionamientos en sistemas de tratamiento de datos. Expired ES414009A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7214418A FR2182259A5 (es) 1972-04-24 1972-04-24

Publications (1)

Publication Number Publication Date
ES414009A1 true ES414009A1 (es) 1976-02-01

Family

ID=9097394

Family Applications (1)

Application Number Title Priority Date Filing Date
ES414009A Expired ES414009A1 (es) 1972-04-24 1973-04-24 Perfeccionamientos en sistemas de tratamiento de datos.

Country Status (10)

Country Link
US (1) US4012717A (es)
JP (1) JPS5247980B2 (es)
BE (1) BE797619A (es)
BR (1) BR7302852D0 (es)
DE (1) DE2319753B2 (es)
ES (1) ES414009A1 (es)
FR (1) FR2182259A5 (es)
GB (1) GB1414095A (es)
IT (1) IT980879B (es)
NL (1) NL159799B (es)

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DE2701925C3 (de) * 1977-01-19 1981-10-15 Standard Elektrik Lorenz Ag, 7000 Stuttgart Fahrzeugsteuerung mit zwei Bordrechnern
DE2701924C3 (de) * 1977-01-19 1987-07-30 Standard Elektrik Lorenz Ag, 7000 Stuttgart Steuereinrichtung für spurgebundene Fahrzeuge
JPS589976B2 (ja) * 1977-03-17 1983-02-23 株式会社東芝 演算制御装置
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FR2422196A1 (fr) * 1978-04-04 1979-11-02 Bailey Controle Procede de commande du deroulement d'un processus industriel et systeme pour la mise en oeuvre de ce procede
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US4268354A (en) * 1978-10-12 1981-05-19 Westinghouse Electric Corp. Nuclear reactor in core flux mapping system
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JPS573101A (en) * 1980-06-09 1982-01-08 Hitachi Ltd Multiple control device
FR2486749B1 (fr) * 1980-07-11 1987-10-30 Thomson Csf Mat Tel Unite de commande et centre de telecommunications comportant une telle unite de commande
IT8003501A0 (it) * 1980-09-05 1980-09-05 Sits Soc It Telecom Siemens Comando centrale di una pluralita'di utenze periferiche
IT8003502A0 (it) * 1980-09-05 1980-09-05 Sits Soc It Telecom Siemens Unita' di sorveglianza del comando centrale di una pluralita' di utenze periferiche
US4542506A (en) * 1981-06-30 1985-09-17 Nec Home Electronics Ltd. Control system having a self-diagnostic function
DE3137450C2 (de) * 1981-09-21 1984-03-22 Siemens AG, 1000 Berlin und 8000 München Sicherheits-Ausgabeschaltung für eine Datenverarbeitungsanlage
US4916623A (en) * 1982-01-29 1990-04-10 Pitney Bowes Inc. Electronic postage meter having redundant memory
US5109507A (en) * 1982-01-29 1992-04-28 Pitney Bowes Inc. Electronic postage meter having redundant memory
JPS58221453A (ja) * 1982-06-17 1983-12-23 Toshiba Corp 多重系情報処理装置
US4679151A (en) * 1982-07-20 1987-07-07 Lucas Industries Public Limited Company Control for a limiting device
US4573174A (en) * 1982-09-07 1986-02-25 Pitney Bowes Inc. Electronic postage meter having interlock between mechanical and electrical registers
DE3412049A1 (de) * 1984-03-30 1985-10-17 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Signaltechnisch sichere datenverarbeitungseinrichtung
AU568977B2 (en) * 1985-05-10 1988-01-14 Tandem Computers Inc. Dual processor error detection system
US4736339A (en) * 1985-12-16 1988-04-05 Gte Communication Systems Corporation Circuit for simplex I/O terminal control by duplex processors
US4792955A (en) * 1986-08-21 1988-12-20 Intel Corporation Apparatus for on-line checking and reconfiguration of integrated circuit chips
DE3639055C2 (de) * 1986-11-14 1998-02-05 Bosch Gmbh Robert Verfahren zur Betriebsüberwachung und Fehlerkorrektur von Rechnern eines Mehrrechnersystems und Mehrrechnersystem
DE3642851A1 (de) * 1986-12-16 1988-06-30 Bbc Brown Boveri & Cie Fehlertolerantes rechensystem und verfahren zum erkennen, lokalisieren und eliminieren von fehlerhaften einheiten in einem solchen system
US5079740A (en) * 1987-01-12 1992-01-07 Ncr Corporation System and method of providing an automatic back-up primary terminal for a cluster of secondary terminals
US4907228A (en) * 1987-09-04 1990-03-06 Digital Equipment Corporation Dual-rail processor with error checking at single rail interfaces
US4916704A (en) * 1987-09-04 1990-04-10 Digital Equipment Corporation Interface of non-fault tolerant components to fault tolerant system
CA1320276C (en) * 1987-09-04 1993-07-13 William F. Bruckert Dual rail processors with error checking on i/o reads
US5185877A (en) * 1987-09-04 1993-02-09 Digital Equipment Corporation Protocol for transfer of DMA data
DE3854026D1 (de) * 1987-09-04 1995-07-27 Digital Equipment Corp Fehlertolerantes Rechnersystem mit Fehler-Eingrenzung.
EP0306211A3 (en) * 1987-09-04 1990-09-26 Digital Equipment Corporation Synchronized twin computer system
GB8729901D0 (en) * 1987-12-22 1988-02-03 Lucas Ind Plc Dual computer cross-checking system
US4873631A (en) * 1988-04-25 1989-10-10 Ncr Corporation Point of sale automatic back-up system and method
US4903270A (en) * 1988-06-14 1990-02-20 Intel Corporation Apparatus for self checking of functional redundancy check (FRC) logic
JP2722579B2 (ja) * 1988-12-19 1998-03-04 株式会社明電舎 無停電電源装置並列冗長システムの保護装置
JPH07117905B2 (ja) * 1989-02-09 1995-12-18 日本電気株式会社 マイクロプロセッサ
US5086499A (en) * 1989-05-23 1992-02-04 Aeg Westinghouse Transportation Systems, Inc. Computer network for real time control with automatic fault identification and by-pass
US5068780A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones
US5068851A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Apparatus and method for documenting faults in computing modules
ATE139632T1 (de) * 1989-08-01 1996-07-15 Digital Equipment Corp Verfahren zur softwarefehlerbehandlung
US5065312A (en) * 1989-08-01 1991-11-12 Digital Equipment Corporation Method of converting unique data to system data
US5048022A (en) * 1989-08-01 1991-09-10 Digital Equipment Corporation Memory device with transfer of ECC signals on time division multiplexed bidirectional lines
US5153881A (en) * 1989-08-01 1992-10-06 Digital Equipment Corporation Method of handling errors in software
US5163138A (en) * 1989-08-01 1992-11-10 Digital Equipment Corporation Protocol for read write transfers via switching logic by transmitting and retransmitting an address
US5251227A (en) * 1989-08-01 1993-10-05 Digital Equipment Corporation Targeted resets in a data processor including a trace memory to store transactions
EP0596410B1 (en) * 1992-11-04 1999-07-28 Digital Equipment Corporation Detection of command synchronisation error
US6233702B1 (en) 1992-12-17 2001-05-15 Compaq Computer Corporation Self-checked, lock step processor pairs
US5751932A (en) * 1992-12-17 1998-05-12 Tandem Computers Incorporated Fail-fast, fail-functional, fault-tolerant multiprocessor system
US5835953A (en) * 1994-10-13 1998-11-10 Vinca Corporation Backup system that takes a snapshot of the locations in a mass storage device that has been identified for updating prior to updating
US5649152A (en) * 1994-10-13 1997-07-15 Vinca Corporation Method and system for providing a static snapshot of data stored on a mass storage system
JP3132744B2 (ja) * 1995-05-24 2001-02-05 株式会社日立製作所 二重化ｃｐｕ保守交換時の動作一致検証方式
BR0017180A (pt) * 2000-03-24 2003-01-14 Siemens Ag Processo para a ligação de reserva de um campo de unidades de montagem em sistemas digitais para a transmissão de dados e ligação de reserva para a realização do processo
US6954886B2 (en) * 2001-12-31 2005-10-11 Intel Corporation Deterministic hardware reset for FRC machine
US7194671B2 (en) * 2001-12-31 2007-03-20 Intel Corporation Mechanism handling race conditions in FRC-enabled processors
US7055060B2 (en) * 2002-12-19 2006-05-30 Intel Corporation On-die mechanism for high-reliability processor

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US3303474A (en) * 1963-01-17 1967-02-07 Rca Corp Duplexing system for controlling online and standby conditions of two computers
US3409877A (en) * 1964-11-27 1968-11-05 Bell Telephone Labor Inc Automatic maintenance arrangement for data processing systems
US3517174A (en) * 1965-11-16 1970-06-23 Ericsson Telefon Ab L M Method of localizing a fault in a system including at least two parallelly working computers
US3471686A (en) * 1966-01-03 1969-10-07 Bell Telephone Labor Inc Error detection system for synchronized duplicate data processing units
US3444528A (en) * 1966-11-17 1969-05-13 Martin Marietta Corp Redundant computer systems
US3517171A (en) * 1967-10-30 1970-06-23 Nasa Self-testing and repairing computer
US3544777A (en) * 1967-11-06 1970-12-01 Trw Inc Two memory self-correcting system
US3623011A (en) * 1969-06-25 1971-11-23 Bell Telephone Labor Inc Time-shared access to computer registers
US3770948A (en) * 1972-05-26 1973-11-06 Gte Automatic Electric Lab Inc Data handling system maintenance arrangement

Also Published As

Publication number Publication date
DE2319753B2 (de) 1979-10-31
FR2182259A5 (es) 1973-12-07
US4012717A (en) 1977-03-15
BE797619A (fr) 1973-07-16
BR7302852D0 (pt) 1974-07-11
DE2319753A1 (de) 1973-11-08
JPS4955248A (es) 1974-05-29
NL7305686A (es) 1973-10-26
NL159799B (nl) 1979-03-15
IT980879B (it) 1974-10-10
GB1414095A (en) 1975-11-19
JPS5247980B2 (es) 1977-12-06

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