GB1409466A - Data processing systems - Google Patents

Data processing systems

Info

Publication number
GB1409466A
GB1409466A GB2112773A GB2112773A GB1409466A GB 1409466 A GB1409466 A GB 1409466A GB 2112773 A GB2112773 A GB 2112773A GB 2112773 A GB2112773 A GB 2112773A GB 1409466 A GB1409466 A GB 1409466A
Authority
GB
United Kingdom
Prior art keywords
operands
logic units
execute
data processing
same operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2112773A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1409466A publication Critical patent/GB1409466A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1608—Error detection by comparing the output signals of redundant hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • Quality & Reliability (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Hardware Redundancy (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

1409466 Data processing system SIEMENS A G 3 May 1973 [5 May 1972] 21127/73 Heading G4A A data processor includes only a single calculating unit which consists of a plurality of logic units operable in two modes wherein they execute different operations independently and identical operations respectively. As described two logic units VE1, VE2 are provided each being fed with operands from respective register sets Al, B1 and A2, B2. Two sets each of two operands may be fed sequentially to the register sets and two different independent operations executed thereon simultaneously. The logic units may be interconnected to execute the same operation on respective halves of double width operands. The logic units may also execute the same operation simultaneously on identical operands, comparator VG providing a check on the results and initiating an error routine in the event of a difference. The system may include a core store and the logic units may include means to shift operands. Registers A1, A2, B1, B2 may be shift registers.
GB2112773A 1972-05-05 1973-05-03 Data processing systems Expired GB1409466A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19722222195 DE2222195A1 (en) 1972-05-05 1972-05-05 ARRANGEMENT FOR PROCESSING OPERANDS OF PROGRAMS

Publications (1)

Publication Number Publication Date
GB1409466A true GB1409466A (en) 1975-10-08

Family

ID=5844213

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2112773A Expired GB1409466A (en) 1972-05-05 1973-05-03 Data processing systems

Country Status (7)

Country Link
BE (1) BE799129A (en)
DE (1) DE2222195A1 (en)
FR (1) FR2184284A5 (en)
GB (1) GB1409466A (en)
IT (1) IT984165B (en)
LU (1) LU67535A1 (en)
NL (1) NL7306275A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2146146A (en) * 1980-05-30 1985-04-11 Fairchild Camera Instr Co Microprocessor
GB2172129A (en) * 1985-03-04 1986-09-10 Raytheon Co Adder/subtractor
GB2203870A (en) * 1986-09-26 1988-10-26 Performance Semiconductor Corp Microprocessor system for processing operands
WO2004021173A2 (en) * 2002-08-27 2004-03-11 Advanced Micro Devices, Inc. Apparatus and method for scheduling instruction execution in functional units with issue lock mechanism
GB2405966A (en) * 2003-09-10 2005-03-16 Hewlett Packard Development Co CPU testing by comparing outputs of different functional units

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3999052A (en) * 1975-06-18 1976-12-21 International Business Machines Corporation Upper bounds address checking system for providing storage protection for a digital data processor
US4161784A (en) * 1978-01-05 1979-07-17 Honeywell Information Systems, Inc. Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands
DE3036856C2 (en) * 1980-09-30 1982-10-28 Computer Gesellschaft Konstanz Mbh, 7750 Konstanz Data processing system with two processing units
US4612628A (en) * 1983-02-14 1986-09-16 Data General Corp. Floating-point unit constructed of identical modules
EP0924601B1 (en) * 1993-11-23 2001-09-26 Hewlett-Packard Company, A Delaware Corporation Parallel data processing in a single processor

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2146146A (en) * 1980-05-30 1985-04-11 Fairchild Camera Instr Co Microprocessor
GB2172129A (en) * 1985-03-04 1986-09-10 Raytheon Co Adder/subtractor
GB2172129B (en) * 1985-03-04 1989-06-28 Raytheon Co Adder/subtractor
GB2203870A (en) * 1986-09-26 1988-10-26 Performance Semiconductor Corp Microprocessor system for processing operands
GB2203870B (en) * 1986-09-26 1990-12-12 Performance Semiconductor Corp Microprocessor system for processing operands
WO2004021173A2 (en) * 2002-08-27 2004-03-11 Advanced Micro Devices, Inc. Apparatus and method for scheduling instruction execution in functional units with issue lock mechanism
WO2004021173A3 (en) * 2002-08-27 2004-06-10 Advanced Micro Devices Inc Apparatus and method for scheduling instruction execution in functional units with issue lock mechanism
US6944744B2 (en) 2002-08-27 2005-09-13 Advanced Micro Devices, Inc. Apparatus and method for independently schedulable functional units with issue lock mechanism in a processor
GB2405966A (en) * 2003-09-10 2005-03-16 Hewlett Packard Development Co CPU testing by comparing outputs of different functional units
GB2405966B (en) * 2003-09-10 2007-01-17 Hewlett Packard Development Co CPU functional testing
US7213170B2 (en) 2003-09-10 2007-05-01 Hewlett-Packard Development Company, L.P. Opportunistic CPU functional testing with hardware compare

Also Published As

Publication number Publication date
IT984165B (en) 1974-11-20
NL7306275A (en) 1973-11-07
BE799129A (en) 1973-11-05
FR2184284A5 (en) 1973-12-21
DE2222195A1 (en) 1973-11-22
LU67535A1 (en) 1973-07-13

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees