ES400051A1 - Data processing system - Google Patents
Data processing systemInfo
- Publication number
- ES400051A1 ES400051A1 ES400051A ES400051A ES400051A1 ES 400051 A1 ES400051 A1 ES 400051A1 ES 400051 A ES400051 A ES 400051A ES 400051 A ES400051 A ES 400051A ES 400051 A1 ES400051 A1 ES 400051A1
- Authority
- ES
- Spain
- Prior art keywords
- computers
- outputs
- data
- information
- transmission channels
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
- G06F11/181—Eliminating the failing redundant component
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
- G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
- G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
-
- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C25/00—Arrangements for preventing or correcting errors; Monitoring arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
- H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Hardware Design (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Train Traffic Observation, Control, And Security (AREA)
Abstract
Improvements in circuits for continuous testing of information processes consisting of a circuit for continuous functional testing of information processing and data telegram output, particularly in computer-controlled railway signaling systems, in which equal data processing systems are used and in which the information is delivered in the form of a data telegram made up of an information part and a test part, characterized by the use of three equal computers (R1, R2, R3) that have the following characteristics: - each computer (R1, R2, R3) has at least the same number of outputs (R1/al to an, R2/al to an, R3/al to an) that transmission channels (K1 to Kn) exist; - the data telegrams corresponding to the individual transmission channels (K1 to Kn) are delivered in parallel through the corresponding outputs of the computers, the individual telegram parts (bits) being applied in series to the outputs; - the data telegrams are identical at the outputs (e.g. R1/al, R2/al, R3/al) corresponding to the three computers (R1, R2, R3), - and the outputs (eg R1/al, R2/al, P-3 /) of the computers are connected to a supervision and output device (UAV), which, with majority decision, discovers a defective computer (eg R3), being possible the connection, selectively and depending on a certain sequence, of the outputs of in each case only two computers (eg R1 and R2) for the delivery of the data telegrams to the transmission channels, by by means of a clock pulse generator (T) commonly associated with the three computers (R1, R2 R3) and the monitoring and output device (UAV). (Machine-translation by Google Translate, not legally binding)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19712108496 DE2108496C3 (en) | 1971-02-23 | 1971-02-23 | Circuit arrangement for the continuous functional control of the information processing and the output of data telegrams, in particular for process computer-controlled railway signal systems |
Publications (1)
Publication Number | Publication Date |
---|---|
ES400051A1 true ES400051A1 (en) | 1974-12-16 |
Family
ID=5799540
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES400051A Expired ES400051A1 (en) | 1971-02-23 | 1972-02-22 | Data processing system |
Country Status (9)
Country | Link |
---|---|
AT (1) | ATA65872A (en) |
BE (1) | BE779692A (en) |
CH (1) | CH551661A (en) |
DE (1) | DE2108496C3 (en) |
ES (1) | ES400051A1 (en) |
FR (1) | FR2126272B1 (en) |
GB (1) | GB1359748A (en) |
IT (1) | IT947593B (en) |
RO (1) | RO63302A (en) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2019622B (en) * | 1978-04-14 | 1982-04-07 | Lucas Industries Ltd | Digital computing apparatus |
GB1604492A (en) * | 1978-05-30 | 1981-12-09 | Westinghouse Brake & Signal | Railway control systems |
DE2909512B1 (en) * | 1979-03-10 | 1980-07-10 | Standard Elek K Lorenz Ag | Track interlocking |
DE3009355C2 (en) * | 1980-03-12 | 1984-08-30 | Standard Elektrik Lorenz Ag, 7000 Stuttgart | Redundant computing system |
DE3024370C2 (en) * | 1980-06-27 | 1987-01-02 | Siemens AG, 1000 Berlin und 8000 München | Redundant tax system |
DE3108870C2 (en) * | 1981-03-09 | 1983-05-05 | Siemens AG, 1000 Berlin und 8000 München | Procedure for the functional test of a multiplexer |
IN160140B (en) * | 1981-10-10 | 1987-06-27 | Westinghouse Brake & Signal | |
US4967347A (en) * | 1986-04-03 | 1990-10-30 | Bh-F (Triplex) Inc. | Multiple-redundant fault detection system and related method for its use |
JP3229070B2 (en) * | 1993-06-01 | 2001-11-12 | 三菱電機株式会社 | Majority circuit and control unit and majority integrated semiconductor circuit |
CZ200658A3 (en) * | 2006-01-26 | 2007-05-02 | Azd Praha S. R. O. | Method of simple calibration of digital measuring system operating in the mode of minimum number of branches of all available branches |
DE102007062974B4 (en) | 2007-12-21 | 2010-04-08 | Phoenix Contact Gmbh & Co. Kg | Signal processing device |
DE102012010143B3 (en) | 2012-05-24 | 2013-11-14 | Phoenix Contact Gmbh & Co. Kg | Analog signal input circuit with a number of analog signal acquisition channels |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3257546A (en) * | 1963-12-23 | 1966-06-21 | Ibm | Computer check test |
DE1278766B (en) * | 1967-11-07 | 1968-09-26 | Standard Elektrik Lorenz Ag | Method for controlling the exchange of information between two or more computers and computer-controlled devices, for example telecommunication systems, in particular telephone switching systems |
GB1253309A (en) * | 1969-11-21 | 1971-11-10 | Marconi Co Ltd | Improvements in or relating to data processing arrangements |
-
1971
- 1971-02-23 DE DE19712108496 patent/DE2108496C3/en not_active Expired
- 1971-02-23 RO RO6986071A patent/RO63302A/en unknown
-
1972
- 1972-01-28 AT AT65872A patent/ATA65872A/en not_active Application Discontinuation
- 1972-02-16 IT IT2060972A patent/IT947593B/en active
- 1972-02-21 CH CH244872A patent/CH551661A/en not_active IP Right Cessation
- 1972-02-22 GB GB804372A patent/GB1359748A/en not_active Expired
- 1972-02-22 ES ES400051A patent/ES400051A1/en not_active Expired
- 1972-02-22 FR FR7205889A patent/FR2126272B1/fr not_active Expired
- 1972-02-23 BE BE779692A patent/BE779692A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
FR2126272A1 (en) | 1972-10-06 |
CH551661A (en) | 1974-07-15 |
IT947593B (en) | 1973-05-30 |
FR2126272B1 (en) | 1976-07-23 |
DE2108496A1 (en) | 1972-09-07 |
DE2108496B2 (en) | 1975-08-28 |
GB1359748A (en) | 1974-07-10 |
ATA65872A (en) | 1975-07-15 |
BE779692A (en) | 1972-08-23 |
RO63302A (en) | 1978-08-15 |
DE2108496C3 (en) | 1978-12-14 |
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