ES387306A1 - Perfeccionamientos para la obtencion de disposiciones rec- tificadoras por semiconductores. - Google Patents

Perfeccionamientos para la obtencion de disposiciones rec- tificadoras por semiconductores.

Info

Publication number
ES387306A1
ES387306A1 ES387306A ES387306A ES387306A1 ES 387306 A1 ES387306 A1 ES 387306A1 ES 387306 A ES387306 A ES 387306A ES 387306 A ES387306 A ES 387306A ES 387306 A1 ES387306 A1 ES 387306A1
Authority
ES
Spain
Prior art keywords
conductors
bands
wafers
planar
partial conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES387306A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semikron GmbH and Co KG
Original Assignee
Semikron GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semikron GmbH and Co KG filed Critical Semikron GmbH and Co KG
Publication of ES387306A1 publication Critical patent/ES387306A1/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49537Plurality of lead frames mounted in one device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
ES387306A 1969-12-23 1970-12-19 Perfeccionamientos para la obtencion de disposiciones rec- tificadoras por semiconductores. Expired ES387306A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691964481 DE1964481A1 (de) 1969-12-23 1969-12-23 Verfahren zur Herstellung von Halbleiter-Gleichrichteranordnungen

Publications (1)

Publication Number Publication Date
ES387306A1 true ES387306A1 (es) 1974-01-16

Family

ID=5754803

Family Applications (1)

Application Number Title Priority Date Filing Date
ES387306A Expired ES387306A1 (es) 1969-12-23 1970-12-19 Perfeccionamientos para la obtencion de disposiciones rec- tificadoras por semiconductores.

Country Status (8)

Country Link
US (1) US3691629A (es)
JP (1) JPS4921473B1 (es)
CH (1) CH531257A (es)
DE (1) DE1964481A1 (es)
ES (1) ES387306A1 (es)
FR (1) FR2116330A1 (es)
GB (1) GB1330509A (es)
SE (1) SE356638B (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4012835A (en) * 1974-09-17 1977-03-22 E. I. Du Pont De Nemours And Co. Method of forming a dual in-line package
US4044201A (en) * 1974-09-17 1977-08-23 E. I. Du Pont De Nemours And Company Lead frame assembly
US4214120A (en) * 1978-10-27 1980-07-22 Western Electric Company, Inc. Electronic device package having solder leads and methods of assembling the package
US5133118A (en) * 1991-08-06 1992-07-28 Sheldahl, Inc. Surface mounted components on flex circuits
US7271047B1 (en) * 2006-01-06 2007-09-18 Advanced Micro Devices, Inc. Test structure and method for measuring the resistance of line-end vias
US10730276B2 (en) * 2017-01-17 2020-08-04 Maven Optronics Co., Ltd. System and method for vacuum film lamination

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3065525A (en) * 1957-09-13 1962-11-27 Sylvania Electric Prod Method and device for making connections in transistors
US3391456A (en) * 1965-04-30 1968-07-09 Sylvania Electric Prod Multiple segment array making
US3577633A (en) * 1966-12-02 1971-05-04 Hitachi Ltd Method of making a semiconductor device

Also Published As

Publication number Publication date
GB1330509A (en) 1973-09-19
US3691629A (en) 1972-09-19
CH531257A (de) 1972-11-30
FR2116330A1 (es) 1972-07-13
JPS4921473B1 (es) 1974-06-01
DE1964481A1 (de) 1971-07-01
SE356638B (es) 1973-05-28

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