ES2154635T3 - Sistemas de comunicacion digitales. - Google Patents
Sistemas de comunicacion digitales.Info
- Publication number
- ES2154635T3 ES2154635T3 ES92300960T ES92300960T ES2154635T3 ES 2154635 T3 ES2154635 T3 ES 2154635T3 ES 92300960 T ES92300960 T ES 92300960T ES 92300960 T ES92300960 T ES 92300960T ES 2154635 T3 ES2154635 T3 ES 2154635T3
- Authority
- ES
- Spain
- Prior art keywords
- fragmented
- sample
- medium
- samples
- flip flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
- H04L1/205—Arrangements for detecting or preventing errors in the information received using signal quality detector jitter monitoring
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Dc Digital Transmission (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Error Detection And Correction (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
SE HA DETECTADO CORRUPCION EN LOS SISTEMAS DE COMUNICACION DE INFORMACION DIGITAL, EN LA TERMINAL DE RECEPCION, POR MEDIO DE LA TOMA DE UN NUMERO DE MUESTRAS DE LAS SEÑALES RECIBIDAS DENTRO DE CADA PERIODO FRAGMENTADO. LOS "FLIP FLOPS" (4, 7 Y 8) SON UTILIZADOS PARA TOMAR MUESTRAS DE LAS SEÑALES RECIBIDAS DIGITIZADAS COMO SIGUE: FLIP FLOP (4), UNA MUESTRA FRAGMENTADA MEDIA INDICATIVA DEL VALOR DEL CENTRO DEL FRAGMENTO; FLIP FLOP (7), UNA MUESTRA "PREMID" TOMADA DENTRO DEL PERIODO FRAGMENTADO ANTES DE LA MUESTRA FRAGMENTADA MEDIA; Y FLIP FLOP (8), UNA MUESTRA POST MEDIA TOMADA DENTRO DEL PERIODO FRAGMENTADO DESPUES DE LA MUESTRA FRAGMENTADA MEDIA. UN SISTEMA DE CIRCUITOS REGULADO (23, 24, 25) ES UTILIZADO PARA ANALIZAR LAS TRES MUESTRAS, Y DAR UNA SEÑAL DE SALIDA BUENA O MALA AL REGISTRO 11 COMO RESULTADO DEL ANALISIS. LA CORRUPCION PUEDE ESTAR PRESENTE SI CUALQUIERA DE LAS MUESTRAS TIENE UN VALOR DIFERENTE AL DE LAS OTRAS.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB919102936A GB9102936D0 (en) | 1991-02-12 | 1991-02-12 | Digital communications systems |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2154635T3 true ES2154635T3 (es) | 2001-04-16 |
Family
ID=10689896
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES92300960T Expired - Lifetime ES2154635T3 (es) | 1991-02-12 | 1992-02-05 | Sistemas de comunicacion digitales. |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US5297164A (es) |
| EP (1) | EP0499397B1 (es) |
| JP (1) | JP3412160B2 (es) |
| AU (1) | AU650947B2 (es) |
| DE (1) | DE69231714T2 (es) |
| ES (1) | ES2154635T3 (es) |
| FI (1) | FI920567A7 (es) |
| GB (2) | GB9102936D0 (es) |
| HK (1) | HK149995A (es) |
| NO (1) | NO920481L (es) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07221800A (ja) * | 1994-02-02 | 1995-08-18 | Nec Corp | データ識別再生回路 |
| SE9402870L (sv) * | 1994-08-29 | 1996-03-01 | Sesys Ab | Metod, system och anordningar för fjärrstyrning av elektrisk utrustning |
| US5598431A (en) * | 1994-12-23 | 1997-01-28 | Motorola, Inc. | Method and apparatus for signal quality detection in a communication system |
| JP3221401B2 (ja) | 1998-06-15 | 2001-10-22 | 日本電気株式会社 | 光信号監視方法及び装置 |
| US6466589B1 (en) * | 1998-10-19 | 2002-10-15 | Chin-Shen Chou | Apparatus for verifying data integrity and synchronizing ATM cell data format for processing |
| JP3344401B2 (ja) * | 2000-03-03 | 2002-11-11 | 日本電気株式会社 | ゆらぎバッファ制御装置 |
| KR100458106B1 (ko) * | 2000-07-10 | 2004-11-26 | 인터내셔널 비지네스 머신즈 코포레이션 | 디지털 신호의 품질을 결정하기 위한 장치 및 방법 |
| JP3731505B2 (ja) * | 2001-07-18 | 2006-01-05 | 日本電気株式会社 | 光受信装置、光データ信号の波形最適化方法及び光データ信号の波形最適化プログラム |
| US7356095B2 (en) * | 2002-12-18 | 2008-04-08 | Agere Systems Inc. | Hybrid data recovery system |
| WO2006129349A1 (ja) * | 2005-05-31 | 2006-12-07 | Fujitsu Limited | データ受信装置 |
| US7920621B2 (en) * | 2006-09-14 | 2011-04-05 | Altera Corporation | Digital adaptation circuitry and methods for programmable logic devices |
| JP2008141668A (ja) * | 2006-12-05 | 2008-06-19 | Sumitomo Electric Ind Ltd | 光受信装置 |
| JP4558028B2 (ja) * | 2007-11-06 | 2010-10-06 | ザインエレクトロニクス株式会社 | クロックデータ復元装置 |
| WO2011010581A1 (ja) * | 2009-07-24 | 2011-01-27 | ザインエレクトロニクス株式会社 | クロックデータ復元装置 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5094864A (es) * | 1973-12-18 | 1975-07-28 | ||
| US4074358A (en) * | 1976-12-02 | 1978-02-14 | Bell Telephone Laboratories, Incorporated | Test set for measuring jitter distortion of data pulses |
| FR2462073A1 (fr) * | 1979-07-17 | 1981-02-06 | Thomson Csf | Procede et dispositif pour l'extraction de donnees numeriques en presence de bruit et de distorsions |
| US4475210A (en) * | 1982-02-26 | 1984-10-02 | International Telephone And Telegraph Corporation | Data eye monitor |
| US4535461A (en) * | 1983-06-01 | 1985-08-13 | Cincinnati Electronics Corporation | Digital clock bit synchronizer |
| US4884286A (en) * | 1985-12-12 | 1989-11-28 | Texas Instruments Inc. | Elastic buffer for local area networks |
| US4768208A (en) * | 1987-03-09 | 1988-08-30 | Motorola, Inc. | Mid-symbol sampling timing estimator |
| DE3833486C1 (es) * | 1988-10-01 | 1989-08-03 | Wandel & Goltermann Gmbh & Co, 7412 Eningen, De | |
| US5073905A (en) * | 1989-08-22 | 1991-12-17 | Cincinnati Electronics Corporation | Apparatus for and method of synchronizing a local oscillator to a received digital bit stream |
| US5172395A (en) * | 1989-08-22 | 1992-12-15 | Cincinnati Electronics Corporation | Method of and apparatus for deriving an indication of noise content of data bits |
-
1991
- 1991-02-12 GB GB919102936A patent/GB9102936D0/en active Pending
-
1992
- 1992-02-05 ES ES92300960T patent/ES2154635T3/es not_active Expired - Lifetime
- 1992-02-05 EP EP92300960A patent/EP0499397B1/en not_active Expired - Lifetime
- 1992-02-05 DE DE69231714T patent/DE69231714T2/de not_active Expired - Fee Related
- 1992-02-05 GB GB9202444A patent/GB2253547B/en not_active Expired - Fee Related
- 1992-02-06 NO NO92920481A patent/NO920481L/no unknown
- 1992-02-07 US US07/833,446 patent/US5297164A/en not_active Expired - Lifetime
- 1992-02-11 FI FI920567A patent/FI920567A7/fi not_active Application Discontinuation
- 1992-02-11 AU AU10897/92A patent/AU650947B2/en not_active Ceased
- 1992-02-12 JP JP05905392A patent/JP3412160B2/ja not_active Expired - Fee Related
-
1995
- 1995-09-21 HK HK149995A patent/HK149995A/xx not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| AU1089792A (en) | 1992-08-20 |
| AU650947B2 (en) | 1994-07-07 |
| FI920567A7 (fi) | 1992-08-13 |
| EP0499397A2 (en) | 1992-08-19 |
| FI920567A0 (fi) | 1992-02-11 |
| JPH0575653A (ja) | 1993-03-26 |
| GB2253547B (en) | 1995-01-25 |
| EP0499397A3 (es) | 1994-02-16 |
| JP3412160B2 (ja) | 2003-06-03 |
| NO920481D0 (no) | 1992-02-06 |
| GB9102936D0 (en) | 1991-03-27 |
| GB9202444D0 (en) | 1992-03-18 |
| DE69231714T2 (de) | 2001-06-28 |
| EP0499397B1 (en) | 2001-03-07 |
| GB2253547A (en) | 1992-09-09 |
| HK149995A (en) | 1995-09-29 |
| US5297164A (en) | 1994-03-22 |
| NO920481L (no) | 1992-08-13 |
| DE69231714D1 (de) | 2001-04-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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