ES2082802T3 - Procedimiento para la transconexion de señales multiplex a traves de conectores cruzados. - Google Patents
Procedimiento para la transconexion de señales multiplex a traves de conectores cruzados.Info
- Publication number
- ES2082802T3 ES2082802T3 ES90112593T ES90112593T ES2082802T3 ES 2082802 T3 ES2082802 T3 ES 2082802T3 ES 90112593 T ES90112593 T ES 90112593T ES 90112593 T ES90112593 T ES 90112593T ES 2082802 T3 ES2082802 T3 ES 2082802T3
- Authority
- ES
- Spain
- Prior art keywords
- procedure
- transconnection
- multiplex signals
- connectors
- crossed connectors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0623—Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Hardware Design (AREA)
- Time-Division Multiplex Systems (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Emergency Protection Circuit Devices (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
SE DESCRIBE UN PROCEDIMIENTO PARA LA INTERCONEXION DE SEÑALES MULTIPLEX MEDIANTE CONECTORES DE COORDENADAS, EN EL QUE LOS DATOS DE DIFERENTES NIVELES MULTIPLEX, ALMACENADOS EN BLOQUES, SE REDISTRIBUYEN ENTRE BLOQUES DE DATOS CROSS-CONNECT QUE SE ALMACENAN EN UN CUADRO SUPERIOR (RM), NIVELANDOSE LAS DISCREPANCIAS DE FRECUENCIA ENTRE SEÑALES EXTERNAS Y EL CUADRO SUPERIOR (RM).
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE3923172 | 1989-07-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2082802T3 true ES2082802T3 (es) | 1996-04-01 |
Family
ID=6384954
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES90112593T Expired - Lifetime ES2082802T3 (es) | 1989-07-13 | 1990-07-02 | Procedimiento para la transconexion de señales multiplex a traves de conectores cruzados. |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US5123010A (es) |
| EP (1) | EP0407851B1 (es) |
| JP (1) | JPH0352428A (es) |
| AT (1) | ATE134095T1 (es) |
| AU (1) | AU627338B2 (es) |
| CA (1) | CA2020937A1 (es) |
| DE (1) | DE59010111D1 (es) |
| DK (1) | DK0407851T3 (es) |
| ES (1) | ES2082802T3 (es) |
| GR (1) | GR3019081T3 (es) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2659813B1 (fr) * | 1990-03-19 | 1994-06-03 | Cit Alcatel | Unite de commutation elementaire pour equipement de brassage de trains numeriques multiplexes par multiplexage temporel d'affluents numeriques a differents debits. |
| DE4104238A1 (de) * | 1991-02-12 | 1992-08-13 | Siemens Ag | Verfahren zum empfang und zur abgabe von rahmenkoepfen von und fuer stm-1-signale in einem rahmenkopf-server eines netzknotens |
| DE4108429A1 (de) * | 1991-03-15 | 1992-09-17 | Philips Patentverwaltung | Uebertragungssystem fuer die digitale synchrone hierarchie |
| DE4110933A1 (de) * | 1991-04-04 | 1992-10-08 | Philips Patentverwaltung | Uebertragungssystem fuer die synchrone digitale hierachie |
| JP2723699B2 (ja) * | 1991-07-31 | 1998-03-09 | 日本電気株式会社 | Tu−3ポインター付替処理方式 |
| CA2127994A1 (en) * | 1992-01-15 | 1993-07-22 | Jurgen Heiles | Method for switching through digital signals |
| DE4238899A1 (de) * | 1992-11-19 | 1994-05-26 | Philips Patentverwaltung | Übertragungssystem der synchronen digitalen Hierarchie |
| FI93066C (fi) * | 1992-12-09 | 1995-02-10 | Nokia Telecommunications Oy | Multiplekseri ja demultiplekseri |
| DE4309778C1 (de) * | 1993-03-25 | 1994-08-18 | Siemens Ag | Verfahren und Anordnung zum Einfügen eines 34 Mbit/s-Signals in D39-Pulsrahmen |
| US5436890A (en) * | 1993-12-30 | 1995-07-25 | Dsc Communications Corporation | Integrated multi-rate cross-connect system |
| DE19611236C1 (de) * | 1996-03-21 | 1996-11-21 | Siemens Ag | Verfahren zur Zuordnung von Zeitlagen zu einer Mehrkanal-Verbindung in einer Vermittlungseinrichtung |
| GB9718831D0 (en) * | 1997-09-05 | 1997-11-12 | Plessey Telecomm | Data transmission in an sdh network |
| DE19813936A1 (de) * | 1998-03-28 | 1999-09-30 | Cit Alcatel | Verfahren und Vorrichtung zur Mehrfachausnutzung eines Telekommunikationskanal |
| WO2001097435A2 (en) * | 2000-06-15 | 2001-12-20 | Tyco Telecommunications (Us) Inc. | System and method for mapping signals to a data structure having a fixed frame size |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3982077A (en) * | 1975-04-07 | 1976-09-21 | International Telephone And Telegraph Corporation | Asynchronous multiplexer and demultiplexer combination |
| EP0210611B1 (de) * | 1985-07-31 | 1989-12-13 | Siemens Aktiengesellschaft | Verfahren zum Zusammenfassen eines digitalen Bildsignals und dreier digitaler Schmalbandsignale zu einem 139 264-kbit/s-Signal |
| KR910001743B1 (ko) * | 1986-11-28 | 1991-03-22 | 미쓰비시덴기 가부시기가이샤 | 데이타 멀티 플렉스 전송 장치 |
| CA1264876A (en) * | 1987-06-01 | 1990-01-23 | James Angus Mceachern | Synchronization of asynchronous data signals |
| JPH01202946A (ja) * | 1988-02-08 | 1989-08-15 | Sumitomo Electric Ind Ltd | データ伝送方式 |
| US5214643A (en) * | 1988-05-11 | 1993-05-25 | Siemens Aktiengesellschaft | Method for inserting an asynchronous 139,264 kbit/s signal into a 155,520 kbit/s signal |
-
1990
- 1990-06-18 US US07/539,890 patent/US5123010A/en not_active Expired - Fee Related
- 1990-07-02 AT AT90112593T patent/ATE134095T1/de not_active IP Right Cessation
- 1990-07-02 ES ES90112593T patent/ES2082802T3/es not_active Expired - Lifetime
- 1990-07-02 DK DK90112593.0T patent/DK0407851T3/da active
- 1990-07-02 DE DE59010111T patent/DE59010111D1/de not_active Expired - Fee Related
- 1990-07-02 EP EP90112593A patent/EP0407851B1/de not_active Expired - Lifetime
- 1990-07-10 JP JP2180721A patent/JPH0352428A/ja active Pending
- 1990-07-11 CA CA002020937A patent/CA2020937A1/en not_active Abandoned
- 1990-07-12 AU AU58972/90A patent/AU627338B2/en not_active Ceased
-
1996
- 1996-02-22 GR GR960400491T patent/GR3019081T3/el unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DK0407851T3 (da) | 1996-04-15 |
| US5123010A (en) | 1992-06-16 |
| AU5897290A (en) | 1991-01-17 |
| CA2020937A1 (en) | 1991-01-14 |
| DE59010111D1 (de) | 1996-03-21 |
| EP0407851A3 (en) | 1992-06-17 |
| EP0407851A2 (de) | 1991-01-16 |
| ATE134095T1 (de) | 1996-02-15 |
| AU627338B2 (en) | 1992-08-20 |
| GR3019081T3 (en) | 1996-05-31 |
| JPH0352428A (ja) | 1991-03-06 |
| EP0407851B1 (de) | 1996-02-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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