ES2080965T3 - Procedimiento para la union superficial de discos semiconductores de silicio. - Google Patents

Procedimiento para la union superficial de discos semiconductores de silicio.

Info

Publication number
ES2080965T3
ES2080965T3 ES92100220T ES92100220T ES2080965T3 ES 2080965 T3 ES2080965 T3 ES 2080965T3 ES 92100220 T ES92100220 T ES 92100220T ES 92100220 T ES92100220 T ES 92100220T ES 2080965 T3 ES2080965 T3 ES 2080965T3
Authority
ES
Spain
Prior art keywords
procedure
silicon semiconductor
semiconductor discs
surface union
union
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES92100220T
Other languages
English (en)
Inventor
Gunther Dr Schuster
Klaus Panitsch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Conti Temic Microelectronic GmbH
Original Assignee
Temic Telefunken Microelectronic GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Temic Telefunken Microelectronic GmbH filed Critical Temic Telefunken Microelectronic GmbH
Application granted granted Critical
Publication of ES2080965T3 publication Critical patent/ES2080965T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

EL PROCEDIMIENTO SE CARACTERIZA PORQUE SOBRE UNA SUPERFICIE A UNIR, SE APLICA UNA CAPA (2, 3) DELGADA DE MATERIAL SEMICONDUCTOR.
ES92100220T 1991-02-22 1992-01-09 Procedimiento para la union superficial de discos semiconductores de silicio. Expired - Lifetime ES2080965T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4105592A DE4105592A1 (de) 1991-02-22 1991-02-22 Verfahren zum flaechenhaften verbinden von siliziumhalbleiterscheiben

Publications (1)

Publication Number Publication Date
ES2080965T3 true ES2080965T3 (es) 1996-02-16

Family

ID=6425673

Family Applications (1)

Application Number Title Priority Date Filing Date
ES92100220T Expired - Lifetime ES2080965T3 (es) 1991-02-22 1992-01-09 Procedimiento para la union superficial de discos semiconductores de silicio.

Country Status (5)

Country Link
EP (1) EP0501108B1 (es)
JP (1) JP2529799B2 (es)
DE (2) DE4105592A1 (es)
ES (1) ES2080965T3 (es)
FI (1) FI920422A (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4219132A1 (de) * 1992-06-11 1993-12-16 Suess Kg Karl Verfahren zum Herstellen von Silizium/Glas- oder Silizium/Silizium-Verbindungen
US20120319220A1 (en) * 2009-12-11 2012-12-20 Pioneer Micro Technology Corporation Method of bonding semiconductor substrate and mems device
JP5367841B2 (ja) * 2009-12-11 2013-12-11 パイオニア株式会社 半導体基板の接合方法およびｍｅｍｓデバイス
JP5021098B2 (ja) * 2009-12-11 2012-09-05 パイオニア株式会社 半導体基板の接合方法およびｍｅｍｓデバイス

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD82790A (es) *
US3925808A (en) * 1974-08-08 1975-12-09 Westinghouse Electric Corp Silicon semiconductor device with stress-free electrodes
US4411060A (en) * 1981-07-06 1983-10-25 Western Electric Co., Inc. Method of manufacturing dielectrically-isolated single-crystal semiconductor substrates
EP0263146A1 (en) * 1986-03-19 1988-04-13 Analog Devices, Inc. Aluminum-backed wafer and chip

Also Published As

Publication number Publication date
JPH04317313A (ja) 1992-11-09
EP0501108B1 (de) 1995-11-29
FI920422A (fi) 1992-08-23
DE59204451D1 (de) 1996-01-11
JP2529799B2 (ja) 1996-09-04
FI920422A0 (fi) 1992-01-30
DE4105592A1 (de) 1992-08-27
EP0501108A1 (de) 1992-09-02

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