ES2054789T3 - Dispositivo de acceso multiple. - Google Patents

Dispositivo de acceso multiple.

Info

Publication number
ES2054789T3
ES2054789T3 ES88202675T ES88202675T ES2054789T3 ES 2054789 T3 ES2054789 T3 ES 2054789T3 ES 88202675 T ES88202675 T ES 88202675T ES 88202675 T ES88202675 T ES 88202675T ES 2054789 T3 ES2054789 T3 ES 2054789T3
Authority
ES
Spain
Prior art keywords
circuit
coupling
transmission circuit
transmission
stations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
ES88202675T
Other languages
English (en)
Inventor
Dirk Herman Lutgardis C Rabaey
Didier Rene Haspeslagh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel NV filed Critical Alcatel NV
Application granted granted Critical
Publication of ES2054789T3 publication Critical patent/ES2054789T3/es
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored programme control
    • H04Q11/0414—Details
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
  • Information Transfer Systems (AREA)
  • Memory System (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Dram (AREA)
  • Communication Control (AREA)
  • Transmitters (AREA)
  • Selective Calling Equipment (AREA)

Abstract

UN DISPOSITIVO (MAM) QUE INCLUYE UNA RE-FUENTE DE DATOS (RAM) A UNA PRIMERA (PR) ESTACION Y UNA SEGUNDA ESTACION (LC) QUE SE ACOPLAN. ESTE DISPOSITIVO UN PRIMER CIRCUITO DE TRANSMISION (DB,MD,LD2,LD1,DBU) QUE SE ACOPLAN A LA REFUENTE COMUN Y A LA PRIMERA Y SEGUNDA ESTACION, UN SEGUNDO CUIRCUITO DE TRANSMISION (DB,MD) QUE SE ACOPLAN A LA REFUENTE COMUN Y A UN CIRCUITO BUFFER (LR;LW) Y UN TERCER CIRCUITO DE TRANSMISION (PISO,SO;SI,SIPO) QUE SE ACOPLAN AL CIRCUITO BUFFER Y A LA SEGUNDA ESTACION CORRESPONDIENTE QUE SE USA EN MOMENTOS PREFIJADOS (T1,T2,T3;T4). EL CIRCUITO TAMBIEN INCLUYE UN CIRCUITO DE PRIORIDAD (CLG,SG) QUE CONCEDE LAS MAS ALTA PRIORIDAD A LAS PETICIONES DE USO DEL PRIMER CIRCUITO DE TRANSMISION Y LA SIGUIENTE PRIORIDAD A LAS PETCIONES DE USO DEL SEGUNDO CIRCUITO DE TRANSMISION EN DECRECIENTE ORDEN DE FRECUENCIA (SOS;SIS) EN MOMENTOS DETERMINADOS.
ES88202675T 1987-12-07 1988-11-24 Dispositivo de acceso multiple. Expired - Fee Related ES2054789T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
BE8701402A BE1001383A7 (fr) 1987-12-07 1987-12-07 Dispositif a acces multiples.

Publications (1)

Publication Number Publication Date
ES2054789T3 true ES2054789T3 (es) 1994-08-16

Family

ID=3883009

Family Applications (1)

Application Number Title Priority Date Filing Date
ES88202675T Expired - Fee Related ES2054789T3 (es) 1987-12-07 1988-11-24 Dispositivo de acceso multiple.

Country Status (9)

Country Link
US (1) US5068848A (es)
EP (1) EP0320041B1 (es)
JP (1) JPH065523B2 (es)
AT (1) ATE103723T1 (es)
AU (1) AU613983B2 (es)
BE (1) BE1001383A7 (es)
CA (1) CA1312386C (es)
DE (1) DE3888801T2 (es)
ES (1) ES2054789T3 (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2656710A1 (fr) * 1989-12-29 1991-07-05 Radiotechnique Compelec Microcontroleur pour l'execution rapide d'un grand nombre d'operations decomposable en sequence d'operations de meme nature.
ATE129841T1 (de) * 1991-08-14 1995-11-15 Siemens Ag Schnittstellenbaustein zur unterstützung der kommunikation zwischen prozessorsystemen.
JP3778579B2 (ja) * 1993-11-16 2006-05-24 株式会社ルネサステクノロジ 半導体記憶装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2465269B1 (fr) * 1979-09-12 1985-12-27 Cii Honeywell Bull Selecteur de demandes asynchrones dans un systeme de traitement de l'information
US4393464A (en) * 1980-12-12 1983-07-12 Ncr Corporation Chip topography for integrated circuit communication controller
IT1140233B (it) * 1981-10-20 1986-09-24 Italtel Spa Unita' di controllo dei circuiti di interfaccia di ingresso-uscita di un elaboratore elettronico
US4514823A (en) * 1982-01-15 1985-04-30 International Business Machines Corporation Apparatus and method for extending a parallel channel to a serial I/O device
DE3502721A1 (de) * 1985-01-28 1986-07-31 Robert Bosch Gmbh, 7000 Stuttgart Multiprozessorsystem
US4740956A (en) * 1985-12-30 1988-04-26 Ibm Corporation Linear-space signalling for a circuit-switched network

Also Published As

Publication number Publication date
EP0320041B1 (en) 1994-03-30
BE1001383A7 (fr) 1989-10-17
JPH065523B2 (ja) 1994-01-19
EP0320041A3 (en) 1990-03-28
DE3888801D1 (de) 1994-05-05
DE3888801T2 (de) 1994-08-18
ATE103723T1 (de) 1994-04-15
AU2582288A (en) 1989-06-15
AU613983B2 (en) 1991-08-15
CA1312386C (en) 1993-01-05
JPH01169559A (ja) 1989-07-04
EP0320041A2 (en) 1989-06-14
US5068848A (en) 1991-11-26

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