ES2041683T3 - Convertidor de analogico a digital multiplexado por division de frecuencias. - Google Patents
Convertidor de analogico a digital multiplexado por division de frecuencias.Info
- Publication number
- ES2041683T3 ES2041683T3 ES198787303969T ES87303969T ES2041683T3 ES 2041683 T3 ES2041683 T3 ES 2041683T3 ES 198787303969 T ES198787303969 T ES 198787303969T ES 87303969 T ES87303969 T ES 87303969T ES 2041683 T3 ES2041683 T3 ES 2041683T3
- Authority
- ES
- Spain
- Prior art keywords
- signals
- digital
- closed loop
- video signals
- reference signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000002131 composite material Substances 0.000 abstract 1
- 230000001360 synchronised effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
- H04N9/68—Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/44—Colour synchronisation
- H04N9/455—Generation of colour burst signals; Insertion of colour burst signals in colour picture signals or separation of colour burst signals from colour picture signals
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Processing Of Color Television Signals (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Analogue/Digital Conversion (AREA)
- Time-Division Multiplex Systems (AREA)
- Picture Signal Circuits (AREA)
- Color Television Systems (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
- Laser Beam Processing (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
Abstract
EN LA FORMA DESCRITA DEL INVENTO, UN RECEPTOR DE TELEVISION DIGITAL QUE TIENE UN RELOJ (CK) INCLUYE UN PRIMER BUCLE CERRADO DE FASE DIGITAL (232-252) QUE REGENERA LA FASE DE CUADRATURA RELATIVA A LAS SEÑALES SUBPORTADORAS QUE SE USAN PARA DEMODULAR SINCRONICAMENTE (232,234) LOSCOMPONENTES DE LA SEÑAL DE CROMINANCIA DE SEÑALES DE VIDEO COMPUESTAS EN SEÑALES DE INFORMACION DE COLOR. CUANDO SEÑALES DE VIDEO NO STANDARD SE PROCESAN POR EL RECEPTOR, LA FRECUENCIA ESTABILIZADA EN LA SEÑAL DE RELOJ PUEDE PROVOCAR QUE LA INFORMACION DE COLOR SEA DISTORSIONADA. PARA COMPENSAR ESTA DISTORSION, UN SEGUNDO BUCLE CERRADO DE FASE (300) SE SINCRONIZA A UNA SEÑAL DE REFERENCIA GENERADA POR UN OSCILADOR ANALOGO (310). LA SEÑAL DE REFERENCIA ANALOGA SE SUMA LINEALMENTE (314) A SEÑALES DE VIDEO ANALOGAS DE BANDA DE BASE. LAS SEÑALES COMBINADAS SE DIGITALIZAN MEDIANTE UN CONVERTIDOR ANALOGICO DIGITAL (211) Y SE FILTRAN ENTONCES POR FILTROS DE PASO BAJO Y FILTROS DE PASO DE BANDA (301,304) PARA DESARROLLAR LAS SEÑALES DIGITALES QUE REPRESENTAN LAS SEÑALES DE VIDEO Y LA SEÑAL DE REFERENCIA RESPECTIVAMENTE. LA SEÑAL DE REFERENCIA DIGITAL SE USA PARA SINCRONIZAR EL SEGUNDO BUCLE CERRADO DE FASE (300), LAS SEÑALES DE CONTROL DEL CUAL SE USAN PARA COMPENSAR (328) EL PRIMER BUCLE CERRADO DE FASE (232-252) PARA LAS INESTABILIDADES DE FRECUENCIA EN LAS SEÑALES DE RELOJ. MAS GENERALMENTE, EL INVENTO CONTEMPLA EL USO DE UN CONVERTIDOR ANALOGICO DIGITAL PARA DIGITALIZAR SEÑALES ANALOGICAS COMBINADAS QUE OCUPAN BANDAS DE FRECUENCIA DIFERENTES, ESTANDO SEPARADAS LAS SEÑALES DIGITALIZADAS POR FILTRADO ANTES DE SER SUMINISTRADAS A LOS RESPECTIVOS CIRCUITOS DE UTILIZACION O PROCESO.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/858,720 US4703340A (en) | 1986-05-02 | 1986-05-02 | Frequency division multiplexed analog to digital converter |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2041683T3 true ES2041683T3 (es) | 1993-12-01 |
Family
ID=25329003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES198787303969T Expired - Lifetime ES2041683T3 (es) | 1986-05-02 | 1987-05-01 | Convertidor de analogico a digital multiplexado por division de frecuencias. |
Country Status (10)
Country | Link |
---|---|
US (1) | US4703340A (es) |
EP (1) | EP0245060B1 (es) |
JP (1) | JP2587633B2 (es) |
KR (1) | KR950004116B1 (es) |
AT (1) | ATE91584T1 (es) |
AU (1) | AU597969B2 (es) |
CA (1) | CA1246206A (es) |
DE (1) | DE3786488T2 (es) |
ES (1) | ES2041683T3 (es) |
FI (1) | FI84127C (es) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5227794A (en) * | 1991-12-23 | 1993-07-13 | Ford Motor Company | Frequency multiplexed analog-digital conversion |
JP3241079B2 (ja) * | 1992-02-24 | 2001-12-25 | 株式会社日立製作所 | ディジタル位相同期回路 |
US5327132A (en) * | 1992-11-23 | 1994-07-05 | Ford Motor Company | Composite signal generation and decoding in digital signal processing automotive audio system |
KR950003284B1 (ko) * | 1993-03-12 | 1995-04-07 | 삼성전자 주식회사 | 영상신호의 주파수변조(fm) 장치 및 그 자동조정 방법 |
US5808691A (en) * | 1995-12-12 | 1998-09-15 | Cirrus Logic, Inc. | Digital carrier synthesis synchronized to a reference signal that is asynchronous with respect to a digital sampling clock |
JP3304036B2 (ja) * | 1996-04-22 | 2002-07-22 | モトローラ株式会社 | ディジタル映像処理装置のクロック発生回路 |
US5796392A (en) * | 1997-02-24 | 1998-08-18 | Paradise Electronics, Inc. | Method and apparatus for clock recovery in a digital display unit |
JPH10336487A (ja) * | 1997-06-02 | 1998-12-18 | Sony Corp | アナログ/ディジタル変換回路 |
US6380980B1 (en) * | 1997-08-25 | 2002-04-30 | Intel Corporation | Method and apparatus for recovering video color subcarrier signal |
US6330034B1 (en) * | 1997-10-31 | 2001-12-11 | Texas Instruments Incorporated | Color phase-locked loop for video decoder |
DE10111402B4 (de) * | 2001-03-09 | 2006-01-19 | Harman Becker Automotive Systems (Becker Division) Gmbh | Verfahren und Phasenregelkreis zur Synchronisation auf einen in einem Nutzsignal enthaltenen Hilfsträger |
US7080169B2 (en) * | 2001-12-11 | 2006-07-18 | Emulex Design & Manufacturing Corporation | Receiving data from interleaved multiple concurrent transactions in a FIFO memory having programmable buffer zones |
US20070206712A1 (en) * | 2002-03-11 | 2007-09-06 | Stefan Gierl | Phase-locked loop for synchronization with a subcarrier contained in an intelligence signal |
US7330217B1 (en) * | 2004-10-20 | 2008-02-12 | Cirrus Logic, Inc. | Chroma phase error correction circuitry and methods and systems utilizing the same |
US8212942B2 (en) * | 2010-04-14 | 2012-07-03 | Newport Media, Inc. | All digital front-end architecture for television with sigma-delta ADC input |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4514760A (en) * | 1983-02-17 | 1985-04-30 | Rca Corporation | Digital television receiver with time-multiplexed analog-to-digital converter |
US4562456A (en) * | 1983-10-17 | 1985-12-31 | Rca Corporation | Analog-to-digital conversion apparatus including a circuit to substitute calculated values when the dynamic range of the converter is exceeded |
JPS60111591A (ja) * | 1983-11-21 | 1985-06-18 | Victor Co Of Japan Ltd | カラ−映像信号の記録方法及び記録再生方法 |
US4626894A (en) * | 1984-10-04 | 1986-12-02 | Rca Corporation | Signal filtering system having adaptively cascaded filter stages for developing a variable bandwidth frequency characteristic |
AU594649B2 (en) * | 1984-10-19 | 1990-03-15 | Stephens, John D. | Fetal anatomic sex assignment by ultrasonography during early pregnancy |
US4635102A (en) * | 1984-10-24 | 1987-01-06 | Rca Corporation | Chroma signal amplitude control apparatus |
-
1986
- 1986-05-02 US US06/858,720 patent/US4703340A/en not_active Expired - Lifetime
-
1987
- 1987-04-24 FI FI871806A patent/FI84127C/fi not_active IP Right Cessation
- 1987-04-28 AU AU72164/87A patent/AU597969B2/en not_active Ceased
- 1987-05-01 KR KR1019870004278A patent/KR950004116B1/ko not_active IP Right Cessation
- 1987-05-01 AT AT87303969T patent/ATE91584T1/de active
- 1987-05-01 DE DE87303969T patent/DE3786488T2/de not_active Expired - Fee Related
- 1987-05-01 EP EP87303969A patent/EP0245060B1/en not_active Expired - Lifetime
- 1987-05-01 CA CA000536182A patent/CA1246206A/en not_active Expired
- 1987-05-01 ES ES198787303969T patent/ES2041683T3/es not_active Expired - Lifetime
- 1987-05-01 JP JP62106533A patent/JP2587633B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
AU7216487A (en) | 1987-11-05 |
KR870011799A (ko) | 1987-12-26 |
AU597969B2 (en) | 1990-06-14 |
EP0245060A2 (en) | 1987-11-11 |
ATE91584T1 (de) | 1993-07-15 |
DE3786488D1 (de) | 1993-08-19 |
FI84127C (fi) | 1991-10-10 |
JP2587633B2 (ja) | 1997-03-05 |
DE3786488T2 (de) | 1994-02-10 |
FI84127B (fi) | 1991-06-28 |
CA1246206A (en) | 1988-12-06 |
EP0245060A3 (en) | 1990-10-10 |
FI871806A (fi) | 1987-11-03 |
KR950004116B1 (ko) | 1995-04-25 |
JPS62272696A (ja) | 1987-11-26 |
US4703340A (en) | 1987-10-27 |
EP0245060B1 (en) | 1993-07-14 |
FI871806A0 (fi) | 1987-04-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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