EP4202602A4 - Integrated circuit reset method and integrated circuit - Google Patents

Integrated circuit reset method and integrated circuit

Info

Publication number
EP4202602A4
EP4202602A4 EP21857730.2A EP21857730A EP4202602A4 EP 4202602 A4 EP4202602 A4 EP 4202602A4 EP 21857730 A EP21857730 A EP 21857730A EP 4202602 A4 EP4202602 A4 EP 4202602A4
Authority
EP
European Patent Office
Prior art keywords
integrated circuit
reset method
circuit reset
integrated
reset
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP21857730.2A
Other languages
German (de)
French (fr)
Other versions
EP4202602A1 (en
Inventor
Chongyang Wang
Chen Lin
Huafeng Xu
Bin Guo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanechips Technology Co Ltd
Original Assignee
Sanechips Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanechips Technology Co Ltd filed Critical Sanechips Technology Co Ltd
Publication of EP4202602A1 publication Critical patent/EP4202602A1/en
Publication of EP4202602A4 publication Critical patent/EP4202602A4/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4403—Processor initialisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
EP21857730.2A 2020-08-21 2021-08-19 Integrated circuit reset method and integrated circuit Pending EP4202602A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010848569.9A CN114077295A (en) 2020-08-21 2020-08-21 Method for resetting integrated circuit and integrated circuit
PCT/CN2021/113490 WO2022037638A1 (en) 2020-08-21 2021-08-19 Integrated circuit reset method and integrated circuit

Publications (2)

Publication Number Publication Date
EP4202602A1 EP4202602A1 (en) 2023-06-28
EP4202602A4 true EP4202602A4 (en) 2024-02-14

Family

ID=80282273

Family Applications (1)

Application Number Title Priority Date Filing Date
EP21857730.2A Pending EP4202602A4 (en) 2020-08-21 2021-08-19 Integrated circuit reset method and integrated circuit

Country Status (5)

Country Link
US (1) US20230325199A1 (en)
EP (1) EP4202602A4 (en)
JP (1) JP2023538648A (en)
CN (1) CN114077295A (en)
WO (1) WO2022037638A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117807933A (en) * 2022-09-30 2024-04-02 深圳市中兴微电子技术有限公司 Signal processing method and device, chip and electronic equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6473476B1 (en) * 1999-01-06 2002-10-29 Dvdo, Incorporated Method and apparatus for providing deterministic resets for clock divider systems
EP1615106A1 (en) * 2004-07-05 2006-01-11 STMicroelectronics Limited Reset in a system-on-chip circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101452425A (en) * 2008-12-25 2009-06-10 北京中星微电子有限公司 Method for preventing bus collision, circuit and integrated circuit chip
CN101587499B (en) * 2009-06-24 2010-12-08 北京理工大学 Multi-channel signal acquiring system based on NAND
JP5975601B2 (en) * 2011-02-25 2016-08-23 セイコーエプソン株式会社 Detection circuit, physical quantity detection device, angular velocity detection device, integrated circuit device, and electronic apparatus
CN103795228B (en) * 2014-02-18 2016-05-11 成都芯源系统有限公司 Control circuit for switching converter and control method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6473476B1 (en) * 1999-01-06 2002-10-29 Dvdo, Incorporated Method and apparatus for providing deterministic resets for clock divider systems
EP1615106A1 (en) * 2004-07-05 2006-01-11 STMicroelectronics Limited Reset in a system-on-chip circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2022037638A1 *

Also Published As

Publication number Publication date
CN114077295A (en) 2022-02-22
EP4202602A1 (en) 2023-06-28
WO2022037638A1 (en) 2022-02-24
JP2023538648A (en) 2023-09-08
US20230325199A1 (en) 2023-10-12

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Legal Events

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A4 Supplementary search report drawn up and despatched

Effective date: 20240117

RIC1 Information provided on ipc code assigned before grant

Ipc: G06F 1/24 20060101AFI20240111BHEP