EP3780070A1 - Système et procédé de gravure pour fabrication d'éléments de dispositif photonique - Google Patents

Système et procédé de gravure pour fabrication d'éléments de dispositif photonique Download PDF

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Publication number
EP3780070A1
EP3780070A1 EP19191781.4A EP19191781A EP3780070A1 EP 3780070 A1 EP3780070 A1 EP 3780070A1 EP 19191781 A EP19191781 A EP 19191781A EP 3780070 A1 EP3780070 A1 EP 3780070A1
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Prior art keywords
metal
etchant
etching
semiconductor
semiconductor substrate
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EP19191781.4A
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German (de)
English (en)
Inventor
Lucia ROMANO
Konstantins Jefimovs
Matias Kagias
Joan Vila COMAMALA
Marco Stampanoni
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Scherrer Paul Institut
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Scherrer Paul Institut
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Priority to EP19191781.4A priority Critical patent/EP3780070A1/fr
Priority to PCT/EP2020/071235 priority patent/WO2021028214A1/fr
Priority to EP20754652.4A priority patent/EP4014247A1/fr
Priority to US17/635,081 priority patent/US11881408B2/en
Priority to CN202080057026.3A priority patent/CN114223051A/zh
Publication of EP3780070A1 publication Critical patent/EP3780070A1/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00555—Achieving a desired geometry, i.e. controlling etch rates, anisotropy or selectivity
    • B81C1/00619—Forming high aspect ratio structures having deep steep walls
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00—Optical elements other than lenses
    • G02B5/18—Diffraction gratings
    • G02B5/1847—Manufacturing methods
    • G02B5/1857—Manufacturing methods using exposure or etching means, e.g. holography, photolithography, exposure to electron or ion beams
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3085—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/028—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C09K13/04—Etching, surface-brightening or pickling compositions containing an inorganic acid
    • C09K13/08—Etching, surface-brightening or pickling compositions containing an inorganic acid containing a fluorine compound
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00—Optical elements other than lenses
    • G02B5/18—Diffraction gratings
    • G02B5/1838—Diffraction gratings for use with ultraviolet radiation or X-rays
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method to fabricate high aspect ratio patterns in a semiconductor substrate that are usable as elements of photonic devices.
  • photonic devices are components for creating, manipulating or detecting light. This can include laser diodes, light-emitting diodes, solar and photovoltaic cells, displays and optical amplifiers, diffractive patterns, periodic refractive and diffractive structures, gratings and lenses.
  • metal-assisted chemical etching is a technique capable of fabricating 3D nano- and microstructures of several shapes and applications such as nanoporous layers, nanowires, 3D objects, MEMS, microfluidic channels, Vias, X-ray optics, sensor devices in few semiconductors - Si, Ge, poly-Si, GaAs, SiC - and using different catalysts - Ag, Au, Pt, Pd, Cu, Ni, Rh.
  • a local electrochemical etching occurs when a metal patterned semiconductor substrate is immersed in a solution (the electrolyte) containing an etchant (e.g. HF) and an oxidant (e.g.
  • the metal serves as a catalyst for the H 2 O 2 reduction with a consequent holes injection deep into the valence band of the semiconductor.
  • the concentration of holes becomes higher in the region surrounding the metal catalyst, where the semiconductor is readily oxidized and removed by HF with the formation of reaction by-products such as silicon fluoride compounds. The reaction continues as the catalyst is pulled down into the substrate.
  • Patterning nanostructures requires high precision pattern transferring and high lateral resolution during growing or etching, with MacEtch in liquid this corresponds to a condition of very high HF concentration in the etching solution.
  • Au catalyst suffers of bad adhesion on silicon substrates and a detrimental pattern peel-off has been reported during MacEtch in conditions of high HF concentration.
  • uniform high aspect ratio have been reported for nanoporous Au catalyst in conditions of low HF concentration and high oxidant (e.g. H 2 O 2 ) concentration. In these conditions the etching is more isotropic, top of the trenches appear wider with respect of bottom compromising the fidelity of pattern transfer in lateral dimension, so the process is not suitable for high aspect ratio nanostructures with high precision of pattern transfer.
  • Pt has the faster reported etching rate for MacEtch due to its superior catalytic activity.
  • the use of Pt as MacEtch catalyst has been mostly investigated in form of nanoparticles or added as top layer of Au thick film.
  • Pt has the advantage of forming a stable silicide (PtSi and Pt 2 Si) on Si surface at relatively low temperature, Pt silicide formation has been extensively reported in literature for the annealing temperature in the range of 400 - 600 °C.
  • a silicon oxide layer at the metal-substrate interface is usually a barrier layer for metal silicide formation, but Pt silicide has been reported to form also in presence of a native oxide layer.
  • the formation of a top layer of SiO 2 is possible in case of annealing in oxidizing ambient.
  • the present disclosure provides a method to fabricate high aspect ratio patterns in a semiconductor substrate that are elements of photonic devices, such as diffractive gratings by using a continuous metal mesh with a stabilizing catalyst that involves the formation of a stable metal-semiconductor alloy and etching in presence of air in a continuous flow and an etchant.
  • the presence of the stabilizing catalyst allows to etch the substrate in vertical direction even in conditions of very low oxidant concentration (e.g. the oxidizer species being present in the air) without any external bias or magnetic field so to realize very high aspect ratio structures in the semiconductor substrate.
  • Photonic devices are components for creating, manipulating or detecting light. This can include laser diodes, light-emitting diodes, solar and photovoltaic cells, displays and optical amplifiers, diffractive patterns, periodic refractive and diffractive structures, gratings and lenses.
  • the oxidant gas can comprise air.
  • the etchant may comprise HF in vapor phase as evaporated from a liquid solution containing water diluted HF.
  • the etchant may comprise a solution of water diluted HF in liquid phase.
  • the semiconductor substrate may contain a semiconductor selected from the group consisting of: Si, Ge, or a III-V semiconductor and wherein the metal may contain a metal selected from the group consisting of: Au, Ag, Pt, Pd, Cu, Ni, Rh.
  • the oxidant gas may be produced by decomposing H 2 O 2 on a platinum surface being a solid piece containing platinum immersed in a liquid solution containing water diluted H 2 O 2 .
  • the method may be carried out in presence of an inert gas selected from the group consisting of: nitrogen, argon and helium.
  • the method may be carried out in the presence of an alcohol selected from the group consisting of: isopropanol, methanol, ethanol.
  • the oxidant gas and the etchant gas can be connected to an enclosed etching chamber in separated gas lines.
  • the patterned metal layer may comprise a continuous mesh pattern, and wherein the etched semiconductor structure may comprise an array of nanowires with aspect ratio of at least 10:1.
  • the patterned metal layer may comprise an X-ray diffractive grating pattern with periodic features
  • the etched semiconductor structure may comprise an X-ray diffractive grating with periodic features
  • Photonic devices are components for creating, manipulating or detecting light. This can include laser diodes, light-emitting diodes, solar and photovoltaic cells, displays and optical amplifiers, diffractive patterns, periodic refractive and diffractive structures, gratings and lenses.
  • the present disclosure provides a method to fabricate high aspect ratio patterns in a semiconductor substrate that are elements of photonic devices, such as diffractive gratings by using a continuous metal mesh with a stabilizing catalyst that involves the formation of a stable metal-semiconductor alloy and etching in presence of air in a continuous flow and an etchant.
  • the presence of the stabilizing catalyst allows to etch the substrate in vertical direction even in conditions of very low oxidant concentration (e.g.
  • the metal layer on the semiconductor substrate reacts with the oxygen contained in the air and catalyzes the semiconductor etching by the etchant.
  • Air in continuous flow in proximity of the metal layer allows to maintain constant the oxidant concentration in proximity of the metal layer.
  • the etchant can be a water diluted HF solution or it can be provided by the evaporation of hydrofluoric acid from a solution containing water diluted HF.
  • the continuous air flow supports the diffusion of the reactant species (e.g. oxygen and the etchant) through the etched semiconductor so to maintain a uniform etching rate of the high aspect ratio structure.
  • the continuous air flow supports the diffusion of the reaction by-products so to avoid the poisoning of the etching reaction. Since the oxidant gas is provided by the normal air, the system has particular advantage for implementation as it does not require any handling of hazardous and inflammable gases such as O 2 gas or instable chemical such as H 2 O 2 .
  • the method comprises the provision of a semiconductor substrate and a metal pattern thereon.
  • the semiconductor substrate can include an oxygen terminated layer or a thin semiconductor oxide layer at the interface between the semiconductor bulk material and the metal layer.
  • the metal pattern can be composed of a plurality of different metal layers. An example of the above described multilayer structure is reported in Figure 1 .
  • stable silicides that can be formed by thin film reaction are: PtSi, Pt 2 Si, PdSi, Pd 2 Si, Pd 3 Si, Pd 4 Si, Pd 5 Si, Cu 3 Si, NiSi, Ni 2 Si, Ni 3 Si, Ni 5 Si 2 , Ni 3 Si 2 , Rh 3 Si.
  • stable germanides that can be formed by thin film reaction are: PtGe, PtGe 2 , PdGe, Pd 2 Ge, Cu 3 Ge, Cu 5 Ge 2 , NiGe, Ni 5 Ge, RhGe, Rh 2 Ge, Rh 3 Ge, Rh 5 Ge 3 , Rh 3 Ge 4 .
  • metal layer structure An example of the metal layer structure is reported in Figure 1 .
  • the formation of stable metal-semiconductor alloys with Si or Ge can be detected by XPS, TEM or RBS analyses.
  • the semiconductor substrate with the metal pattern thereon is heated. During the heating, the semiconductor substrate with the metal pattern thereon is exposed to an oxidant gas containing O 2 at least 20% of volume (e.g. air) in a continuous flow and an acid gas containing HF such as the vapor produced by the evaporation of a liquid solution containing water diluted HF.
  • the reactant gas species gas containing O 2 and HF
  • the continuous gas flow supports the gas species diffusing through the etched semiconductor structure. This promotes the mass transport of the reactant species and the etching byproducts, thereby the process can continue for long time in order to form very high aspect ratio structures.
  • the presence of the stabilizing catalyst that involves the formation of a stable metal-semiconductor alloy allows to realize a uniform etching of the substrate in vertical direction even in conditions of very low oxidant concentration and very dense patterns such as the X-ray diffraction gratings.
  • the present method allows to reach very high etching rate in the range of 20-24 pm/hr that are comparable to values of the liquid phase MacEtch.
  • the etching rate is improved at least by a factor 10.
  • the present method allows to etch nanowires with at least 17 times longer length.
  • the method of present disclosure uses a very low oxidant concentration, this limits the excess of charge carriers injected in the semiconductor from the metal catalyst that is the main cause of undesired porosity of the etched structures. Therefore, the method of present disclosure produces almost negligible porosity without any external bias. Moreover, the process is very stable without any external bias or magnetic field for any pattern size and features. With respect to a previous report by Hildreth et al., the presence of the stabilizing catalyst that involves the formation of a stable metal-semiconductor alloy and the continuous mesh pattern allow to realize uniform etching of the substrate with uniform depth and shape of the etched structure in the vertical direction.
  • the method Being a MacEtch reaction, the method is a promising low cost technology for producing high aspect ratio nanostructures on large area by surpassing the limits of other gas phase etching techniques at the nanoscale, such as reactive ion etching. Being a gas-solid reaction, it can be used for stiction sensitive applications without requiring additional post etching drying processes.
  • the method has the innovation to use normal air as oxidant gas instead of H 2 O 2 vapor that comes from evaporation of a liquid solution containing water diluted HF and H 2 O 2 . Since H 2 O 2 is the less volatile species in the liquid solution, it is necessary to significantly increase the volume of H 2 O 2 (e.g.
  • the method of the present disclosure maximizes the concentration of HF in the etchant gas with the advantage of extremely high precision of pattern transfer and very high etching rate in the range of 20 ⁇ m/hr.
  • the method has the advantage to avoid the handling of heavily concentrated H 2 O 2 , while normal air is present everywhere and free of charge.
  • the presence of a continuous flow of air helps to diffuse the reactive species through the etched substrate once a very high aspect ratio structure is formed.
  • the continuous flow of air through the etched substrate promotes the supply of reactive species to the metal catalyst allowing to continue the etching for several hours.
  • the continuous flow of air along the surface of the etched substrate promotes the release and the dispersion of reaction byproduct such as water that is detrimental for stiction sensitive nanostructures.
  • the etching is a "dry" process, it can be used for stiction sensitive applications without requiring additional post etching drying processes.
  • Described in reference to Figure 2 is a method to fabricate high aspect ratio patterns in semiconductor substrates, such as diffractive gratings and other diffractive periodic structures in a semiconductor substrate by using the metal assisted chemical etching with a continuous flow of air and hydrofluoric acid.
  • Figures 3 , 4 and 5 describe some examples to realize a system for fabricating photonic devices elements with the method of the present disclosure.
  • the method entails the formation of a stable metal-semiconductor alloy that acts as a stabilizing layer for the metal catalyst between the metal layer and the semiconductor substrate.
  • platinum is used as a metal layer and silicon with native silicon oxide is used as semiconductor substrate
  • the stable metal-semiconductor alloy e.g. Pt silicide, PtSi, Pt 2 Si
  • Pt silicide ensures a robust adhesion of the metal to the Si substrate during MacEtch in conditions of high HF concentration.
  • the method entails an oxidant and an etchant.
  • the oxidant is air and the etchant is HF.
  • the oxidant is air and the etchant is HF evaporated from a water diluted HF solution.
  • an etched semiconductor structure is formed.
  • the etching mechanism is reported in Figure 2D and described in detail below.
  • the O 2 species present in the air diffuses on the patterned metal layer, the metal acts as catalyst for the following cathode reaction: O 2 + 4H + + 4e - ⁇ 2 H 2 O (1)
  • the sample holder lays on a set of four spacers made of teflon that are placed on the border of the container of the liquid solution. This makes the etching chamber open and the air can easily flow in.
  • the system is placed on a bench in an aerated environment under laminar flow that provides clean air.
  • the innovative implementation of the conventional vapor HF tool consists in the realization of the open etching chamber by mean of a set of four spacers between the holder and the liquid solution container.
  • the air flow is implemented by placing the system in air under laminar flow, while the conventional vapor HF tool is usually located in a fume hood with air aspiration.
  • the presence of air flow is relevant to etch very deep semiconductor structures (e.g. trenches deeper than 10 ⁇ m) with very high aspect ratio (e.g. aspect ratio higher than 10:1).
  • the sample holder has an HF-compatible chuck with substrate temperature control and the sample is heated to a temperature in the range from 35 °C to 60 °C.
  • the heating temperature has a relevant role to avoid water condensation and nanostructures stiction.
  • the etching rate of wet MacEtch is reported to increase with temperature, therefore the efficiency of the disclosed method is expected to increase with increasing the reaction temperature.
  • FIG 4 shows another example of system to fabricate photonic devices elements, such as diffractive gratings with the method of the present disclosure.
  • O 2 gas is produced in the liquid solution containing water diluted HF and water diluted H 2 O 2 and a solid platinum piece.
  • the liquid H 2 O 2 is decomposed on the surface of the solid platinum piece immersed in the liquid solution with the generation of O 2 gas as by-product.
  • the O 2 gas forms bubbles in the liquid that are then exploding and releasing O 2 gas.
  • the O 2 gas can diffuse and reach the catalyst layer on top of the sample to be etched.
  • the O 2 gas obtained from the decomposition of H 2 O 2 on the platinum surface increases the O 2 concentration in the air to support the MacEtch.
  • the amount of O 2 gas released by the liquid solution can be varied by selecting a specific volume of water diluted H 2 O 2 to be present in the liquid solution containing the water diluted HF and the water diluted H 2 O 2 .
  • the amount of O 2 gas released by the liquid solution can be varied by selecting a specific area of the solid platinum piece to be immersed in the liquid solution containing the water diluted HF and the water diluted H 2 O 2 .
  • the uniformity of the O 2 gas released by the liquid solution can be varied by selecting a specific shape (e.g.
  • Figure 5 shows another example of system to fabricate photonic devices elements with the method of the present disclosure.
  • the example contains at least two separated and independent gas lines, at least one gas line for an oxidant gas and at least one gas line for an etchant gas, being each gas line in fluid connection to an etching chamber.
  • An additional gas line can provide a non- reactive gas as purging (e.g. nitrogen or argon).
  • the semiconductor substrate and the metal pattern with the stable metal-semiconductor alloy thereon are placed on a sample holder, the holder lays in an enclosed etching chamber, the etching chamber can be eventually evacuated.
  • the sample holder can eventually provide the sample heating.
  • the gas flow in each gas line in fluid connection to the etching chamber can be independently regulated.
  • the proposed etching tool differs from the one by Hu et al. since the present method does not flow oxygen gas through a liquid HF solution.
  • the innovation here disclosed is characterized by the presence of separated gas lines for oxidant and etchant.
  • the etchant gas can be anhydrous HF and the semiconductor substrate with metal pattern thereon is heated during the exposure to the etchant atmosphere in order to minimize the presence of water, being water condensation detrimental for producing high aspect ratio nanostructures.
  • Described in reference to Figures 6 is an example of tuning the size distribution of holes produced by de-wetting of thin Pt film on Si substrate with native silicon oxide layer.
  • the Si substrate with native silicon oxide was cleaned by oxygen plasma, then a Pt film was deposited by electron beam evaporation with a deposition rate of 0.5 nm/min and Pt film thickness in the range of 5 to 20 nm.
  • the substrate with the metal film thereon was annealed in air at temperature in the range of 250 °C to 600 °C to produce the metal film de-wetting.
  • Figures 6A-I shows the SEM images of Pt film morphology at different de-wetting temperature.
  • the metal has bright contrast while the holes show the silicon substrate in a darker grey.
  • the metal layer is patterned in a self-assembly nanostructure, the metal holes have size distribution in the range of few nanometers to hundredth nanometers.
  • the perforated Pt film of Figures 6A-I are examples of self-assembled metal mask for the realization of nanowires by MacEtch.
  • the de-wetting occurs with a progressive increase of film fractures density (250 - 350 °C) and finally the hole formation appeared (400 - 500 °C), followed by a coalescence process of holes expansion (550 - 600 °C).
  • the de-wetting temperature can be used as a tuning parameter for the features size of the Pt pattern, the average hole size increases from few ( ⁇ 400 °C) to tens (450-550 °C) and hundreds (>550 °C) of nanometers.
  • Pt silicide formation has been extensively reported in literature for the annealing temperature in the range of 400 - 600 °C.
  • a silicon oxide layer at the metal-substrate interface is usually a barrier layer for metal silicide formation, but Pt silicide has been reported to form also in presence of a native oxide layer.
  • the formation of a top layer of SiO 2 is possible in case of annealing in oxidizing ambient.
  • the growth of asymmetric holes during de-wetting is observed in all Figures 6 and it is an indication of silicide formation.
  • Nanowires can be used as diffractive optics in speckle based X-ray phase contrast imaging. Nanowires are expected to improve the sensitivity of speckle-based X-ray imaging by producing speckles of smaller size and much better uniformity in comparison to sandpaper or other membranes with feature size in the micron range.
  • a thin Pt film was deposited on Si substrate with native silicon oxide layer, the substrate with the metal film thereon was annealed in air at 550 °C to produce the metal film de-wetting.
  • a scanning electron microscope (SEM) micrograph in plan view is reported in Figure 7A .
  • the substrate with the metal pattern thereon is heated at 55 °C for 10 min and then exposed to a gas phase etchant.
  • the gas phase etchant is produced by using the system of Figure 3 .
  • the oxidant is provided by flowing air.
  • the etchant is evaporated from a liquid solution containing water diluted HF, the HF concentration in the liquid is in the range of 1 to 20 mol/l.
  • the substrate with the metal pattern is held at 2 cm from the liquid surface.
  • the gas phase etchant diffuses through the metal pattern, the silicon substrate behind the metal is etched and the metal pattern sinks into the substrate. Thus, a silicon etched structure is formed. After 10 min of etchant exposure the substrate is clearly etched and the silicon etched structure appear like pillars, as shown in the SEM micrograph in cross section of Figure 7B .
  • Figure 8A reports the etching rate for the system showed in Figure 3 as a function of the heating temperature of the silicon substrate and the metal pattern thereon and the molar concentration of HF in the liquid solution containing water diluted HF.
  • the etching rate has been calculated by measuring the length of nanowires produced in 2 hours in the experimental set up of Figure 3 .
  • the samples are square of 1 ⁇ 1 cm 2 cleaved from a silicon substrate with platinum self-assembled mask by de-wetting, the silicon substrate is N type ⁇ 100> single crystal with resistivity in the range of 0.001 to 0.01 ⁇ cm.
  • the liquid solution has been obtained by adding deionized water to a commercial water diluted HF solution at 50%.
  • the etching rate increases in agreement with previous studies on MacEtch kinetics in liquid.
  • the etching rate has a clear maximum at 40 °C, then it decreases as a function of temperature, indicating that the reaction rate is limited by the HF desorption.
  • the etching rate slightly increases with the temperature but the variation of etching rate is quite small (15%) in the full range of temperature (35 to 55 °C). Indeed, this represents a remarkable stable processing window, where the degradation of HF concentration with time can have a negligible effect on the etching rate.
  • the method of the present disclosure allows to etch nanowires with at least 17 times longer length.
  • the Pt catalyst layer is still visible at the bottom of the SEM image of Figure 8C , it looks flat indicating that it is still stable even after the long etching and exposure to heavily concentrated HF gas.
  • Figure 8 demonstrates the capability of the present invention to etch extremely deep trenches with huge aspect ratio (10000 to 1) in silicon with very high precision.
  • Figure 9 reports the experimental results obtained with the setup of Figure 3 and the use of methanol, isopropanol and ethanol as additive in the liquid solution containing water diluted HF.
  • the samples are square of 1 ⁇ 1 cm 2 cleaved from a silicon substrate with platinum self-assembled mask of Figure 6 , the silicon substrate is N type ⁇ 100> single crystal with resistivity in the range of 0.001 to 0.01 ⁇ cm.
  • the liquid solution has an HF molar concentration in the range of 1 to 20 mol/l, the alcohol volume is in the range of 10 to 20 % of the full liquid solution.
  • Figure 9A shows the etching rate calculated by measuring the length of the nanowires produced at 40 °C in 2 hours with the system of Figure 3 .
  • the etching rate decreases in presence of alcohols as reported in Figure 9A .
  • the etching rate has the highest value for isopropanol.
  • Figure 9B reports the SEM image of nanowires produced by adding isopropanol to the liquid solution containing water diluted HF and heating the substrate with the metal pattern thereon at 40 °C.
  • the liquid condensation causes the nanowires to form large bundles.
  • the alcohol catalyzes the HF reaction by producing water as by-product so the thickness of the condensed layer increases with the alcohol content in the vapor.
  • Figure 9D reports the SEM image of nanowires produced by adding isopropanol to the liquid solution containing water diluted HF and heating the substrate with the metal pattern thereon at 55 °C.
  • the nanowires of Figure 9D have the same length of nanowires in Figure 9C but they appear well separated.
  • the heating temperature is a relevant parameter to avoid water condensation and nanostructures stiction in the method of the present disclosure.
  • the etching proceeds with higher etching rate at the border of the pattern, an example of this effect is visible in Figure 9E .
  • Figure 9F shows the relative variation of the length ( ⁇ L) of the nanowires between the center and the border of the sample as a function of the substrate temperature, the higher the temperature the smaller the ⁇ L. In presence of alcohol the reduction of ⁇ L is even more relevant. Therefore, the etching uniformity can be improved by increasing the heating temperature and in presence of alcohol.
  • a positive photoresist MICROPOSITTM S1805 was used for photolithography, according to a procedure reported elsewhere.
  • PMMA as positive resist was used for electron beam lithography.
  • the resist is exposed to UV or e-beam lithography ( Figure 10B ) and subsequently developed ( Figure 10C ).
  • a short plasma cleaning (10 to 60 s in a standard oxygen RF plasma etching) was used to clean the resist residual, the time was tuned to avoid an excessive thinning of the resist.
  • Pt was used as metal catalyst, Pt was deposited using an electron beam evaporator with a deposition rate of 0.5 nm/min. The Pt thickness was the range of 5 to 20 nm ( Figure 10D ).
  • the metal de-wetting produces nanowires during MacEtch.
  • the impact of etched nanowires on the final pattern can be minimized by tuning the metal film thickness and the annealing temperature in order to have nanowires with section size much smaller than the pattern feature size, such as in the examples of Figure 6 .
  • the MacEtch is performed by exposing the Si substrate and the Pt patterned layer with the stabilizing Pt silicide layer thereon to air and HF during the heating ( Figure 10G ).
  • the metal layer acts as catalyst.
  • the oxidant selectively oxides region of the semiconductor substrate underneath the patterned metal layer and HF selectively removes the oxidized regions ( Figure 10H ).
  • Figure 11 shows some examples of gratings structures obtained by the procedure showed in Figure 10 .
  • the metal layer was patterned by UV photolithography for the examples in Figures 11A and by electron beam lithography for the examples in Figures 11B-D.
  • Figure 11A shows a linear grating with pitch size of 4.8 ⁇ m.
  • the nanowires produced by the Pt de-wetting are visible in the SEM image but they have minimal X-ray absorption.
  • Figure 11B shows a circular grating with pitch size of 1 ⁇ m. Residuals of nanowires are visible in the Si trench due to the catalyst de-wetting.
  • a depth of 29 ⁇ m was realized by heating the sample at 55 °C and exposing for 4 h in the system described in Figure 3 .
  • the resulting aspect ratio is about 80:1.
  • the smoothness of the etched Si lines is visible in the high resolution images of the grating from top ( Figure 11C ) and bottom ( Figure 11D ) views.
  • the etching is very uniform on the whole patterned area as demonstrated by the uniform Moire pattern visible in the SEM image ( Figure 11B ).
  • Figure 12 shows an example of linear grating with pitch size of 1 ⁇ m and silicon width of 300 nm, the metal pattern was produced by electron beam exposure of PMMA resist and Pt deposition.
  • Figure 12A and 12B (B is high magnification detail of A) is a cross section SEM of the bottom of the etched structure by the method of present disclosure as described in Figure 3 .
  • the etching was realized at 55 °C with air and etchant produced by evaporation of a liquid solution containing water diluted HF at a molar concentration in the range of 1-20 mol/l.
  • Figure 12C and 12D (D is high magnification detail of C) is a cross section SEM of the bottom of the etched structure by liquid phase MacEtch, the liquid solution contains water diluted HF in a molar concentration of in the range of 1-5 mol/l and H 2 O 2 in a molar concentration of 0.5-2 mol/l.
  • Figure 12 is meant to show the Si porosity of structures realized by MacEtch in gas phase in comparison to liquid phase for Si N type ⁇ 100> single crystal with resistivity in the range of 0.001-0.01 ⁇ cm.
  • gas phase Fig.12 A-B
  • the etched Si structure has the same contrast of bulk Si (below the catalyst), few nanowires are visible on the catalyst layer.

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US17/635,081 US11881408B2 (en) 2019-08-14 2020-07-28 System and method for fabricating photonic device elements
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