EP3267460A1 - Gleichstromunterbrechungsvorrichtung - Google Patents

Gleichstromunterbrechungsvorrichtung Download PDF

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Publication number
EP3267460A1
EP3267460A1 EP16758816.9A EP16758816A EP3267460A1 EP 3267460 A1 EP3267460 A1 EP 3267460A1 EP 16758816 A EP16758816 A EP 16758816A EP 3267460 A1 EP3267460 A1 EP 3267460A1
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EP
European Patent Office
Prior art keywords
circuit breaker
mechanical
current
breaker
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP16758816.9A
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English (en)
French (fr)
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EP3267460A4 (de
EP3267460B1 (de
Inventor
Yosuke Nakazawa
Ryuta Hasegawa
Naotaka Iio
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Toshiba Corp
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Toshiba Corp
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Publication of EP3267460A1 publication Critical patent/EP3267460A1/de
Publication of EP3267460A4 publication Critical patent/EP3267460A4/de
Application granted granted Critical
Publication of EP3267460B1 publication Critical patent/EP3267460B1/de
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/54Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/54Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere
    • H01H9/541Contacts shunted by semiconductor devices
    • H01H9/542Contacts shunted by static switch means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H33/00High-tension or heavy-current switches with arc-extinguishing or arc-preventing means
    • H01H33/02Details
    • H01H33/59Circuit arrangements not adapted to a particular application of the switch and not otherwise provided for, e.g. for ensuring operation of the switch at a predetermined point in the ac cycle

Definitions

  • Embodiments of the present disclosure relate to a DC breaker that disconnects a fault point in a DC power transmission system.
  • HVDC high-voltage direct current power transmission
  • HVDC can build a system with few power transmission loss at low costs in comparison with conventional AC power transmission systems when applied to long-distance and large power transmission. According to HVDC, however, when a system fault due to lightning strike, etc., occurs, it is difficult to disconnect a fault point. That is because, in the case of AC, a current can be broken at a point where the current traverses zero per a half cycle of 50 Hz or 60 Hz, but in the case of DC, there is no point where the current traverses zero. Hence, even if the contact of a breaker provided in the system is simply disconnected, an arc is produced between the contacts, and the current still flows.
  • a fast-speed breaking has been proposed by applying a semiconductor circuit breaker instead of a mechanical disconnection switch.
  • a semiconductor circuit breaker is connected in series to a power transmission system, a conduction loss may occur, causing a reduction of power transmission efficiency.
  • a DC breaker employing a structure that has the semiconductor circuit breaker connected in parallel with the mechanical circuit breaker has been proposed.
  • An H-bridge circuit including a plurality of switching elements and a capacitor are connected in series to the semiconductor circuit breaker. At the time of a fault, the H-bridge circuit is utilized to perform an output voltage control to guide a current to a parallel circuit, and the semiconductor circuit breaker performs fast-speed current breaking.
  • Patent Document 1 JP 2014-235834 A
  • the semiconductor circuit breaker provided in the parallel circuit since the current passes through only the mechanical disconnection switch at normal times, a conduction loss by the semiconductor circuit breaker can be avoided.
  • the semiconductor circuit breaker provided in the parallel circuit eventually needs to break the fault current which increases along with time, and the semiconductor circuit breaker with a large-current capacity is required.
  • the H-bridge circuit provided in the parallel circuit also needs to be formed by a same semiconductor element which has the large-current capacity as that of the semiconductor circuit breaker, and there is a possibility in an increase of a facility dimension and costs.
  • Embodiments have been made in view of the foregoing technical problems, and an objective is to provide a DC breaker which is capable of reducing a facility dimension and a conduction loss and is highly efficient and low cost, while having a function of breaking a fault current at fast speed.
  • a DC breaker includes:
  • normal time means a state in which a normal current is flowing in a DC power transmission system
  • fault means a state in which an excessive fault current is caused due to a system fault originating from lightning strike, etc.
  • a DC power transmission line which connect two DC power transmission networks A and B are provided.
  • a positive side 100 and a negative side 101 in the power transmission lines, and a DC breaker 1 according to this embodiment is provided at the positive side.
  • a DC breaker 1 in the positive-side power transmission line 100, an example case in which power is transmitted from the DC power transmission network A to the DC power transmission network B is mainly described.
  • the DC breaker 1 includes a mechanical disconnection switch 2 and a mechanical circuit breaker 20 connected in series to the power transmission line 100, a parallel circuit 3 connected in parallel with the mechanical disconnection switch 2 and the mechanical circuit breaker 20, and an H-bridge circuit 5 that connects the power transmission line 100 with the parallel circuit 3.
  • the parallel circuit 3 includes a semiconductor circuit breaker 4 and a reactor 55 connected in series to the semiconductor circuit breaker 4, and an arrester 43 is connected in parallel with only the semiconductor circuit breaker 4.
  • the H-bridge circuit 5 is configured to connect one point of the power transmission line 100 between the mechanical disconnection switch 2 and the mechanical circuit breaker 20, and one point of the parallel circuit 3 between the semiconductor circuit breaker 4 and the reactor 55.
  • a mechanical disconnection switch 2 may be utilized as long as it has a mechanical contact and has an insulation withstand voltage against a DC voltage necessary for disconnecting a fault point with the state the contacts is disconnected.
  • the mechanical disconnection switch 2 may employ a structure in which a rotating contactor is provided between terminals of a circuit, and disconnects the circuit by rotating this rotating contactor so as to contact or be apart from a stationary contactor attached to each terminal.
  • the mechanical disconnection switch 2 is controlled to be in an ON state, that is, a state in which the contacts are in contact with each other in normal time.
  • a current from the DC power transmission network A passes through the mechanical disconnection switch 2, and flows into the DC power transmission network B.
  • a control is performed so as the current flows into the parallel circuit 3, the state is changed to an OFF state when the current flowing through the mechanical disconnection switch 2 becomes substantially zero, and the circuit is disconnected.
  • a mechanical circuit breaker 20 may be utilized as long as it has a mechanical contact and has a capability of breaking a small current by opening the contact.
  • the mechanical circuit breaker 20 may employ a structure in which a rotating contactor is provided between the terminals of a circuit, and break the small current by rotating this rotating contactor rotates so as to contact or be apart from a stationary contactor attached to each terminal.
  • the mechanical circuit breaker 20 is controlled so as to be in an ON state, that is, a state in which contacts are in contact with each other in normal time.
  • the current from the DC power transmission network A passes through the mechanical disconnection switch 2 and the mechanical circuit breaker 20, and flows into the DC power transmission network B.
  • the mechanical circuit breaker 20 includes a current sensor (unillustrated).
  • the current flowing through the mechanical circuit breaker 20 is measured by the current sensor, and is compared with a threshold indicating a fault to detect the fault.
  • a control is performed so as the current flows into the H-bridge circuit 5, and the current flowing through the mechanical circuit breaker 20 becomes substantially zero.
  • the mechanical circuit breaker 20 is changed to the OFF state when the flowing current becomes substantially zero, and the circuit is disconnected.
  • the parallel circuit 3 connected in parallel with the mechanical disconnection switch 2 and the mechanical circuit breaker 20 includes the semiconductor circuit breaker 4.
  • the semiconductor circuit breaker 4 includes a plurality of switching elements 41 connected in series, and a diode 42 is connected in reverse parallel to each of the switching elements 41.
  • the semiconductor circuit breaker 4 in the example in FIG. 1 includes two switching elements 41.
  • Example switching element 41 applied is an element having a self-arc-extinguishing ability, such as an IGBT (Insulated Gate Bipolar Transistor), a bipolar transistor, or an electric field transistor.
  • the current in both directions from the DC power transmission network A to B or from B to A can be flown or broken.
  • the semiconductor circuit breaker 4 changes the state between the ON state which is a conduction state, and the OFF state which is a current breaking state based on an input gate signal. In the conduction state, the current is supplied to the parallel circuit 3 from the DC power transmission system via the semiconductor circuit breaker 4, and in the current breaking state, the current to the parallel circuit 3 from the DC power transmission system is broken.
  • the arrester 43 including a non-linear element that flows a current when voltage of equal to or greater than a certain voltage is applied is connected in parallel with the semiconductor circuit breaker 4.
  • the arrester 43 absorbs a surge voltage, enabling a safe current breaking.
  • the H bridge circuit 5 includes a plurality of H-bridge units 50 connected in series.
  • Each H-bridge unit 50 has two legs 52 having two switching elements 51 connected in series.
  • Each switching element 51 applied has a self-arc-extinguishing ability.
  • a diode is connected in parallel with each switching element 51.
  • These two legs 52 are connected in parallel, and a capacitor 53 is further connected in parallel with the two legs 52.
  • the capacitor 53 is charged by the current flowing through the power transmission line 100 at the time of a normal operation.
  • the reactor 55 is for reducing a current change rate, and is provided so as to enable the H-bridge circuit 5 to control the current.
  • the operation of the DC breaker 1 employing the above structure will be described with reference to FIGs. 2 to 6 separately in a case of the normal time and a case in which a fault occurs.
  • the mechanical disconnection switch 2 and the mechanical circuit breaker 20 are controlled to be in the ON state, while the semiconductor circuit breaker 4 and the H bridge circuit 5 are controlled to be in the OFF state.
  • the current from the DC power transmission network A passes only through the mechanical disconnection switch 2 and the mechanical circuit breaker 20, and flows into the DC power transmission network B, and does not flow into the parallel circuit 3 and the H bridge circuit 5.
  • FIG. 3 is a diagram illustrating the operating state of a simulation execution circuit executed in order to describe the validity of the above DC breaker 1.
  • the simulation execution circuit was connected to the DC breaker 1 illustrated in FIG. 1 in the circuit structure simulating the current transmission network A, and after a DC voltage of 320 kV was applied to this DC breaker 1, a ground fault originating from lightning strike, etc., was caused in the power transmission line 100 of the simulated current transmission network A.
  • (i) indicated by a thick solid line in FIG. 3 indicates the current flowing through the mechanical circuit breaker 20.
  • (ii) indicated by a dashed-dotted line indicates the current flowing through the H bridge circuit 5.
  • (iii) indicated by a dashed-two dotted line indicates the current flowing through the semiconductor circuit breaker 4.
  • a fault current increases along with time when the fault occurs.
  • the DC breaker 1 performs the breaking operations in two stages as a whole. First, at the initial stage in which the fault current is small, the DC breaker performs the breaking operation of the mechanical circuit breaker 20 to commute the fault current to the parallel circuit 3, and at the latter stage in which the fault current is increased, performs the breaking operation of the semiconductor circuit breaker 4. The details will be described below.
  • the current flowing through the mechanical circuit breaker 20 increases as indicated by (i).
  • the current sensor attached to the mechanical circuit breaker 20 detects a current Idc_M flowing through the mechanical circuit breaker 20, and compares the detected current with the preset fault occurrence detection threshold Idc_J.
  • the gate signal to the switching element 41 in the semiconductor circuit breaker 4 of the parallel circuit 3 is changed from the OFF to the ON.
  • an output voltage control is performed on the H-bridge circuit 5. More specifically, an output voltage V_H of the H-bridge circuit 5 is calculated by the following formula, and is output.
  • V _ H G s ⁇ IdcM ⁇ 0 (where G(s) is a control gain, and s is a Laplace operator)
  • G(s) is a control gain, and for example, performs a general proportional integration control.
  • the current Idc_M flowing through the mechanical circuit breaker 20 is continuously controlled to be substantially zero.
  • the output voltage V_H of the H-bridge unit 50 is output variably by performing the pulse width modulation control on the switching element 51 in each of the leg 52.
  • the current Idc_M flowing through the mechanical circuit breaker 20 is continuously controlled to be substantially zero.
  • the mechanical circuit breaker 20 is transitioned to the OFF state. Since the current flowing through the mechanical circuit breaker 20 is substantially zero, even when the contacts are transitioned to the OFF state, unlike the normal DC conduction, an arc is not drawn and the current does not keep flowing. Hence, the current can be broken at fast speed.
  • the output voltage of the H-bridge unit 50 is directly applied to the mechanical circuit breaker 20 which has a conduction resistance of substantially zero, a short-circuit current may flow, and the current control may be disabled.
  • the reactor 55 for reducing the current change rate is provided in the parallel circuit 3 connected to the H-bridge circuit 5. This reactor 55 prevents the output voltage of the H-bridge unit 50 frombeing directly applied to the mechanical circuit breaker 20, enabling a control on the current flowing through the mechanical circuit breaker 20.
  • a change rate dIdc_M/dt of the current Idc_M flowing through the mechanical circuit breaker 20 is expressed as the following formula using an inductance value L of the reactor 55.
  • dIdc _ M / dt V _ H / L
  • the inductance value L is inserted in the above formula by providing the reactor 55 in the parallel circuit 3, the current change rate dIdc_M/dt becomes finite. This enables a control on the current change rate dIdc_M/dt in accordance with the magnitude of the output voltage V_H of the H-bridge unit 50. Accordingly, the output voltage of the H-bridge unit 50 is prevented from being directly applied to the mechanical circuit breaker 20, enabling a current control to make the flowing current Idc_M through the mechanical circuit breaker 20 substantially zero.
  • the current Idc_M flowing through the mechanical circuit breaker 20 is continuously controlled until becoming substantially zero. More specifically, as illustrated in FIG. 4 , the current flowing through the power transmission line 100 passes through the H-bridge circuit 5 without passing through the mechanical circuit breaker 20, and further passes through the parallel circuit 3 connected to the H-bridge circuit 5, and returns to the power transmission line 100. Hence, the current Idc_M flowing through the mechanical circuit breaker 20 becomes substantially zero. In this condition, the mechanical circuit breaker 20 is transitioned to the OFF state. Since the current flowing through the mechanical circuit breaker 20 is substantially zero, even when the contact is transitioned to the OFF state, unlike the normal DC conduction, an arc is not drawn and the current does not keep flowing. Hence, the current can be interrupted at fast speed.
  • the gate signal to the switching element 41 of the semiconductor circuit breaker 4 is changed to OFF from ON, to break the fault current which flows through the parallel circuit 3.
  • the surge voltage produced at this time is absorbed by the arrester 43, and the current breaking is completed.
  • the DC breaker 1 includes the mechanical disconnection switch 2 provided at the power transmission line 100, the mechanical circuit breaker 20 connected in series to the mechanical disconnection switch 2, and the parallel circuit 3 connected in parallel with the mechanical disconnection switch 2 and the mechanical circuit breaker 20.
  • the parallel circuit 3 includes the semiconductor circuit breaker 4 that changes a supply and breaking of the current from the power transmission line 100 to the parallel circuit 3, and the reactor 55 connected in series to the semiconductor circuit breaker 4.
  • the DC breaker 1 is further provided with the H-bridge circuit 5 which connects one point between the mechanical disconnection switch 2 and the mechanical circuit breaker 20 to one point between the semiconductor circuit breaker 4 and the reactor 55.
  • the H-bridge circuit 5 includes the H-bridge units 50 each including the plurality of the switching elements 51 and the capacitor 53. The H-bridge circuit 5 controls the current flowing through the mechanical circuit breaker 20 by the output voltage control.
  • the conduction loss can be reduced, and thus the efficient DC breaker 1 can be provided.
  • the output voltage control using the H-bridge circuits 5 the current is guided to the parallel circuit 3 and the current flowing through the mechanical disconnection switch 2 is set to be the amount enabling a disconnection of the circuit without producing an arc, that is, substantially zero to perform the disconnection of the fault point safely even if the mechanical disconnection switch 2 having no current breaking capability.
  • fast-speed current breaking is enabled by the semiconductor circuit breaker 4 provided in the parallel circuit 3. According to such effect, the DC breaker according to this embodiment contributes to the improvement of the power transmission efficiency, the cost reduction, and the improvement of the reliability in DC power transmission.
  • the H-bridge circuit 5 is provided to connect one point between the mechanical disconnection switch 2 and the mechanical circuit breaker 20 to one point between the semiconductor circuit breaker 4 and the reactor 55.
  • the current flows through the H-bridge circuit 5 only in the initial stage at which the fault current is small when breaking the mechanical circuit breaker 20 is small. That is, the maximum value of the current flowing through the H-bridge circuit 5 is the fault current at a time the mechanical circuit breaker 20 is turned OFF.
  • the fault current which increases when the time has elapsed until the mechanical disconnection switch 2 is turned OFF flows in and through the parallel circuit 3, and the maximum current capacity of the semiconductor switching element 51 configuring the H-bridge circuit 5 can be reduced to a capacity that is remarkably smaller than the maximum current capacity of the switching element 41 configuring the semiconductor circuit breaker 4.
  • the reactor 55 is provided in the parallel circuit 3, the output voltage of the H-bridge circuit 5 is not directly applied to the mechanical circuit breaker 20, enabling a precise current control.
  • the H-bridge circuit 5 includes the plurality of the H-bridge units 50 connected in series. Since the charging and discharging amount can be increased by increasing the number of the capacitors 53 provided in the respective H-bridge units 50, it becomes possible for the DC breaker to cope with a large fault current.
  • a second embodiment will be described with reference to FIG. 7 .
  • the same component as that of the first embodiment will be denoted by the same reference numeral, and the detailed explanation thereof will not be repeated.
  • the DC breaker 1 does not include the H-bridge circuit 5.
  • the parallel circuit 3 connected in parallel with the mechanical disconnection switch 2 and the mechanical circuit breaker 20 includes two semiconductor circuit breakers 4A, 4B connected in series.
  • the semiconductor circuit breaker 4A includes two or more switching elements 41a having a self-arc-extinguishing ability and connected in series, and a diode 42a is connected in reverse parallel with each of the switching element 41a.
  • a diode 42a is connected in reverse parallel with each of the switching element 41a.
  • FIG. 7 an example structure in which three switching elements are connected is illustrated.
  • the semiconductor circuit breaker 4A has a collector terminal connected to the DC-power-transmission-network-A side.
  • the semiconductor circuit breaker 4B includes two or more switching elements 41b having a self-arc-extinguishing ability and connected in series, and a diode 42b is connected in reverse parallel with each of the switching element 41b.
  • FIG. 7 an example structure in which three switching elements are connected is illustrated.
  • the semiconductor circuit breaker 4B has a collector terminal connected to the DC-power-transmission-network-B side. That is, the switching element 41b of the semiconductor circuit breaker 4B has the collector and the emitter in the opposite direction to those of the switching element 41a of the semiconductor circuit breaker 4A.
  • the semiconductor circuit breakers 4A, 4B have respective emitters connected to each other via the reactor 55.
  • the reactor 55 is provided to reduce the current change rate of the parallel circuit 3, but the reactor 55 may be omitted by utilizing a wiring inductance.
  • the reactor 55 is provided between the semiconductor circuit breakers 4A, 4B, but the location where the reactor is provided is not limited to this case.
  • the parallel circuit 3 there is no difference in function even when the reactor is provided next to the DC-power-transmission-network-A side of the semiconductor circuit breaker 4A or next to the DC-power-transmission-network-B side of the semiconductor circuit breaker 4B.
  • a reverse current generation circuit 6A is connected in reverse parallel with one of the switching elements 41a configuring the semiconductor circuit breaker 4A.
  • the reverse current generation circuit 6A includes a switching element 61a, a diode 62a connected in reverse parallel with the switching element 61a, and a capacitor 63a connected in series to the switching element 61a.
  • the collector side of the switching element 41a of the reverse current generation circuit 6A is connected to the emitter side of the switching element 61a of the reverse current generation circuit 6A.
  • the collector side of the reverse current generation circuit 6A is connected to the positive-side terminal of the capacitor 63a.
  • the negative-side terminal of the capacitor 63a is connected to the emitter side of the switching element 41a of the semiconductor circuit breaker 4A.
  • a reverse current generation circuit 6B is connected in reverse parallel with one of the switching elements 41b configuring the semiconductor circuit breaker 4B.
  • the reverse current generation circuit 6B includes a switching element 61b, a diode 62b connected in reverse parallel with the switching element 61b, and a capacitor 63b connected in series to the switching element 61b.
  • the collector side of the switching element 41b of the semiconductor circuit breaker 4B is connected to the emitter side of the switching element 61b of the reverse current generation circuit 6B.
  • the collector side of the reverse current generation circuit 6B is connected to the positive-side terminal of the capacitor 63b.
  • the negative-side terminal of the capacitor 63b is connected to the emitter side of the switching element 41a of the semiconductor circuit breaker 4A. That is, the switching 61b of the reverse current generation circuit 6B is provided to conduct the current in the opposite direction to that of the switching element 61a of the reverse current generation circuit 6A.
  • the switching elements 61a, 61b configuring the reverse current generation circuits 6A, 6B may have a capacity smaller than the maximum current capacity of the switching elements 41a, 41b configuring the semiconductor circuit breakers 4A and 4B.
  • the reverse current generation circuits 6A, 6B are respectively connected in reverse parallel with one of the switching elements 41a, 41b configuring the semiconductor circuit breakers 4A, 4B, those may be connected in reverse parallel with the plurality of the switching elements 41a, 41b. Since the semiconductor circuit breakers 4A, 4B each have three switching elements 41a, 41b in the example illustrated in FIG. 7 , the reverse current generation circuits 6A, 6B may be connected in reverse parallel with the two or the three switching elements 41a, 41b, respectively.
  • the operation of the DC breaker 1 employing the above structure will be explained separately in the case of the normal times and in the case in which a fault occurs.
  • a case in which a DC short-circuit fault is occurred at the DC-power-transmission-network-B side will be described.
  • the mechanical disconnection switch 2 and the mechanical circuit breaker 20 are controlled to be in the ON state, and the semiconductor circuit breakers 4A, 4B, and the reverse current generation circuits 6A, 6B are controlled to be in the OFF state.
  • the current from the DC power transmission network A passes only through the mechanical disconnection switch 2 and the mechanical circuit breaker 20, and flows into the DC power transmission network B, but does not flow into the parallel circuit 3.
  • the switching element 41a of the semiconductor circuit breaker 4A having the collector connected to the DC power-transmission-network-A side is transitioned to the ON state, and the switching element 61b of the reverse current generation circuit 6B connected in reverse parallel with the semiconductor circuit breaker 4B is transitioned to the ON state.
  • the switching element 61b of the reverse current generation circuit 6B is turned OFF.
  • the mechanical disconnection switch 2 is turned OFF.
  • the fault current which increases as time advances flows only through the parallel circuit 3. In this case, by changing the gate signal for the switching element 41a of the semiconductor circuit breaker 4A from ON to OFF, eventually, the fault current is broken.
  • a circulation circuit is formed which passes through the diode 42a of the semiconductor circuit breaker 4A having the collector connected to the DC-power-transmission-network-A side, the mechanical disconnection switch 2, the mechanical circuit breaker 20, the switching element 41b of the semiconductor circuit breaker 4B having the collector connected to the DC-power-transmission-network-B side, and the reactor 55.
  • This circulation circuit superimposes the fault current flowing through the mechanical circuit breaker 20 when the fault occurs to the current in the opposite direction.
  • the current Idc_M flowing through the mechanical circuit breaker 20 is controlled to be substantially zero, and in this condition, the mechanical circuit breaker 20 is transitioned to the OFF state.
  • present disclosure is not limited directly to the above embodiments, and structural components can be modified without departing from the scope of the present disclosure when implemented.
  • Various species of the present disclosure can be made by an appropriate combination of the plurality of the structural components disclosed in the above embodiments. For example, several structural components among all structural components may be omitted.
  • structural components from different embodiments may be combined to carry out the present disclosure.

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  • Driving Mechanisms And Operating Circuits Of Arc-Extinguishing High-Tension Switches (AREA)
  • Keying Circuit Devices (AREA)
EP16758816.9A 2015-03-05 2016-02-24 Gleichstromunterbrechungsvorrichtung Active EP3267460B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015043243A JP6430294B2 (ja) 2015-03-05 2015-03-05 直流遮断装置
PCT/JP2016/055395 WO2016140122A1 (ja) 2015-03-05 2016-02-24 直流遮断装置

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Publication Number Publication Date
EP3267460A1 true EP3267460A1 (de) 2018-01-10
EP3267460A4 EP3267460A4 (de) 2018-08-01
EP3267460B1 EP3267460B1 (de) 2019-06-26

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JP (1) JP6430294B2 (de)
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JP7054601B2 (ja) * 2019-04-23 2022-04-14 東芝三菱電機産業システム株式会社 直流遮断装置
JP7242575B2 (ja) * 2020-01-06 2023-03-20 東芝エネルギーシステムズ株式会社 直流電流遮断装置
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Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54132776A (en) * 1978-04-05 1979-10-16 Hitachi Ltd Dc breaker
JPS55126923A (en) * 1979-03-22 1980-10-01 Tokyo Shibaura Electric Co Dc breaker
JPH0514690Y2 (de) * 1985-06-29 1993-04-19
JPH10126961A (ja) * 1996-10-17 1998-05-15 Fuji Electric Co Ltd 限流装置
EP2907152B1 (de) * 2012-12-19 2016-08-17 Siemens Aktiengesellschaft Vorrichtung zum schalten eines gleichstromes in einem pol eines gleichspannungsnetzes
JP5858943B2 (ja) * 2013-03-06 2016-02-10 三菱電機株式会社 電流遮断装置
JP6109649B2 (ja) * 2013-05-31 2017-04-05 株式会社東芝 直流電流遮断装置

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CN110739167A (zh) * 2019-05-10 2020-01-31 许继集团有限公司 一种直流开关设备
CN110739167B (zh) * 2019-05-10 2023-03-10 许继集团有限公司 一种直流开关设备
CN114365374A (zh) * 2019-12-06 2022-04-15 株式会社Lg新能源 使用断连器的阻断电流装置和方法
CN114365374B (zh) * 2019-12-06 2024-04-19 株式会社Lg新能源 使用断连器的阻断电流装置和方法
EP4016575A1 (de) * 2020-12-15 2022-06-22 ABB Schweiz AG Hybridumschaltungsvorrichtung für elektrische netze
EP4016574A1 (de) * 2020-12-15 2022-06-22 ABB Schweiz AG Hybridumschaltungsvorrichtung für elektrische netze
US11574777B2 (en) 2020-12-15 2023-02-07 Abb Schweiz Ag Hybrid switching apparatus for electric grids
US11705714B2 (en) 2020-12-15 2023-07-18 Abb Schweiz Ag Hybrid switching apparatus for electric grids

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EP3267460B1 (de) 2019-06-26
JP6430294B2 (ja) 2018-11-28
JP2016162713A (ja) 2016-09-05
WO2016140122A1 (ja) 2016-09-09

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