EP3136445B1 - A method for forming apparatus comprising two dimensional material - Google Patents

A method for forming apparatus comprising two dimensional material Download PDF

Info

Publication number
EP3136445B1
EP3136445B1 EP15182390.3A EP15182390A EP3136445B1 EP 3136445 B1 EP3136445 B1 EP 3136445B1 EP 15182390 A EP15182390 A EP 15182390A EP 3136445 B1 EP3136445 B1 EP 3136445B1
Authority
EP
European Patent Office
Prior art keywords
electrodes
polymer
examples
dimensional material
release layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP15182390.3A
Other languages
German (de)
French (fr)
Other versions
EP3136445A1 (en
Inventor
Adam Robinson
Darryl COTTON
Alexander Bessonov
Richard White
Yinglin Liu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Emberion Oy
Original Assignee
Emberion Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Emberion Oy filed Critical Emberion Oy
Priority to EP15182390.3A priority Critical patent/EP3136445B1/en
Priority to US15/754,460 priority patent/US10396180B2/en
Priority to CA2996460A priority patent/CA2996460C/en
Priority to PCT/EP2016/070124 priority patent/WO2017032850A1/en
Priority to KR1020187008316A priority patent/KR102038853B1/en
Priority to JP2018510349A priority patent/JP6518007B2/en
Publication of EP3136445A1 publication Critical patent/EP3136445A1/en
Application granted granted Critical
Publication of EP3136445B1 publication Critical patent/EP3136445B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1606—Graphene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66015—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene
    • H01L29/66037—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66045—Field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/028—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035209—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions comprising a quantum structures
    • H01L31/035218—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions comprising a quantum structures the quantum structure being quantum dots
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/112—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor
    • H01L31/113—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor
    • H01L31/1136—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor the device being a metal-insulator-semiconductor field-effect transistor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403—Cells and electrode assemblies
    • G01N27/414—Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • G01N27/4146—Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS involving nanosized elements, e.g. nanotubes, nanowires
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells

Definitions

  • Examples of the disclosure relate to a method for forming apparatus comprising two dimensional material.
  • they relate to a method for forming electronic apparatus comprising two dimensional material such as graphene.
  • Apparatus comprising two dimensional materials such as graphene are well known.
  • graphene can be provided in devices such as resistive sensors or field effect transistors to enable parameters such as chemicals or light to be detected.
  • graphene field effect transistors can be used as logic elements or other electronic components.
  • Publications EP2752880 and EP2620982 disclose graphene electronic devices and methods for manufacturing such devices More particularly, EP2752880 discloses a method comprising the steps of forming first and second conductive layers over a substrate, forming an intermediate layer of e.g. polymer over said substrate and conductive layers, removing the substrate, and forming a graphene layer on a portion from which the substrate was separated.
  • An object of the present invention is to provide a method which is characterized by what is stated in the independent claim.
  • the preferred embodiments of the invention are disclosed in the dependent claims.
  • a method comprising: forming at least two electrodes on a release layer wherein the at least two electrodes are configured to enable a layer of two dimensional material to be provided between the at least two electrodes; providing mouldable polymer overlaying the at least two electrodes; wherein the at least two electrodes and the mouldable polymer form at least part of a planar surface.
  • the release layer may have a smooth surface to enable a smooth layer of two dimensional material to be provided.
  • the at least two electrodes may be provided in the same plane.
  • the method may comprise providing the two dimensional material overlaying the electrodes after the electrodes have been removed from the release layer.
  • the method may comprise forming a composite polymer substrate comprising the mouldable polymer.
  • the method may also comprise providing hard coating on the composite polymer substrate.
  • the two dimensional material and the at least two electrodes form at least part of a bottom gate field effect transistor.
  • the method may comprise providing a plurality of electrodes and portions of two dimensional materials to form a plurality of field effect transistors wherein at least some the field effect transistors are bottom gate field effect transistors and at least some of the field effect transistors are top gate field effect transistors.
  • the two dimensional material may comprise graphene.
  • the method may comprise activating the two dimensional material.
  • the method may comprise activating the two dimensional material with quantum dots.
  • the mouldable polymer may provide a flexible substrate for the at least two electrodes after the at least two electrodes are removed from the release layer.
  • the mouldable polymer may comprise at least one of, liquid polymer, mouldable polymer foil.
  • an apparatus comprising: at least two electrodes and a layer of two dimensional material wherein the at least two electrodes were formed on a release layer and the at least two electrodes are configured to enable the layer of two dimensional material to be provided between the at least two electrodes; and mouldable polymer overlaying the at least two electrodes; wherein the at least two electrodes and the mouldable polymer form at least part of a planar surface.
  • the release layer may be a smooth surface to enable a smooth layer of two dimensional material to be provided.
  • the at least two electrodes may be provided in the same plane.
  • the two dimensional material may be provided overlaying the electrodes after the electrodes have been removed from the release layer.
  • the apparatus may comprise a polymer substrate comprising the mouldable polymer. In some examples the apparatus may comprise a hard coating on the composite polymer substrate.
  • the two dimensional material may comprise graphene.
  • the two dimensional material may be activated.
  • the two dimensional material may be activated with quantum dots.
  • the mouldable polymer may provide a flexible substrate for the at least two electrodes after the at least two electrodes are removed from the release layer
  • the mouldable polymer may comprise at least one of, liquid polymer, mouldable polymer foil.
  • the Figures illustrate example methods and apparatus.
  • the methods may be used to form apparatus comprising two dimensional material.
  • the apparatus may form electronic components within electronic devices.
  • the apparatus which are formed may be for sensing.
  • the apparatus may be for sensing environmental parameters such as light, temperature, chemicals or other parameters.
  • Fig. 1 illustrates a method according to examples of the disclosure.
  • the method may be used to form apparatus 21 comprising one or more electronic components where the electronic components comprise a two dimensional material such as graphene.
  • the method comprises, at block 11 forming at least two electrodes 23 on a release layer 33.
  • the at least two electrodes 23 are configured to enable a layer of two dimensional material 25 to be provided between the at least two electrodes 23.
  • the method also comprises, at block 13, providing mouldable polymer 27 overlaying the at least two electrodes 23.
  • the at least two electrodes 23 and the mouldable polymer 27 form at least part of a planar surface 29.
  • the electrodes 23 and the two dimensional material 25 may have any configuration which enables an electronic component to be formed.
  • Example methods for forming field effect transistor (FET) devices are illustrated in more detail in Figs. 3A to 9 .
  • Other methods for forming other types of devices may be used in other examples of the disclosure.
  • Fig. 2 illustrates an example apparatus 21 which may be formed using methods such as the method of Fig. 1 .
  • the example apparatus 21 comprises at least two electrodes 23 and a layer of two dimensional material 25.
  • the at least two electrodes 23 were formed on a release layer 33.
  • the at least two electrodes 23 are configured to enable the layer of two dimensional material 25 to be provided between the at least two electrodes 23.
  • the apparatus 21 also comprises mouldable polymer 27 overlaying the electrodes 23.
  • the at least two electrodes 23 and the mouldable polymer 27 form at least part of a planar surface 29.
  • the apparatus 21 comprises two electrodes 23.
  • the layer of two dimensional material 25 may be provided between the two electrodes 23 to form an electronic device such as a resistive sensor. It is to be appreciated that other arrangements of the layer of two dimensional material 25 and the electrodes 23 may be provided in other examples.
  • the apparatus 21 may comprise three electrodes 23 to enable FET devices to be provided.
  • the electrodes 23 may comprise any suitable conductive material.
  • the electrodes 23 may be electrically connected to the two dimensional material 25.
  • the electrodes 23 may be electrically connected to the two dimensional material 25 to enable direct current to flow through the electrodes 23 and the two dimensional material 25.
  • both of the electrodes 23 are provided on the same plane. Forming the electrodes 23 on the same release layer 33 may ensure that the electrodes 23 are provided within the same plane. This reduces the number of step edges in the apparatus 21.
  • the mouldable polymer 27 is provided overlaying the electrodes 23.
  • the mouldable polymer 27 may be deposited overlaying the electrodes on the release layer 33.
  • the mouldable polymer 27 may comprise any polymer material which is fluid enough to embed the electrodes 23. Once the mouldable polymer 27 is provided around the electrodes 23 the mouldable polymer 27 may be cured or otherwise hardened. Once the mouldable polymer 27 has hardened it may form a flexible substrate for the at least two electrodes 23. The mouldable polymer 27 may form a thin flexible substrate.
  • the mouldable polymer 27 may comprise a smooth flat surface.
  • the release layer 33 may comprise a material having a smooth flat surface to ensure that the planar surface 29 is also smooth and flat.
  • the other electronic components of the apparatus 21 such as the layer of two dimensional material 25 or electrical connections to the layer of two dimensional material 25 may be deposited on the planar surface 29.
  • the layer of two dimensional material 25 may comprise a very thin layer of material.
  • the layer of two dimensional material 25 could be an atomic monolayer.
  • the layer of two dimensional material 25 could comprise several atomic monolayers.
  • the layer of two dimensional material 25 could comprise graphene, molybdenum disulphide, boron nitride or any other suitable material.
  • the layer of two dimensional material 25 is provided overlaying at least part of the electrodes 23.
  • the two dimensional material 25 may be provided overlaying the electrodes 23 after the electrodes 23 have been removed from the release layer 33. In other examples the two dimensional material 25 could also be formed or deposited on the release layer 33 along with the electrodes 23.
  • the layer of two dimensional material 25 is provided on the planar surface 29. As a smooth flat surface is provided for the two dimensional material 25 this reduces the amount of discontinuities and/or impurities in the two dimensional material 25 and may provide for improved charge transfer characteristics of the two dimensional material 25.
  • Figs. 3A to 3G illustrate example methods which may be used to form other example apparatus 21.
  • the example method of Figs. 3A to 3G comprises forming a mouldable polymer 27 substrate with a plurality of embedded electrodes 23.
  • the mouldable polymer 27 and the embedded electrodes 23 form a planar surface 29 which can then be used for depositing graphene or any other suitable two dimensional material 25.
  • a release layer 33 is provided on a carrier substrate 31.
  • the carrier substrate 31 may provide a rigid or substantially rigid substrate which may provide support while the electrodes 23 and/or other components of the apparatus 21 are being fabricated on the release layer 33.
  • the carrier substrate 31 may comprise a silicon wafer or any other suitable material.
  • the carrier substrate 31 may be flat or substantially flat.
  • the release layer 33 is provided overlaying the carrier substrate 31.
  • the release layer 33 may comprise a sacrificial layer which may enable the components of the apparatus 21 that are fabricated to be removed from the carrier substrate 31.
  • the material that is used for the release layer 33 may depend on the components that are being fabricated and the material that is being used for those components. In some examples the release layer 33 may comprise copper or any other suitable material.
  • the release layer 33 has a smooth surface 32.
  • the components of the apparatus 21 are formed on the smooth surface 32 of the release layer 33 so that the components of the apparatus 21 form a planar surface 29.
  • the release layer 33 has a surface which is smooth enough to enable a smooth layer of two dimensional material 25 to be provided. In examples not covered by the claims, the two dimensional material 25 could be provided on the release layer 33 or on a planar surface 29 which has been formed on the release layer 33.
  • the electrodes 23 are deposited on the release layer 33.
  • three electrodes 23 are provided.
  • three electrodes 23 forming a source, gate and drain electrode for an FET are provided.
  • Each of the electrodes 23 are provided in the same plane. This reduces the number of step edges in the apparatus 21. It is to be appreciated that other arrangements of electrodes may be used in other examples of the disclosure.
  • the electrodes 23 may comprise any conductive material such as a metal.
  • the electrodes 23 may be deposited using any suitable technique.
  • the electrodes 23 could be formed by photolithography followed by thermal or electron beam evaporation of a metal, or any other suitable process.
  • mouldable polymer 27 is provided overlaying the electrodes 23.
  • the mouldable polymer 27 is deposited on the release layer 33 overlaying the electrodes 23.
  • the mouldable polymer 27 comprises any polymer which will embed the electrodes 23 and form a planar surface 29 against the surface 32 of the release layer 33.
  • the mouldable polymer 27 may comprise a liquid polymer which may be deposited onto the release layer 33 via spin coating, spray coating or any other suitable process.
  • the mouldable polymer 27 may comprise a polymer foil which may be deposited by hot embossing or any other suitable process.
  • Fig. 3C the carrier substrate 31 and release layer 33 are removed.
  • the mouldable polymer 27 may be hardened or cured before the carrier substrate 31 and release layer 33 are removed so that the mouldable polymer 27 provides a substrate for the electrodes 23.
  • the mouldable polymer 27 may provide a flexible substrate for the electrodes 23.
  • the mouldable polymer 27 may enable further components of the apparatus 21 to be fabricated overlaying the electrodes 23.
  • the mouldable polymer 27 and the electrodes 23 form a planar surface 29.
  • the planar surface 29 may be smooth and flat.
  • the planar surface 29 may be a uniform or substantially uniform surface.
  • the other components of the apparatus 21 may be fabricated on the planar surface 29 formed by the mouldable polymer 27 and the electrodes 23.
  • a dielectric 35 is provided on the planar surface 29.
  • the dielectric 35 is provided overlaying the gate electrode 23 and part of the source and drain electrodes 23.
  • the dielectric 35 may comprise any suitable insulating material.
  • the dielectric 35 may comprise aluminum oxide which could be deposited using atomic layer deposition or any other suitable process.
  • the dielectric 35 may be provided in a thin layer.
  • a layer of two dimensional material 25 is deposited on to the planar surface 29.
  • the two dimensional material 25 comprises graphene.
  • the graphene may be deposited on to the planar surface 29 using any suitable technique.
  • the graphene may be formed on a separate substrate and transferred onto the planar surface 29.
  • the graphene may then be patterned using photolithography, plasma etching or any other suitable process.
  • the graphene is provided overlaying the dielectric 35 so that the dielectric 35 forms an insulating barrier between the graphene and the electrodes 23.
  • contacts 37 are provided between the source and drain electrodes 23 and the graphene.
  • the contacts 37 provide a direct current path between the source and drain electrodes 23 and the graphene.
  • the contacts 37 may comprise any conductive material, such as a metal, which may be deposited between the electrodes 23 and the graphene.
  • the contacts 37 may be deposited using photolithography, metal evaporation or any other suitable process.
  • the graphene is activated.
  • the activation of the graphene may enable the FET to be used as a sensor.
  • the material that is used to activate the graphene may depend on the parameters that the FET is intended to detect.
  • the graphene is activated with quantum dots 39.
  • the quantum dots 39 may be deposited using any suitable technique such as spin coating, inkjet printing, wet transfer or any other suitable process.
  • the dielectric 35 is formed on the planar surface 29 after the electrode 23 and the mouldable polymer 27 have been removed from the release layer 33.
  • the dielectric 35 could be formed on the release layer 33.
  • the mouldable polymer 27 would then be deposited overlaying both the dielectric 35 and the electrodes 23. This would enable the planar surface 29 to be formed from the mouldable polymer 27, the electrodes 23 and the dielectric 35.
  • the graphene, or other two dimensional material 25, could then be deposited on the planar surface 29.
  • This method not forming part of the invention, avoids the introduction of any step edges in the connection between the electrodes 23 and the graphene. This method may be useful in apparatus 21 where the graphene layer is larger than the dielectric 35 layer.
  • Figs. 4A to 4K illustrate an example method which may be used to form other example apparatus 21.
  • the example method of Figs. 4A to 4K may be used to form apparatus 21 comprising bottom gate FET devices.
  • a carrier substrate 31 and a release layer 33 are provided.
  • the carrier substrate 31 may comprise silicon, as described above, or any other suitable material.
  • the release layer 33 is provided overlaying the carrier substrate 31.
  • the release layer 33 may comprise a sacrificial layer with a smooth surface which may also be as described above.
  • the release layer 33 has a smooth surface 32 on which components of an apparatus 21 can be fabricated.
  • a plurality of electrodes 23 are provided.
  • the plurality of electrodes 23 form the source, gate and drain electrodes 23 of a bottom gate FET device.
  • the plurality of electrodes 23 are deposited on the smooth surface 32 of the release layer. As the electrodes 23 are formed on the same smooth surface 32 all of the electrodes 23 are provided in the same plane. This reduces the number of step edges in the apparatus 21.
  • a composite polymer substrate 53 is formed to support the plurality of electrodes 23.
  • the composite polymer substrate 53 supports the electrodes 23 after they have been removed from the release layer 33.
  • the composite polymer substrate 53 comprises two different polymers. It is to be appreciated that in some examples the composite polymer substrate 53 could comprise more than two different polymers. The at least two polymers are laminated together to form a single polymer substrate 53.
  • the composite polymer substrate 53 is formed from a mouldable polymer 27 and a polymer foil 51.
  • the mouldable polymer 27 may comprise any suitable material which will embed the electrodes 23 and form a planar surface 29 against the surface 32 of the release layer 33.
  • the mouldable polymer 27 may comprise a thermosetting or ultra violet (UV) curable resin. This may enable the mouldable polymer 27 to be solidified after it has been deposited over the electrodes 23.
  • UV ultra violet
  • the mouldable polymer 27 may comprise a polymer resin which has a viscosity which enables the mouldable polymer 27 to embed the electrodes 23. In some examples the mouldable polymer 27 may have a viscosity of between 5 cP to 500 cP.
  • the mouldable polymer 27 may comprise a material which enables certain parameters to pass through.
  • the apparatus 21 may be used as a photodetector.
  • the mouldable polymer 27 may be transparent or at least partially transparent to visible light. It is to be appreciated that the apparatus 21 could be configured to sense other parameters in other examples of the disclosure.
  • the mouldable polymer 27 can be deposited on either the release layer 33 or the polymer foil 51 using any suitable technique.
  • the mouldable polymer 27 may be deposited using spin coating, bar coating, slot-die coating or any other suitable process.
  • the moldable polymer 27 may form a thin layer.
  • the thickness of the layer of moldable polymer 27 may be controlled by the thickness of the layer or moldable polymer 27 which is applied, the pressure applied to the apparatus 21 and the rheological properties of the moldable polymer 27. In some examples the thickness of the layer of moldable polymer 27 could be between 50nm and 10 ⁇ m.
  • the mouldable polymer 27 is provided directly overlaying the electrodes.
  • the mouldable polymer 27 is provided on the release layer 33 overlaying the electrodes 23.
  • the polymer foil 51 is provided overlaying the mouldable polymer 27.
  • the mouldable polymer 27 is provided between the polymer foil 51 and the release layer 33 so that the polymer foil 51 does not directly contact the surface 32 of the release layer 33.
  • the polymer foil 51 may comprise a solid polymer.
  • the polymer foil 51 may comprise a flexible polymer which may deform when a user applies a force to the apparatus.
  • the polymer foil 51 may comprise a polymer material which enables certain parameters to pass through.
  • the apparatus 21 is used as a photodetector the polymer foil 51 may be arranged to be transparent to visible light.
  • the polymer foil 51 may comprise a material such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES) or any other suitable material. Such materials may enable 90% or more of incident visibly light to pass through the polymer foil 51.
  • the polymer foil 51 may have a greater thickness than the layer of mouldable polymer 27. In some examples the thickness of the polymer foil 51 could be between 10 ⁇ m to 1000 ⁇ m.
  • Fig. 4C shows two different examples of depositing the mouldable polymer 27 and the polymer foil 31.
  • the mouldable polymer 27 and the polymer foil 51 are deposited separately.
  • the mouldable polymer 27 is provided overlaying the electrodes 23 and then the polymer foil 51 is provided overlaying the mouldable polymer 27.
  • the mouldable polymer 27 and the polymer foil 51 are deposited at the same time.
  • the mouldable polymer 27 may be adhered to the underside of the polymer foil 51. Both the mouldable polymer 27 and the polymer foil 51 are then provided overlaying the electrodes 23.
  • the surfaces of different layers within the composite polymer substrate 53 may be treated to improve the adhesion between the respective layers.
  • surface activation techniques such as plasma, corona treatments, ultraviolet/ozone (UVO) or any other suitable process could be used.
  • UVO ultraviolet/ozone
  • adhesion promoters such as primers, self-assembled monolayers (SAM), copolymers or any other suitable material may be used.
  • the composite polymer substrate 53 is cured.
  • the composite polymer substrate 53 is cured using UV light.
  • the mouldable polymer 27 may comprise a thermosetting resin.
  • the curing may comprise heating the mouldable polymer 27. The temperature to which the mouldable polymer 27 is heated may depend on the material which is used. In some examples the mouldable polymer 27 may be heated to a temperature of around 200°C.
  • the cured moldable polymer 27 may have a low coefficient of thermal expansion. This may prevent deformation of the apparatus 21 and ensure that the electrodes 23 remain within the same plane.
  • the cured moldable polymer 27 and the polymer foil 51 may have similar mechanical properties to reduce stresses and deformations within an apparatus 21.
  • the elastic modulus and/or coefficient of thermal expansion of the cured moldable polymer 27 and the polymer foil 51 may be similar.
  • Fig. 4D shows two different examples of the composite polymer substrate 53.
  • the polymer foil 51 has no additional coating.
  • a hard coating 55 is provided on the polymer foil 51.
  • the hard coating 55 is provided on two sides of the polymer foil 51. In other examples the hard coating 55 might only be provided on one side.
  • the hard coating 55 may be configured to provide a barrier layer to prevent contamination of the electronic components of the apparatus 21.
  • the hard coating may prevent the ingress of oxygen, moisture or other contaminants.
  • the hard coating 55 may be configured to improve the absorption of a parameter which the apparatus 21 is intended to detect.
  • the hard coating 55 may comprise an antireflective coating which may improve the penetration of light into the apparatus 21.
  • the hard coating 55 may comprise a nanoscale coating.
  • the nanoscale coating may comprise a material such as SiO x , SiN x , AlO x , AlN x .
  • the hard coating 55 may be deposited on the polymer foil 51 using any suitable technique. For instance the hard coating 55 could be deposited by atomic layer deposition, plasma enhanced chemical vapour deposition or any other suitable process.
  • Fig. 4E the carrier substrate 31 and release layer 33 are removed so that the mouldable polymer 27 and the polymer foil 51 provide a composite substrate 53 for the electrodes 23.
  • the mouldable polymer 27 and the electrodes 23 form a planar surface 29.
  • the planar surface 29 may be smooth and flat.
  • the planar surface 29 may be a uniform or substantially uniform surface.
  • the other components of the apparatus 21 may be fabricated on the planar surface 29 formed by the mouldable polymer 27 and the electrodes 23.
  • a dielectric 35 is provided on the planar surface 29.
  • the dielectric 35 is provided overlaying the electrodes 23.
  • the dielectric 35 may comprise any suitable insulating material.
  • the dielectric 35 may comprise an inorganic oxide or nitride which could be deposited using atomic layer deposition.
  • the dielectric 35 may comprise an organic polymer which could be deposited by a coating or printing method.
  • the dielectric 35 may be provided in a thin layer.
  • a layer of two dimensional material 25 is deposited on to the planar surface 29.
  • the two dimensional material 25 comprises graphene.
  • the graphene may be deposited on to the planar surface 29 using any suitable technique.
  • the graphene may comprise a monolayer which may be formed by chemical vapor deposition on a metal foil or any other suitable technique.
  • the graphene monolayer may then be transferred onto the planar surface 29 using a transfer substrate, such as a poly(methyl methacrylate) (PMMA) substrate, or any other suitable process.
  • PMMA poly(methyl methacrylate)
  • the graphene is provided overlaying the dielectric 35 so that the dielectric 35 forms an insulating barrier between the graphene and the embedded electrodes 23.
  • Both the dielectric 35 and the graphene are formed on the planar surface 29 formed by the mouldable polymer 27 and the embedded electrodes 23. This allows the dielectric 35 and the graphene to be formed without any steps or discontinuities.
  • the graphene and the dielectric 35 are patterned.
  • the graphene and the dielectric 35 may be patterned into any suitable shape.
  • the graphene and the dielectric 35 may be patterned to enable an FET to be formed.
  • the graphene and the dielectric 35 are patterned so that at least part of the source and drain electrodes 23 are uncovered.
  • contacts 37 are provided between the source and drain electrodes 23 and the graphene.
  • the contacts 37 provide a direct current path between the source and drain electrodes 23 and the graphene.
  • the contacts 37 may comprise any conductive material, such as a metal, which may be deposited between the electrodes 23 and the graphene.
  • the contacts 37 may be deposited using photolithography, metal evaporation or any other suitable process.
  • the graphene is activated.
  • the activation of the graphene may enable the FET to be used as a sensor.
  • the material that is used to activate the graphene may depend on the parameters that the FET is intended to detect.
  • the graphene is activated with quantum dots 39.
  • the quantum dots 39 may be deposited using any suitable technique such as spin coating, inkjet printing, wet transfer or any other suitable process.
  • an encapsulating layer is provided on the planer surface 29.
  • the encapsulating layer 57 is provided overlaying the graphene and the contacts 37.
  • the encapsulating layer 57 may protect the apparatus 21 from contaminants such as moisture, oxygen or other chemicals.
  • the encapsulating layer 57 may be transparent to the parameter that the apparatus 21 is intended to detect. For instance, where the apparatus 21 is arranged to detect visible light the encapsulating layer 57 may be transparent to visible light.
  • FIG. 4A to 4K enable an apparatus 21 comprising a bottom gate GFET to be formed.
  • FIG. 5 illustrates an example apparatus 21 which has been formed by the method of Fig. 4A to 4K .
  • the bottom gate GFET graphene field effect transistor
  • the apparatus 21 is configured so that photons 61 which are incident on the apparatus 21 can pass through the encapsulating layer 57 and/or the polymer foil 51 and may be incident on the GFET.
  • the composite polymer substrate 53 may be arranged to act as a light filter.
  • the composite polymer substrate 53 may comprise one or more polymer layers which is transparent to light in a first range of wavelengths but blocks light outside of the first range of wavelengths.
  • Examples of the disclosure provide methods of forming apparatus 21 comprising two or more coplanar electrodes 23 and a channel of two dimensional material 25. Having at least the two electrodes 23 in the same plane reduces the number of steps or other discontinuities in the two dimensional material 25 which reduces the number of defects within the two dimensional material 25. Reducing the number of defects within the two dimensional material 25 increases carrier mobility within the channel of two dimensional material 25 and provides for an improved apparatus 21.
  • Examples of the disclosure also provide smooth flat surfaces for the deposition of graphene or other two dimensional material 25.
  • Having a smooth flat surface reduces a number of factors which can reduce the carrier mobility in the two dimensional material such as defects in the two dimensional material 25, contamination of the two dimensional material 25, charge concentrations in the substrate supporting the two dimensional material 25, water or other contaminants trapped between the two dimensional material 25 and the substrate and other similar factors.
  • Having a smooth flat surface for the deposition of graphene or other two dimensional material 25 also allows for good contact between the two dimensional material 25 and dielectric 35 or electrode 23.
  • the embedding of components such as electrodes 23, two dimensional material 25 and dielectric 35 can be used to control the position of the components relative to the neutral plane.
  • the apparatus 21 can be very thin the components of the apparatus 21 can be positioned very close to the neutral axis of the apparatus 21. This may provide for a more resilient apparatus 21 and may enable strain sensitive components to be protected when the apparatus 21 is bent or otherwise deformed. This may also enable the apparatus 21 to be bent to a higher degree of curvature.
  • Examples of the disclosure which use a composite polymer substrate 53 may provide for improved transparency to parameters such as visible light.
  • the polymer foil 51 may comprise a material which is transparent to a parameter which is to be detected by the apparatus 21. This allows for both transparency and mechanical flexibility.
  • a composite polymer substrate 53 enables different polymers to be used for different apparatus 21. This allows the polymers to be chosen to address the requirements of the apparatus 21 that is being formed and/or the parameters that the apparatus 21 is intended to detect.
  • the methods of the disclosure may enable large numbers of apparatus 21 to be produced at low costs.
  • the method may be fast as processes such as curing may only take several seconds to be completed.
  • the method may avoid the use of high temperatures which could damage sensitive components.
  • the thermosetting resins may be set at temperatures of 200°C which may be low enough to avoid damaging other components of the apparatus 21.
  • Coupled means operationally coupled. Any number of intervening components may be provided including no intervening components.
  • example or “for example” or “may” in the text denotes, whether explicitly stated or not, that such features or functions are present in at least the described example, whether described as an example or not, and that they can be, but are not necessarily, present in some of or all other examples.
  • example “for example” or “may” refers to a particular instance in a class of examples.
  • a property of the instance can be a property of only that instance or a property of the class or a property of a subclass of the class that includes some but not all of the instances in the class. It is therefore implicitly disclosed that a features described with reference to one example but not with reference to another example, can where possible be used in that other example but does not necessarily have to be used in that other example.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Electromagnetism (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Nanotechnology (AREA)
  • Molecular Biology (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Thin Film Transistor (AREA)

Description

    TECHNOLOGICAL FIELD
  • Examples of the disclosure relate to a method for forming apparatus comprising two dimensional material. In particular, they relate to a method for forming electronic apparatus comprising two dimensional material such as graphene.
    • BACKGROUND
  • Apparatus comprising two dimensional materials such as graphene are well known. For instance graphene can be provided in devices such as resistive sensors or field effect transistors to enable parameters such as chemicals or light to be detected. In other devices graphene field effect transistors can be used as logic elements or other electronic components. Publications EP2752880 and EP2620982 disclose graphene electronic devices and methods for manufacturing such devices More particularly, EP2752880 discloses a method comprising the steps of forming first and second conductive layers over a substrate, forming an intermediate layer of e.g. polymer over said substrate and conductive layers, removing the substrate, and forming a graphene layer on a portion from which the substrate was separated.
  • It is useful to provide improved methods of forming such devices.
    • BRIEF SUMMARY
  • An object of the present invention is to provide a method which is characterized by what is stated in the independent claim. The preferred embodiments of the invention are disclosed in the dependent claims.
    • BRIEF DESCRIPTION
  • For a better understanding of various examples that are useful for understanding the detailed description, reference will now be made by way of example only to the accompanying drawings in which:
    • Fig. 1 illustrates a method;
    • Fig. 2 illustrates an apparatus not covered by the claims but useful for understanding the invention;
    • Figs. 3A to 3G illustrate an example method according to the invention;
    • Figs. 4A to 4K illustrate an example method according to the invention;
    • Fig. 5 illustrates an apparatus that can be manufactured according to the invention.
    DETAILED DESCRIPTION
  • According to various, but not necessarily all, examples of the disclosure there may be provided a method comprising: forming at least two electrodes on a release layer wherein the at least two electrodes are configured to enable a layer of two dimensional material to be provided between the at least two electrodes; providing mouldable polymer overlaying the at least two electrodes; wherein the at least two electrodes and the mouldable polymer form at least part of a planar surface.
  • In some examples the release layer may have a smooth surface to enable a smooth layer of two dimensional material to be provided.
  • In some examples the at least two electrodes may be provided in the same plane.
  • In some examples the method may comprise providing the two dimensional material overlaying the electrodes after the electrodes have been removed from the release layer.
  • In some examples the method may comprise forming a composite polymer substrate comprising the mouldable polymer. The method may also comprise providing hard coating on the composite polymer substrate.
  • The two dimensional material and the at least two electrodes form at least part of a bottom gate field effect transistor.
  • In some examples the method may comprise providing a plurality of electrodes and portions of two dimensional materials to form a plurality of field effect transistors wherein at least some the field effect transistors are bottom gate field effect transistors and at least some of the field effect transistors are top gate field effect transistors.
  • In some examples the two dimensional material may comprise graphene.
  • In some examples the method may comprise activating the two dimensional material.
  • In some examples the method may comprise activating the two dimensional material with quantum dots.
  • In some examples the mouldable polymer may provide a flexible substrate for the at least two electrodes after the at least two electrodes are removed from the release layer.
  • In some examples the mouldable polymer may comprise at least one of, liquid polymer, mouldable polymer foil.
  • According to various, but not necessarily all, examples of the disclosure there may be provided an apparatus formed by any of the methods described above.
  • According to various, but not necessarily all, examples of the disclosure there may be provided an apparatus comprising: at least two electrodes and a layer of two dimensional material wherein the at least two electrodes were formed on a release layer and the at least two electrodes are configured to enable the layer of two dimensional material to be provided between the at least two electrodes; and mouldable polymer overlaying the at least two electrodes; wherein the at least two electrodes and the mouldable polymer form at least part of a planar surface.
  • In some examples the release layer may be a smooth surface to enable a smooth layer of two dimensional material to be provided.
  • In some examples the at least two electrodes may be provided in the same plane.
  • In some examples the two dimensional material may be provided overlaying the electrodes after the electrodes have been removed from the release layer.
  • In some examples the apparatus may comprise a polymer substrate comprising the mouldable polymer. In some examples the apparatus may comprise a hard coating on the composite polymer substrate.
  • In some examples the two dimensional material may comprise graphene.
  • In some examples the two dimensional material may be activated.
  • In some examples the two dimensional material may be activated with quantum dots.
  • In some examples the mouldable polymer may provide a flexible substrate for the at least two electrodes after the at least two electrodes are removed from the release layer
  • In some examples the mouldable polymer may comprise at least one of, liquid polymer, mouldable polymer foil.
  • According to various, but not necessarily all, examples of the disclosure there is provided examples as claimed in the appended claims.
  • The Figures illustrate example methods and apparatus. The methods may be used to form apparatus comprising two dimensional material. The apparatus may form electronic components within electronic devices. In some examples the apparatus which are formed may be for sensing. The apparatus may be for sensing environmental parameters such as light, temperature, chemicals or other parameters.
  • Fig. 1 illustrates a method according to examples of the disclosure. The method may be used to form apparatus 21 comprising one or more electronic components where the electronic components comprise a two dimensional material such as graphene.
  • The method comprises, at block 11 forming at least two electrodes 23 on a release layer 33. The at least two electrodes 23 are configured to enable a layer of two dimensional material 25 to be provided between the at least two electrodes 23. The method also comprises, at block 13, providing mouldable polymer 27 overlaying the at least two electrodes 23. The at least two electrodes 23 and the mouldable polymer 27 form at least part of a planar surface 29.
  • It is to be appreciated that the electrodes 23 and the two dimensional material 25 may have any configuration which enables an electronic component to be formed. Example methods for forming field effect transistor (FET) devices are illustrated in more detail in Figs. 3A to 9. Other methods for forming other types of devices may be used in other examples of the disclosure.
  • Fig. 2 illustrates an example apparatus 21 which may be formed using methods such as the method of Fig. 1. The example apparatus 21 comprises at least two electrodes 23 and a layer of two dimensional material 25. The at least two electrodes 23 were formed on a release layer 33. The at least two electrodes 23 are configured to enable the layer of two dimensional material 25 to be provided between the at least two electrodes 23. The apparatus 21 also comprises mouldable polymer 27 overlaying the electrodes 23. The at least two electrodes 23 and the mouldable polymer 27 form at least part of a planar surface 29.
  • In the example of Fig. 2 the apparatus 21 comprises two electrodes 23. In this example the layer of two dimensional material 25 may be provided between the two electrodes 23 to form an electronic device such as a resistive sensor. It is to be appreciated that other arrangements of the layer of two dimensional material 25 and the electrodes 23 may be provided in other examples. For instance, in some examples the apparatus 21 may comprise three electrodes 23 to enable FET devices to be provided.
  • The electrodes 23 may comprise any suitable conductive material. The electrodes 23 may be electrically connected to the two dimensional material 25. The electrodes 23 may be electrically connected to the two dimensional material 25 to enable direct current to flow through the electrodes 23 and the two dimensional material 25.
  • In the example of Fig. 2 both of the electrodes 23 are provided on the same plane. Forming the electrodes 23 on the same release layer 33 may ensure that the electrodes 23 are provided within the same plane. This reduces the number of step edges in the apparatus 21.
  • The mouldable polymer 27 is provided overlaying the electrodes 23. The mouldable polymer 27 may be deposited overlaying the electrodes on the release layer 33. The mouldable polymer 27 may comprise any polymer material which is fluid enough to embed the electrodes 23. Once the mouldable polymer 27 is provided around the electrodes 23 the mouldable polymer 27 may be cured or otherwise hardened. Once the mouldable polymer 27 has hardened it may form a flexible substrate for the at least two electrodes 23. The mouldable polymer 27 may form a thin flexible substrate.
  • Depositing the mouldable polymer 27 on the same release layer as the electrodes 23 enables the mouldable polymer 27 and the electrodes 23 to form at least part of a planar surface 29. The planar surface 29 may comprise a smooth flat surface. The release layer 33 may comprise a material having a smooth flat surface to ensure that the planar surface 29 is also smooth and flat. The other electronic components of the apparatus 21 such as the layer of two dimensional material 25 or electrical connections to the layer of two dimensional material 25 may be deposited on the planar surface 29.
  • The layer of two dimensional material 25 may comprise a very thin layer of material. In some examples the layer of two dimensional material 25 could be an atomic monolayer. In some examples the layer of two dimensional material 25 could comprise several atomic monolayers. The layer of two dimensional material 25 could comprise graphene, molybdenum disulphide, boron nitride or any other suitable material.
  • In the example apparatus 21 of Fig. 2 the layer of two dimensional material 25 is provided overlaying at least part of the electrodes 23. The two dimensional material 25 may be provided overlaying the electrodes 23 after the electrodes 23 have been removed from the release layer 33. In other examples the two dimensional material 25 could also be formed or deposited on the release layer 33 along with the electrodes 23.
  • The layer of two dimensional material 25 is provided on the planar surface 29. As a smooth flat surface is provided for the two dimensional material 25 this reduces the amount of discontinuities and/or impurities in the two dimensional material 25 and may provide for improved charge transfer characteristics of the two dimensional material 25.
  • Figs. 3A to 3G illustrate example methods which may be used to form other example apparatus 21. The example method of Figs. 3A to 3G comprises forming a mouldable polymer 27 substrate with a plurality of embedded electrodes 23. The mouldable polymer 27 and the embedded electrodes 23 form a planar surface 29 which can then be used for depositing graphene or any other suitable two dimensional material 25.
  • In Fig. 3A a release layer 33 is provided on a carrier substrate 31. In the example of Fig. 3A the carrier substrate 31 may provide a rigid or substantially rigid substrate which may provide support while the electrodes 23 and/or other components of the apparatus 21 are being fabricated on the release layer 33. The carrier substrate 31 may comprise a silicon wafer or any other suitable material.
  • The carrier substrate 31 may be flat or substantially flat.
  • The release layer 33 is provided overlaying the carrier substrate 31. The release layer 33 may comprise a sacrificial layer which may enable the components of the apparatus 21 that are fabricated to be removed from the carrier substrate 31. The material that is used for the release layer 33 may depend on the components that are being fabricated and the material that is being used for those components. In some examples the release layer 33 may comprise copper or any other suitable material.
  • The release layer 33 has a smooth surface 32. The components of the apparatus 21 are formed on the smooth surface 32 of the release layer 33 so that the components of the apparatus 21 form a planar surface 29. The release layer 33 has a surface which is smooth enough to enable a smooth layer of two dimensional material 25 to be provided. In examples not covered by the claims, the two dimensional material 25 could be provided on the release layer 33 or on a planar surface 29 which has been formed on the release layer 33.
  • In Fig. 3A the electrodes 23 are deposited on the release layer 33. In the example of Fig. 3A three electrodes 23 are provided. According to the invention, three electrodes 23 forming a source, gate and drain electrode for an FET are provided. Each of the electrodes 23 are provided in the same plane. This reduces the number of step edges in the apparatus 21. It is to be appreciated that other arrangements of electrodes may be used in other examples of the disclosure.
  • The electrodes 23 may comprise any conductive material such as a metal.
  • The electrodes 23 may be deposited using any suitable technique. For instance the electrodes 23 could be formed by photolithography followed by thermal or electron beam evaporation of a metal, or any other suitable process.
  • In Fig. 3B mouldable polymer 27 is provided overlaying the electrodes 23. The mouldable polymer 27 is deposited on the release layer 33 overlaying the electrodes 23. The mouldable polymer 27 comprises any polymer which will embed the electrodes 23 and form a planar surface 29 against the surface 32 of the release layer 33.
  • In some examples the mouldable polymer 27 may comprise a liquid polymer which may be deposited onto the release layer 33 via spin coating, spray coating or any other suitable process. In other examples the mouldable polymer 27 may comprise a polymer foil which may be deposited by hot embossing or any other suitable process.
  • In Fig. 3C the carrier substrate 31 and release layer 33 are removed. The mouldable polymer 27 may be hardened or cured before the carrier substrate 31 and release layer 33 are removed so that the mouldable polymer 27 provides a substrate for the electrodes 23. The mouldable polymer 27 may provide a flexible substrate for the electrodes 23. The mouldable polymer 27 may enable further components of the apparatus 21 to be fabricated overlaying the electrodes 23.
  • The mouldable polymer 27 and the electrodes 23 form a planar surface 29. The planar surface 29 may be smooth and flat. The planar surface 29 may be a uniform or substantially uniform surface.
  • The other components of the apparatus 21 may be fabricated on the planar surface 29 formed by the mouldable polymer 27 and the electrodes 23. In Fig. 3D a dielectric 35 is provided on the planar surface 29. In the example of Fig. 3D the dielectric 35 is provided overlaying the gate electrode 23 and part of the source and drain electrodes 23.
  • The dielectric 35 may comprise any suitable insulating material. In some examples the dielectric 35 may comprise aluminum oxide which could be deposited using atomic layer deposition or any other suitable process. The dielectric 35 may be provided in a thin layer.
  • In Fig. 3E a layer of two dimensional material 25 is deposited on to the planar surface 29. In the example of Figs. 3A to 3G the two dimensional material 25 comprises graphene.
  • The graphene may be deposited on to the planar surface 29 using any suitable technique. In some examples the graphene may be formed on a separate substrate and transferred onto the planar surface 29. The graphene may then be patterned using photolithography, plasma etching or any other suitable process.
  • In the example of Fig. 3E the graphene is provided overlaying the dielectric 35 so that the dielectric 35 forms an insulating barrier between the graphene and the electrodes 23.
  • In Fig. 3F contacts 37 are provided between the source and drain electrodes 23 and the graphene. The contacts 37 provide a direct current path between the source and drain electrodes 23 and the graphene. The contacts 37 may comprise any conductive material, such as a metal, which may be deposited between the electrodes 23 and the graphene. The contacts 37 may be deposited using photolithography, metal evaporation or any other suitable process.
  • In Fig. 3G the graphene is activated. The activation of the graphene may enable the FET to be used as a sensor. The material that is used to activate the graphene may depend on the parameters that the FET is intended to detect. In the example of Fig. 3G the graphene is activated with quantum dots 39. The quantum dots 39 may be deposited using any suitable technique such as spin coating, inkjet printing, wet transfer or any other suitable process.
  • It is to be appreciated that variations of the method of Figs. 3A to 3G may be made in other examples not forming part of the invention. For instance, in the examples of Figs. 3A to 3G the dielectric 35 is formed on the planar surface 29 after the electrode 23 and the mouldable polymer 27 have been removed from the release layer 33. In other examples not forming part of the invention the dielectric 35 could be formed on the release layer 33. In such examples the mouldable polymer 27 would then be deposited overlaying both the dielectric 35 and the electrodes 23. This would enable the planar surface 29 to be formed from the mouldable polymer 27, the electrodes 23 and the dielectric 35. The graphene, or other two dimensional material 25, could then be deposited on the planar surface 29. This method, not forming part of the invention, avoids the introduction of any step edges in the connection between the electrodes 23 and the graphene. This method may be useful in apparatus 21 where the graphene layer is larger than the dielectric 35 layer.
  • Figs. 4A to 4K illustrate an example method which may be used to form other example apparatus 21. The example method of Figs. 4A to 4K may be used to form apparatus 21 comprising bottom gate FET devices.
  • In Fig. 4A a carrier substrate 31 and a release layer 33 are provided. The carrier substrate 31 may comprise silicon, as described above, or any other suitable material. The release layer 33 is provided overlaying the carrier substrate 31. The release layer 33 may comprise a sacrificial layer with a smooth surface which may also be as described above. The release layer 33 has a smooth surface 32 on which components of an apparatus 21 can be fabricated.
  • In Fig. 4B a plurality of electrodes 23 are provided. The plurality of electrodes 23 form the source, gate and drain electrodes 23 of a bottom gate FET device. The plurality of electrodes 23 are deposited on the smooth surface 32 of the release layer. As the electrodes 23 are formed on the same smooth surface 32 all of the electrodes 23 are provided in the same plane. This reduces the number of step edges in the apparatus 21.
  • In Figs. 4C and 4D a composite polymer substrate 53 is formed to support the plurality of electrodes 23. The composite polymer substrate 53 supports the electrodes 23 after they have been removed from the release layer 33.
  • In the examples of Figs. 4A to 4K the composite polymer substrate 53 comprises two different polymers. It is to be appreciated that in some examples the composite polymer substrate 53 could comprise more than two different polymers. The at least two polymers are laminated together to form a single polymer substrate 53.
  • In the examples of Figs. 4A to 4K the composite polymer substrate 53 is formed from a mouldable polymer 27 and a polymer foil 51. The mouldable polymer 27 may comprise any suitable material which will embed the electrodes 23 and form a planar surface 29 against the surface 32 of the release layer 33. The mouldable polymer 27 may comprise a thermosetting or ultra violet (UV) curable resin. This may enable the mouldable polymer 27 to be solidified after it has been deposited over the electrodes 23.
  • The mouldable polymer 27 may comprise a polymer resin which has a viscosity which enables the mouldable polymer 27 to embed the electrodes 23. In some examples the mouldable polymer 27 may have a viscosity of between 5 cP to 500 cP.
  • The mouldable polymer 27 may comprise a material which enables certain parameters to pass through. For instance, in the example of Figs. 4A to 4K the apparatus 21 may be used as a photodetector. In such examples the mouldable polymer 27 may be transparent or at least partially transparent to visible light. It is to be appreciated that the apparatus 21 could be configured to sense other parameters in other examples of the disclosure.
  • The mouldable polymer 27 can be deposited on either the release layer 33 or the polymer foil 51 using any suitable technique. For instance the mouldable polymer 27 may be deposited using spin coating, bar coating, slot-die coating or any other suitable process.
  • After the moldable polymer 27 has been cured the moldable polymer 27 may form a thin layer. The thickness of the layer of moldable polymer 27 may be controlled by the thickness of the layer or moldable polymer 27 which is applied, the pressure applied to the apparatus 21 and the rheological properties of the moldable polymer 27. In some examples the thickness of the layer of moldable polymer 27 could be between 50nm and 10µm.
  • The mouldable polymer 27 is provided directly overlaying the electrodes. The mouldable polymer 27 is provided on the release layer 33 overlaying the electrodes 23.
  • The polymer foil 51 is provided overlaying the mouldable polymer 27. In the example of Figs. 4A to 4K the mouldable polymer 27 is provided between the polymer foil 51 and the release layer 33 so that the polymer foil 51 does not directly contact the surface 32 of the release layer 33.
  • The polymer foil 51 may comprise a solid polymer. In some example the polymer foil 51 may comprise a flexible polymer which may deform when a user applies a force to the apparatus. The polymer foil 51 may comprise a polymer material which enables certain parameters to pass through. In examples where the apparatus 21 is used as a photodetector the polymer foil 51 may be arranged to be transparent to visible light. For instance the polymer foil 51 may comprise a material such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES) or any other suitable material. Such materials may enable 90% or more of incident visibly light to pass through the polymer foil 51.
  • The polymer foil 51 may have a greater thickness than the layer of mouldable polymer 27. In some examples the thickness of the polymer foil 51 could be between 10 µm to 1000 µm.
  • Fig. 4C shows two different examples of depositing the mouldable polymer 27 and the polymer foil 31. In the first example the mouldable polymer 27 and the polymer foil 51 are deposited separately. In such examples the mouldable polymer 27 is provided overlaying the electrodes 23 and then the polymer foil 51 is provided overlaying the mouldable polymer 27.
  • In the second example the mouldable polymer 27 and the polymer foil 51 are deposited at the same time. In such examples the mouldable polymer 27 may be adhered to the underside of the polymer foil 51. Both the mouldable polymer 27 and the polymer foil 51 are then provided overlaying the electrodes 23.
  • In some examples the surfaces of different layers within the composite polymer substrate 53 may be treated to improve the adhesion between the respective layers. In some examples surface activation techniques such as plasma, corona treatments, ultraviolet/ozone (UVO) or any other suitable process could be used. In some examples adhesion promoters such as primers, self-assembled monolayers (SAM), copolymers or any other suitable material may be used.
  • In Fig. 4D the composite polymer substrate 53 is cured. In the example of Fig. 4D the composite polymer substrate 53 is cured using UV light. It is to be appreciated that other means of curing may be used in other examples of the disclosure. For instance in some examples the mouldable polymer 27 may comprise a thermosetting resin. In such examples the curing may comprise heating the mouldable polymer 27. The temperature to which the mouldable polymer 27 is heated may depend on the material which is used. In some examples the mouldable polymer 27 may be heated to a temperature of around 200°C.
  • The cured moldable polymer 27 may have a low coefficient of thermal expansion. This may prevent deformation of the apparatus 21 and ensure that the electrodes 23 remain within the same plane.
  • The cured moldable polymer 27 and the polymer foil 51 may have similar mechanical properties to reduce stresses and deformations within an apparatus 21. In some examples the elastic modulus and/or coefficient of thermal expansion of the cured moldable polymer 27 and the polymer foil 51 may be similar.
  • Fig. 4D shows two different examples of the composite polymer substrate 53. In the first example the polymer foil 51 has no additional coating. In the second example a hard coating 55 is provided on the polymer foil 51. In the example of Fig. 4D the hard coating 55 is provided on two sides of the polymer foil 51. In other examples the hard coating 55 might only be provided on one side.
  • The hard coating 55 may be configured to provide a barrier layer to prevent contamination of the electronic components of the apparatus 21. For instance the hard coating may prevent the ingress of oxygen, moisture or other contaminants.
  • In some examples the hard coating 55 may be configured to improve the absorption of a parameter which the apparatus 21 is intended to detect. For instance, where the apparatus 21 is arranged to detect visible light the hard coating 55 may comprise an antireflective coating which may improve the penetration of light into the apparatus 21.
  • In some examples the hard coating 55 may comprise a nanoscale coating. The nanoscale coating may comprise a material such as SiOx, SiNx, AlOx, AlNx. the hard coating 55 may be deposited on the polymer foil 51 using any suitable technique. For instance the hard coating 55 could be deposited by atomic layer deposition, plasma enhanced chemical vapour deposition or any other suitable process.
  • In Fig. 4E the carrier substrate 31 and release layer 33 are removed so that the mouldable polymer 27 and the polymer foil 51 provide a composite substrate 53 for the electrodes 23.
  • The mouldable polymer 27 and the electrodes 23 form a planar surface 29. The planar surface 29 may be smooth and flat. The planar surface 29 may be a uniform or substantially uniform surface.
  • The other components of the apparatus 21 may be fabricated on the planar surface 29 formed by the mouldable polymer 27 and the electrodes 23. In Fig. 4F a dielectric 35 is provided on the planar surface 29. In the example of Fig. 3D the dielectric 35 is provided overlaying the electrodes 23.
  • The dielectric 35 may comprise any suitable insulating material. In some examples the dielectric 35 may comprise an inorganic oxide or nitride which could be deposited using atomic layer deposition. In other examples the dielectric 35 may comprise an organic polymer which could be deposited by a coating or printing method. The dielectric 35 may be provided in a thin layer.
  • In Fig. 4G a layer of two dimensional material 25 is deposited on to the planar surface 29. In the example of Figs. 4A to 4K the two dimensional material 25 comprises graphene.
  • The graphene may be deposited on to the planar surface 29 using any suitable technique. In some examples the graphene may comprise a monolayer which may be formed by chemical vapor deposition on a metal foil or any other suitable technique. The graphene monolayer may then be transferred onto the planar surface 29 using a transfer substrate, such as a poly(methyl methacrylate) (PMMA) substrate, or any other suitable process..
  • In the example of Fig. 4G the graphene is provided overlaying the dielectric 35 so that the dielectric 35 forms an insulating barrier between the graphene and the embedded electrodes 23.
  • Both the dielectric 35 and the graphene are formed on the planar surface 29 formed by the mouldable polymer 27 and the embedded electrodes 23. This allows the dielectric 35 and the graphene to be formed without any steps or discontinuities.
  • This reduces the structural defects within the graphene and improves the electrical characteristics of the apparatus 21.
  • In Fig. 4H the graphene and the dielectric 35 are patterned. The graphene and the dielectric 35 may be patterned into any suitable shape. In the example of Figs. 4A to 4K the graphene and the dielectric 35 may be patterned to enable an FET to be formed. In the example of Fig. 4H the graphene and the dielectric 35 are patterned so that at least part of the source and drain electrodes 23 are uncovered.
  • In Fig. 4I contacts 37 are provided between the source and drain electrodes 23 and the graphene. The contacts 37 provide a direct current path between the source and drain electrodes 23 and the graphene. The contacts 37 may comprise any conductive material, such as a metal, which may be deposited between the electrodes 23 and the graphene. The contacts 37 may be deposited using photolithography, metal evaporation or any other suitable process.
  • In Fig. 4J the graphene is activated. The activation of the graphene may enable the FET to be used as a sensor. The material that is used to activate the graphene may depend on the parameters that the FET is intended to detect. In the example of Fig. 4J the graphene is activated with quantum dots 39. The quantum dots 39 may be deposited using any suitable technique such as spin coating, inkjet printing, wet transfer or any other suitable process.
  • In Fig. 4K an encapsulating layer is provided on the planer surface 29. The encapsulating layer 57 is provided overlaying the graphene and the contacts 37. The encapsulating layer 57 may protect the apparatus 21 from contaminants such as moisture, oxygen or other chemicals. The encapsulating layer 57 may be transparent to the parameter that the apparatus 21 is intended to detect. For instance, where the apparatus 21 is arranged to detect visible light the encapsulating layer 57 may be transparent to visible light.
  • The methods of Figs. 4A to 4K enable an apparatus 21 comprising a bottom gate GFET to be formed. Fig. 5 illustrates an example apparatus 21 which has been formed by the method of Fig. 4A to 4K. In the example apparatus 21 the bottom gate GFET (graphene field effect transistor) is configured to act as a photodetector. The apparatus 21 is configured so that photons 61 which are incident on the apparatus 21 can pass through the encapsulating layer 57 and/or the polymer foil 51 and may be incident on the GFET.
  • In some examples the composite polymer substrate 53 may be arranged to act as a light filter. In such examples the composite polymer substrate 53 may comprise one or more polymer layers which is transparent to light in a first range of wavelengths but blocks light outside of the first range of wavelengths.
  • Examples of the disclosure provide methods of forming apparatus 21 comprising two or more coplanar electrodes 23 and a channel of two dimensional material 25. Having at least the two electrodes 23 in the same plane reduces the number of steps or other discontinuities in the two dimensional material 25 which reduces the number of defects within the two dimensional material 25. Reducing the number of defects within the two dimensional material 25 increases carrier mobility within the channel of two dimensional material 25 and provides for an improved apparatus 21.
  • Examples of the disclosure also provide smooth flat surfaces for the deposition of graphene or other two dimensional material 25. Having a smooth flat surface reduces a number of factors which can reduce the carrier mobility in the two dimensional material such as defects in the two dimensional material 25, contamination of the two dimensional material 25, charge concentrations in the substrate supporting the two dimensional material 25, water or other contaminants trapped between the two dimensional material 25 and the substrate and other similar factors. Having a smooth flat surface for the deposition of graphene or other two dimensional material 25 also allows for good contact between the two dimensional material 25 and dielectric 35 or electrode 23.
  • In some examples the embedding of components such as electrodes 23, two dimensional material 25 and dielectric 35 can be used to control the position of the components relative to the neutral plane. As the apparatus 21 can be very thin the components of the apparatus 21 can be positioned very close to the neutral axis of the apparatus 21. This may provide for a more resilient apparatus 21 and may enable strain sensitive components to be protected when the apparatus 21 is bent or otherwise deformed. This may also enable the apparatus 21 to be bent to a higher degree of curvature.
  • Examples of the disclosure which use a composite polymer substrate 53 may provide for improved transparency to parameters such as visible light. As the mouldable polymer 27 is adhered to a polymer foil 51 to provide a composite substrate only a thin layer of the mouldable polymer 27 is needed. The polymer foil 51 may comprise a material which is transparent to a parameter which is to be detected by the apparatus 21. This allows for both transparency and mechanical flexibility.
  • The use of a composite polymer substrate 53 enables different polymers to be used for different apparatus 21. This allows the polymers to be chosen to address the requirements of the apparatus 21 that is being formed and/or the parameters that the apparatus 21 is intended to detect.
  • The methods of the disclosure may enable large numbers of apparatus 21 to be produced at low costs. The method may be fast as processes such as curing may only take several seconds to be completed. The method may avoid the use of high temperatures which could damage sensitive components. For instance the thermosetting resins may be set at temperatures of 200°C which may be low enough to avoid damaging other components of the apparatus 21.
  • In the above description the term "coupled" means operationally coupled. Any number of intervening components may be provided including no intervening components.
  • The term "comprise" is used in this document with an inclusive not an exclusive meaning. That is any reference to X comprising Y indicates that X may comprise only one Y or may comprise more than one Y. If it is intended to use "comprise" with an exclusive meaning then it will be made clear in the context by referring to "comprising only one..." or by using "consisting".
  • In this brief description, reference has been made to various examples. The description of features or functions in relation to an example indicates that those features or functions are present in that example. The use of the term "example" or "for example" or "may" in the text denotes, whether explicitly stated or not, that such features or functions are present in at least the described example, whether described as an example or not, and that they can be, but are not necessarily, present in some of or all other examples. Thus "example", "for example" or "may" refers to a particular instance in a class of examples. A property of the instance can be a property of only that instance or a property of the class or a property of a subclass of the class that includes some but not all of the instances in the class. It is therefore implicitly disclosed that a features described with reference to one example but not with reference to another example, can where possible be used in that other example but does not necessarily have to be used in that other example.
  • Although embodiments of the present invention have been described in the preceding paragraphs with reference to various examples, it should be appreciated that modifications to the examples given can be made without departing from the scope of the invention as claimed.
  • Features described in the preceding description may be used in combinations other than the combinations explicitly described.
  • Although functions have been described with reference to certain features, those functions may be performable by other features whether described or not.
  • Although features have been described with reference to certain embodiments, those features may also be present in other embodiments whether described or not.

Claims (3)

  1. A method for forming a field effect transistor, the method comprising the steps:
    providing a release layer (33) with a smooth surface (32) on a carrier substrate (31)
    depositing source, gate and drain electrodes (23) on the release layer
    depositing a mouldable polymer (27) overlying the source, gate and drain electrodes (23) on the release layer (33), so that the source, gate and drain electrodes (23) and the mouldable polymer (27) form a planar surface (29) against the smooth surface (32) of the release layer (33),
    removing the carrier substrate (31) and the release layer (33)
    providing a dielectric (35) on the planar surface (29) overlying the gate electrode (23) and part of the source and drain electrodes (23)
    depositing a layer of two dimensional material (25) on the dielectric (35)
    providing a first contact (37) between the source electrode (23) and the two dimensional material (25) so that the first contact (37) provides a direct current path between the source electrode (23) and the two dimensional material (25),
    providing a second contact (37) between the drain electrode (23) and the two dimensional material (25) so that the second contact (37) provides a direct current path between the drain electrode (23) and the two dimensional material (25).
  2. The method according to claim 1, wherein the two dimensional material (25) is graphene.
  3. The method according to any of claims 1-2, wherein the two-dimensional material is activated with quantum dots (39).
EP15182390.3A 2015-08-25 2015-08-25 A method for forming apparatus comprising two dimensional material Active EP3136445B1 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
EP15182390.3A EP3136445B1 (en) 2015-08-25 2015-08-25 A method for forming apparatus comprising two dimensional material
US15/754,460 US10396180B2 (en) 2015-08-25 2016-08-25 Method for forming apparatus comprising two dimensional material
CA2996460A CA2996460C (en) 2015-08-25 2016-08-25 A method for forming apparatus comprising two dimensional material
PCT/EP2016/070124 WO2017032850A1 (en) 2015-08-25 2016-08-25 A method for forming apparatus comprising two dimensional material
KR1020187008316A KR102038853B1 (en) 2015-08-25 2016-08-25 Method for Forming an Apparatus Including Two-Dimensional Materials
JP2018510349A JP6518007B2 (en) 2015-08-25 2016-08-25 Field effect transistor formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP15182390.3A EP3136445B1 (en) 2015-08-25 2015-08-25 A method for forming apparatus comprising two dimensional material

Publications (2)

Publication Number Publication Date
EP3136445A1 EP3136445A1 (en) 2017-03-01
EP3136445B1 true EP3136445B1 (en) 2021-03-17

Family

ID=54007606

Family Applications (1)

Application Number Title Priority Date Filing Date
EP15182390.3A Active EP3136445B1 (en) 2015-08-25 2015-08-25 A method for forming apparatus comprising two dimensional material

Country Status (6)

Country Link
US (1) US10396180B2 (en)
EP (1) EP3136445B1 (en)
JP (1) JP6518007B2 (en)
KR (1) KR102038853B1 (en)
CA (1) CA2996460C (en)
WO (1) WO2017032850A1 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3163633B1 (en) 2015-10-28 2021-09-01 Nokia Technologies Oy A light-based sensor apparatus and associated methods
WO2018072103A1 (en) * 2016-10-18 2018-04-26 广东东邦科技有限公司 Tft structure based on flexible multilayer graphene quantum carbon substrate material and manufacturing method
US11177411B2 (en) 2017-10-26 2021-11-16 Emberion Oy Photosensitive field-effect transistor
EP3724928B1 (en) 2017-12-12 2023-03-15 Emberion Oy Photosensitive field-effect transistor
CN108493246A (en) * 2018-02-09 2018-09-04 中国科学院微电子研究所 Semiconductor device and method for manufacturing the same
KR102143058B1 (en) * 2018-04-19 2020-08-11 서울대학교산학협력단 Flexible device on which pattern of 2 dimensional material is formed and manufacturing method thereof
GB2579396A (en) * 2018-11-30 2020-06-24 Emberion Oy P-I-N photodetector
GB201916745D0 (en) 2019-11-18 2020-01-01 Cambridge Entpr Ltd Device fabrication techniques
CN112034008A (en) * 2020-09-11 2020-12-04 电子科技大学 Graphene crystal structure quality evaluation method
CN113666112A (en) * 2021-08-19 2021-11-19 单原子微纳米科技(淮安)有限责任公司 Automatic change two-dimensional material transfer device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073857A (en) 2005-09-09 2007-03-22 Sony Corp Semiconductor device and manufacturing method thereof
WO2010016207A1 (en) * 2008-08-04 2010-02-11 パナソニック株式会社 Flexible semiconductor device and method for manufacturing same
JP2010062399A (en) * 2008-09-05 2010-03-18 Sony Corp Semiconductor device and method of manufacturing the same, and electronic apparatus
ES2369953B1 (en) * 2011-08-02 2012-10-09 Fundació Institut De Ciències Fotòniques OPTO-ELECTRONIC PLATFORM WITH CARBON BASED DRIVER AND QUANTIC POINTS AND PHOTOTRANSISTOR THAT INCLUDES A PLATFORM OF THIS TYPE
KR101946005B1 (en) * 2012-01-26 2019-02-08 삼성전자주식회사 Graphene device and method of manufacturing the same
KR101919426B1 (en) 2013-01-08 2018-11-19 삼성전자주식회사 Graphene electronic device and Manufacturing method of the same
JP6003670B2 (en) * 2013-01-22 2016-10-05 株式会社デンソー Organic thin film transistor and manufacturing method thereof
US9130085B2 (en) 2013-04-05 2015-09-08 Nokia Technologies Oy Transparent photodetector for mobile devices
KR102127781B1 (en) 2013-11-29 2020-06-30 엘지디스플레이 주식회사 Thin film transistor array substrate and method for fabricating the same
EP3136443A1 (en) * 2015-08-28 2017-03-01 Nokia Technologies Oy A method for forming apparatus comprising two dimensional material
EP3147954A1 (en) * 2015-09-22 2017-03-29 Nokia Technologies Oy Photodetector with conductive channel made from two dimensional material and its manufacturing method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
US10396180B2 (en) 2019-08-27
KR20180043345A (en) 2018-04-27
WO2017032850A1 (en) 2017-03-02
EP3136445A1 (en) 2017-03-01
JP6518007B2 (en) 2019-05-22
US20180248019A1 (en) 2018-08-30
CA2996460C (en) 2020-03-24
JP2018526825A (en) 2018-09-13
CA2996460A1 (en) 2017-03-02
KR102038853B1 (en) 2019-10-31

Similar Documents

Publication Publication Date Title
EP3136445B1 (en) A method for forming apparatus comprising two dimensional material
US8445898B2 (en) Organic/inorganic hybrid thin film passivation layer for blocking moisture/oxygen transmission and improving gas barrier property
TWI677104B (en) Thin film transistor, method for manufacturing thin film transistor, and image display device using thin film transistor
US10056513B2 (en) Apparatus and method of forming an apparatus comprising a two dimensional material
JP6393936B2 (en) THIN FILM TRANSISTOR, TRANSISTOR ARRAY, THIN FILM TRANSISTOR MANUFACTURING METHOD, AND TRANSISTOR ARRAY MANUFACTURING METHOD
US20100221413A1 (en) Method of forming pattern and method of producing electronic element
CN108352399B (en) Method for forming a device comprising a two-dimensional material
JP6050400B2 (en) Method for manufacturing organic electronic device and organic electronic device
KR101309263B1 (en) Organic thin film transistor and method of forming the same
JP5445590B2 (en) Thin film transistor manufacturing method
JP2007201056A (en) Thin-film transistor and manufacturing method thereof
US20130126838A1 (en) Organic thin films, methods for forming the same, and organic thin film transistors including the same
JP5261746B2 (en) Method for producing organic thin film transistor
KR20120031000A (en) Alkylsilane laminate, method for producing the same, and thin-film transistor
JP2006186293A (en) Method of manufacturing thin film transistor
Kim et al. Design and fabrication of printed electrowetting-on-dielectric device
JP2006269476A (en) Method of manufacturing thin-film transistor
Seo et al. Stacking of organic thin film transistors: vertical integration
US20180012861A1 (en) Method of manufacturing electronic apparatus
KR20160143274A (en) Method for transferring graphene and application using the same
JP2007180471A (en) Thin-film transistor and manufacturing method therefor
KR20200057389A (en) Large area thermal assist pattern transfer printing method
JP2007150030A (en) Thin-film transistor, and method of manufacturing same
JP2020088225A (en) Thin film transistor, image display device, sensor device and manufacturing method of thin film transistor
TWI399337B (en) Method for manufacturing nano-sensor

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION HAS BEEN PUBLISHED

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20170830

RBV Designated contracting states (corrected)

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

17Q First examination report despatched

Effective date: 20180907

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

GRAJ Information related to disapproval of communication of intention to grant by the applicant or resumption of examination proceedings by the epo deleted

Free format text: ORIGINAL CODE: EPIDOSDIGR1

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAJ Information related to disapproval of communication of intention to grant by the applicant or resumption of examination proceedings by the epo deleted

Free format text: ORIGINAL CODE: EPIDOSDIGR1

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20200917

INTG Intention to grant announced

Effective date: 20200928

INTG Intention to grant announced

Effective date: 20201008

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602015066898

Country of ref document: DE

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 1373030

Country of ref document: AT

Kind code of ref document: T

Effective date: 20210415

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG9D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210617

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210617

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210618

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1373030

Country of ref document: AT

Kind code of ref document: T

Effective date: 20210317

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20210317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210719

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210717

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602015066898

Country of ref document: DE

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

26N No opposition filed

Effective date: 20211220

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20210831

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20210831

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20210831

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210717

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20210825

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20210825

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20210831

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20150825

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210317

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20240821

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20240815

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20240819

Year of fee payment: 10