EP2965460A1 - Calcul de période de pause dynamique pour une transmission de données en série - Google Patents
Calcul de période de pause dynamique pour une transmission de données en sérieInfo
- Publication number
- EP2965460A1 EP2965460A1 EP14714492.7A EP14714492A EP2965460A1 EP 2965460 A1 EP2965460 A1 EP 2965460A1 EP 14714492 A EP14714492 A EP 14714492A EP 2965460 A1 EP2965460 A1 EP 2965460A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- length
- pause period
- transmission
- data
- peripheral device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 title claims abstract description 50
- 230000002093 peripheral effect Effects 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims description 13
- 241000238876 Acari Species 0.000 description 11
- 230000004048 modification Effects 0.000 description 8
- 238000012986 modification Methods 0.000 description 8
- 238000007792 addition Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000006467 substitution reaction Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000008707 rearrangement Effects 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000009432 framing Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3089—Monitoring arrangements determined by the means or processing involved in sensing the monitored data, e.g. interfaces, connectors, sensors, probes, agents
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/20—Repeater circuits; Relay circuits
- H04L25/24—Relay circuits using discharge tubes or semiconductor devices
- H04L25/242—Relay circuits using discharge tubes or semiconductor devices with retiming
- H04L25/245—Relay circuits using discharge tubes or semiconductor devices with retiming for start-stop signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0091—Transmitter details
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/044—Speed or phase control by synchronisation signals using special codes as synchronising signal using a single bit, e.g. start stop bit
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L2007/045—Fill bit or bits, idle words
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4902—Pulse width modulation; Pulse position modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Abstract
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201361775348P | 2013-03-08 | 2013-03-08 | |
US14/199,785 US9753830B2 (en) | 2013-03-08 | 2014-03-06 | Dynamic pause period calculation for serial data transmission |
PCT/US2014/021743 WO2014138581A1 (fr) | 2013-03-08 | 2014-03-07 | Calcul de période de pause dynamique pour une transmission de données en série |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2965460A1 true EP2965460A1 (fr) | 2016-01-13 |
EP2965460B1 EP2965460B1 (fr) | 2022-07-06 |
Family
ID=51489319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP14714492.7A Active EP2965460B1 (fr) | 2013-03-08 | 2014-03-07 | Calculation dynamique de la period de pause pour une transmission serielle de données |
Country Status (4)
Country | Link |
---|---|
US (1) | US9753830B2 (fr) |
EP (1) | EP2965460B1 (fr) |
TW (1) | TWI648972B (fr) |
WO (1) | WO2014138581A1 (fr) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8122159B2 (en) | 2009-01-16 | 2012-02-21 | Allegro Microsystems, Inc. | Determining addresses of electrical components arranged in a daisy chain |
US9634715B2 (en) * | 2014-02-18 | 2017-04-25 | Allegro Microsystems, Llc | Signaling between master and slave components using a shared communication node of the master component |
US9787495B2 (en) | 2014-02-18 | 2017-10-10 | Allegro Microsystems, Llc | Signaling between master and slave components using a shared communication node of the master component |
GB2531748A (en) | 2014-10-29 | 2016-05-04 | Melexis Technologies Nv | Flexible SENT device configuration |
EP3262796B1 (fr) * | 2015-03-12 | 2019-08-28 | Allegro MicroSystems, LLC | Signalisation entre un élément maître et un élément esclave au moyen d'un noeud de communication partagé appartenant à l'élément maître |
US10204024B2 (en) * | 2015-06-17 | 2019-02-12 | Ford Global Technologies, Llc | Sent error generator |
US10747708B2 (en) | 2018-03-08 | 2020-08-18 | Allegro Microsystems, Llc | Communication system between electronic devices |
JP7205103B2 (ja) * | 2018-08-08 | 2023-01-17 | 富士電機株式会社 | 受信装置、受信方法、および受信プログラム |
US11811569B2 (en) * | 2020-09-01 | 2023-11-07 | Allegro Microsystems, Llc | Sensor integrated circuits having a single edge nibble transmission (SENT) output |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4914618A (en) | 1986-11-10 | 1990-04-03 | Tektronix, Inc. | Asynchronous serial communications apparatus with variable length stop bit generation capability |
US6263033B1 (en) | 1998-03-09 | 2001-07-17 | Advanced Micro Devices, Inc. | Baud rate granularity in single clock microcontrollers for serial port transmissions |
US8577634B2 (en) * | 2010-12-15 | 2013-11-05 | Allegro Microsystems, Llc | Systems and methods for synchronizing sensor data |
US8447004B2 (en) * | 2011-01-27 | 2013-05-21 | Freescale Semiconductor, Inc. | Estimation and compensation of clock variation in received signal |
-
2014
- 2014-03-06 US US14/199,785 patent/US9753830B2/en active Active
- 2014-03-07 EP EP14714492.7A patent/EP2965460B1/fr active Active
- 2014-03-07 WO PCT/US2014/021743 patent/WO2014138581A1/fr active Application Filing
- 2014-03-10 TW TW103108231A patent/TWI648972B/zh active
Non-Patent Citations (2)
Title |
---|
None * |
See also references of WO2014138581A1 * |
Also Published As
Publication number | Publication date |
---|---|
TW201448531A (zh) | 2014-12-16 |
TWI648972B (zh) | 2019-01-21 |
US9753830B2 (en) | 2017-09-05 |
EP2965460B1 (fr) | 2022-07-06 |
US20140258566A1 (en) | 2014-09-11 |
WO2014138581A1 (fr) | 2014-09-12 |
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