EP2919559A2 - Ansteuerungsvorrichtung einer lichtemittierenden last und lichtemittierende vorrichtung für ein fahrzeug - Google Patents
Ansteuerungsvorrichtung einer lichtemittierenden last und lichtemittierende vorrichtung für ein fahrzeug Download PDFInfo
- Publication number
- EP2919559A2 EP2919559A2 EP15157687.3A EP15157687A EP2919559A2 EP 2919559 A2 EP2919559 A2 EP 2919559A2 EP 15157687 A EP15157687 A EP 15157687A EP 2919559 A2 EP2919559 A2 EP 2919559A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- light emitting
- driving apparatus
- switching element
- switching elements
- gate driver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007423 decrease Effects 0.000 claims description 3
- 230000001934 delay Effects 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 description 11
- 238000010586 diagram Methods 0.000 description 6
- 238000001514 detection method Methods 0.000 description 3
- 230000005670 electromagnetic radiation Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/40—Details of LED load circuits
- H05B45/44—Details of LED load circuits with an active control inside an LED matrix
- H05B45/48—Details of LED load circuits with an active control inside an LED matrix having LEDs organised in strings and incorporating parallel shunting devices
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
- H05B45/54—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits in a series array of LEDs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
- H05B47/10—Controlling the light source
Definitions
- the present invention relates to a light emitting load driving apparatus for driving a light emitting load such as an LED (Light Emitting Diode) and a light emitting apparatus for a vehicle, having such a light emitting load driving apparatus.
- a light emitting load driving apparatus for driving a light emitting load such as an LED (Light Emitting Diode)
- a light emitting apparatus for a vehicle having such a light emitting load driving apparatus.
- FIG. 1 is a circuit diagram illustrating a light emitting load driving apparatus and a light emitting apparatus for a vehicle disclosed in Japanese Unexamined Patent Application Publication No. 2013-84635 (Patent Literature 1).
- the light emitting apparatus for a vehicle includes the light emitting load driving apparatus 1a and a plurality of light emitting loads D1 to Dn.
- the light emitting load driving apparatus 1a includes a plurality of switching elements M1 to Mn connected in parallel with the light emitting loads D1 to Dn, respectively, and a gate driver 10a that individually drives the switching elements M1 to Mn according to a PWM (Pulse Width Modulation) method.
- the light emitting loads D1 to Dn are connected in series between both ends of a constant current source IDD.
- the gate driver 10a outputs drive signals that oscillate between high and low levels to gate terminals of the switching elements M1 to Mn, respectively, thereby adjusting brightness levels of the light emitting loads D1 to Dn.
- FIG. 2 is a timing chart illustrating operation of the light emitting load driving apparatus described in Patent Literature 1.
- Waveforms M1 to Mn represent actions of the switching elements M1 to Mn.
- a waveform VDD represents voltage applied between a positive terminal T+ and a negative terminal T- of the constant current source IDD.
- a waveform IDD represents current passing between the positive and negative terminals T+ and T- of the constant current source IDD.
- the switching elements M1 to Mn simultaneously change from OFF to ON, i.e., turn on at the same time to bypass the current passed to the light emitting loads D1 to Dn, thereby suddenly decreasing load on the constant current source IDD and causing an overshoot current Io.
- the switching elements M1 to Mn simultaneously change from ON to OFF, i.e., turn off at the same time to pass the current to the light emitting load D1 to Dn, thereby suddenly increasing load on the constant current source IDD and causing an undershoot current Iu.
- overshoot and undershoot currents Io and Iu cause unnecessary electromagnetic radiation noises and erroneous load-short or load-open detection by the constant current source IDD.
- the overshoot and undershoot currents Io and Iu must be suppressed as small as possible.
- the present invention provides a light emitting load driving apparatus and a light emitting apparatus for a vehicle, capable of suppressing electromagnetic radiation noises and erroneous load-short or load-open detection by a constant current source.
- the light emitting load driving apparatus includes a first switching element, a second switching element, and a gate driver, to drive first and second light emitting loads connected in series.
- the first switching element when in an ON state, bypasses a current to be passed to the first light emitting load.
- the second switching element when in an ON state, bypasses a current to be passed to the second light emitting load.
- the gate driver reduces at least one of an overshoot current caused when the first and second switching elements are simultaneously turned on and an undershoot current caused when the first and second switching elements are simultaneously turned off.
- FIG. 3 is a circuit diagram illustrating a light emitting load driving apparatus and a light emitting apparatus for a vehicle according to an embodiment of the present invention.
- the light emitting apparatus for a vehicle includes the light emitting load driving apparatus 1, a first light emitting load D1, and a second light emitting load D2.
- the light emitting load driving apparatus 1 includes a first switching element M1, a second switching element M2, and a gate driver 10.
- the first switching element M1 when in an ON state, bypasses a current of the first light emitting load D1.
- the gate driver 10 reduces at least one of an overshoot current Io caused when the first and second switching elements M1 and M2 are simultaneously turned on and an undershoot current Iu caused when the first and second switching elements M1 and M2 are simultaneously turned off.
- a light emitting apparatus for a vehicle includes a light emitting load driving apparatus 1 and a plurality of light emitting loads D1 to Dn.
- the light emitting apparatus is connected to an emission controller 2.
- the light emitting loads D1 to Dn are, for example, LEDs.
- the light emitting loads D1 to Dn are connected in series between a positive terminal T+ and a negative terminal T- of a constant current source IDD.
- control signals SC1 to SCn outputted from the emission controller 2
- the light emitting apparatus supplies DC current from the constant current source IDD to the light emitting loads D1 to Dn.
- the control signals SC1 to SCn are sometimes collectively referred to as the control signals ⁇ SCi ⁇ .
- the light emitting load driving apparatus 1 installed in the light emitting apparatus includes a plurality of switching elements M1 to Mn and a gate driver 10.
- the light emitting load driving apparatus 1 is formed as, for example, a single semiconductor integrated circuit.
- the light emitting load driving apparatus 1 is connected to the light emitting loads D1 to Dn, emission controller 2, and constant current source IDD.
- the control signals ⁇ SCi ⁇ outputted from the emission controller 2 the light emitting load driving apparatus 1 adjusts brightness levels of the light emitting loads D1 to Dn.
- the emission controller 2 may be a digital circuit such as ASIC or FPGA, or a microcontroller.
- the control signals ⁇ SCi ⁇ outputted from the emission controller 2 are pulse signals to individually control brightness levels of the light emitting loads D1 to Dn.
- the switching elements M1 to Mn are, for example, MOSFETs and are connected in series between the positive and negative terminals T+ and T- of the constant current source IDD.
- the switching elements M1 to Mn are connected in parallel with the light emitting loads D1 to Dn, respectively.
- DC current supplied from the constant current source IDD passes through the light emitting loads D1 to Dn.
- the switching elements M1 to Mn bypass the DC current passing through the light emitting loads D1 to Dn.
- the gate driver 10 includes a phase shifter 11 and a plurality of signal output units 12-1 to 12-n. According to the control signals ⁇ SCi ⁇ outputted from the emission controller 2, the gate driver 10 generates drive signals S1 to Sn that are pulse signals oscillating between high and low levels. In the following explanation, the drive signals S1 to Sn are sometimes collectively referred to as the drive signals ⁇ Si ⁇ .
- a ratio of high and low levels, i.e., a duty ratio of each of the drive signals ⁇ Si ⁇ is changed according to a corresponding one of the control signals ⁇ SCi ⁇ .
- the drive signals ⁇ Si ⁇ are transmitted through the signal output units 12-1 to 12-n to gate terminals of the switching elements M1 to Mn.
- the gate driver 10 individually controls the switching elements M1 to Mn according to the PWM method. For example, when the first drive signal S1 is high, the first switching element M1 turns on to turn off the light emitting load D1. When the first drive signal S1 is low, the first switching element M1 turns off to turn on the light emitting load D1.
- the gate driver 10 controls the ON time and OFF time of each of the switching elements M1 to Mn according to the control signals ⁇ SCi ⁇ , thereby adjusting brightness levels of the light emitting loads D1 to Dn.
- the phase shifter 11 is connected to the emission controller 2 and signal output units 12-1 to 12-n.
- the phase shifter 11 detects the control signals ⁇ SCi ⁇ that may simultaneously turn on or off the switching elements M1 to Mn. Simultaneously turning on the switching elements M1 to Mn is equivalent to shifting the switching elements M1 to Mn from an OFF state to an ON state at the same time. Simultaneously turning off the switch elements M1 to Mn is equivalent to shifting the switching elements M1 to Mn from an ON state to an OFF state at the same time.
- phase shifter 11 detects the control signals ⁇ SCi ⁇ that simultaneously turn on the switching elements M1 to Mn, the phase shifter 11 uses the rise timing of the first drive signal S1 that is based on the first control signal SC1, to successively delay the rise timing of the other drive signals S2 to Sn and outputs the drive signal S1 and successively delayed drive signals S2 to Sn to the signal output units 12-1 to 12-n, respectively. If the phase shifter 11 detects the control signals ⁇ SCi ⁇ that simultaneously turn off the switching elements M1 to Mn, the phase shifter 11 uses the fall timing of the first drive signal S1 that is based on the first control signal SC1, to successively delay the fall timing of the other drive signals S2 to Sn.
- the signal output units 12-1 to 12-n are connected to the phase shifter 11 and switching elements M1 to Mn.
- the signal output units 12-1 to 12-n turn on the switching elements M1 to Mn.
- the signal output units 12-1 to 12-n turn off the switching elements M1 to Mn.
- FIG. 4 is a circuit diagram illustrating the details of part of the light emitting load driving apparatus 1 according to the embodiment of the present invention.
- the light emitting load driving apparatus 1 includes a first charging unit 13-1 connected to the first signal output unit 12-1.
- the first signal output unit 12-1 includes a first switch SW1, a second switch SW2, and an inverter INV.
- the first switch SW1 opens and closes a path between the first charging unit 13-1 and the gate terminal of the first switching element M1.
- the inverter INV inverts the first drive signal S1 and outputs the inverted signal to the second switch SW2.
- the second switch SW2 opens and closes both ends of a parasitic capacitance C2 of the first switching element M1.
- the first charging unit 13-1 stabilizes operation of the first switching element M1 driven by the first signal output unit 12-1.
- the first charging unit 13-1 includes a current source ICC, first and second diodes Di1 and Di2, a zener diode ZDi, a first capacitor C1, and a driver DRV.
- the current source ICC is connected through the first diode Di1 to a first end of the first capacitor C1.
- the first end of the first capacitor C1 is connected through the second diode Di2 to the signal output unit 12-1.
- a second end of the first capacitor C1 is connected to an output end of the driver DRV.
- the bidirectional zener diode ZDi is a protective element and is connected in parallel with the first capacitor C1.
- the driver DRV outputs a drive pulse signal SD that is independent of the drive signals ⁇ Si ⁇ and oscillates between high and low levels at a frequency of several hundreds kHz.
- the drive pulse signal SD is low, the current source ICC charges the first capacitor C1.
- the drive pulse signal SD is high, potential at the second end of the first capacitor C1 is lifted.
- Each of the signal output units 12-1 to 12-n is provided with a charging unit that is the same as the charging unit 13-1 explained above and illustrated in Fig. 4 .
- FIG. 5 is a timing chart illustrating operation of the light emitting load driving apparatus 1 according to the embodiment of the present invention.
- a waveform M1 represents operation of the first switching element M1, a waveform M2 operation of the second switching element M2, a waveform Mn operation of the "n"th switching element Mn, a waveform VDD voltage applied between the positive and negative terminals T+ and T- of the constant current source IDD, and a waveform IDD current passing between the positive and negative terminals T+ and T- of the constant current source IDD.
- the phase shifter 11 outputs the first drive signal S1 to the first signal output unit 12-1 to turn on the first switching element M1 that is the closest switching element to the positive terminal of the constant current source IDD.
- the phase shifter 11 successively delays the second to "n"th drive signals S2 to Sn with respect to the first drive signal S1.
- the phase shifter 11 outputs the second drive signal S2 to the second signal output unit 12-2 to turn on the second switching element M2 that is closer to the negative terminal of the constant current source IDD with respect to the first switching element M1.
- the phase shifter 11 outputs the "n"th drive signal Sn to the "n"th signal output unit 12-n to turn on the "n"th switching element Mn. From time t0n to t11, all of the switching elements M1 to Mn are ON.
- the phase shifter 11 outputs the first drive signal S1 to the first signal output unit 12-1 to turn off the first switching element M1.
- the phase shifter 11 outputs the second drive signal S2 to the second signal output unit 12-2 to turn off the second switching element M2.
- the phase shifter 11 outputs the "n"th drive signal Sn to the "n"th signal output unit 12-n to turn off the "n”th switching element Mn.
- the voltage VDD rises and falls in steps when the switching elements M1 to Mn are successively turned on and off.
- the light emitting load driving apparatus 1 and gate driver 10 according to the present invention employ the phase shifter 11 to manage at least one of the simultaneous turning on and simultaneous turning off of the first and second switching elements M1 and M2 (or M1 to Mn). Accordingly, the present invention is able to reduce load fluctuations of the constant current source IDD and cancel at least one of overshoot and undershoot currents.
- the light emitting load driving apparatus 1 and gate driver 10 according to the present invention employ the charging unit 13 that increases operating potential of the signal output unit 12 according to the drive pulse signal SD that is independent of the drive signals ⁇ Si ⁇ .
- This configuration of the present invention moderates restrictions the related art of Patent Literature 1 must apply when turning on and off the switching elements M1 to Mn in the light emitting load driving apparatus 1a.
- the light emitting load driving apparatus 1 and gate driver 10 may replace the phase shifter 11 with a ramp generator that successively elongates the rise time and fall time of the second to "n"th drive signals S2 to Sn with respect to the rise time and fall time of the first drive signal S1 of the switching element M1 that is the closest switching element to the positive terminal of the constant current source IDD.
- This modification successively delays the turning-on or -off speeds of the switching elements M1 to Mn when receiving simultaneous turn-on or -off drive signals, thereby reducing load fluctuations of the constant current source IDD.
- the light emitting load driving apparatus 1 may include a plurality of switching elements M1 to Mn that are formed as discrete devices and a gate driver 10 that is formed as a semiconductor integrated circuit.
- the light emitting load driving apparatus 1 according to the present invention may include at least one of the emission controller 2 and constant current source IDD.
- Each of the light emitting loads D1 to Dn may include a plurality of LEDs.
- the light emitting load driving apparatus and the light emitting apparatus for a vehicle provided by the present invention are capable of suppressing unnecessary electromagnetic radiation noises and erroneous load-short or load-open detection by a constant current source IDD.
Landscapes
- Circuit Arrangement For Electric Light Sources In General (AREA)
- Led Devices (AREA)
- Electronic Switches (AREA)
- Lighting Device Outwards From Vehicle And Optical Signal (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014046174A JP6278238B2 (ja) | 2014-03-10 | 2014-03-10 | 発光負荷の駆動装置及び車両用発光装置 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP2919559A2 true EP2919559A2 (de) | 2015-09-16 |
EP2919559A3 EP2919559A3 (de) | 2015-10-14 |
EP2919559B1 EP2919559B1 (de) | 2019-01-16 |
Family
ID=53008254
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP15157687.3A Active EP2919559B1 (de) | 2014-03-10 | 2015-03-05 | Ansteuerungsvorrichtung einer lichtemittierenden last und lichtemittierende vorrichtung für ein fahrzeug |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP2919559B1 (de) |
JP (1) | JP6278238B2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9900950B1 (en) | 2016-12-08 | 2018-02-20 | Nxp B.V. | Adjusted pulse width modulation (PWM) curve calculations for improved accuracy |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013084635A (ja) | 2013-02-15 | 2013-05-09 | Mitsubishi Electric Corp | Led点灯装置および車両用前照灯 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05328795A (ja) * | 1992-05-26 | 1993-12-10 | Mitsubishi Electric Corp | 出力バッファ回路 |
JP4573579B2 (ja) * | 2004-06-18 | 2010-11-04 | 三洋電機株式会社 | Led照明装置 |
CN105934050B (zh) * | 2006-09-20 | 2019-07-05 | 皇家飞利浦电子股份有限公司 | 发光元件控制系统及包含该系统的照明系统 |
US8493000B2 (en) * | 2010-01-04 | 2013-07-23 | Cooledge Lighting Inc. | Method and system for driving light emitting elements |
JP6134312B2 (ja) * | 2012-04-25 | 2017-05-24 | 株式会社小糸製作所 | ダウンコンバータの制御回路および車両用灯具 |
DE102013100663A1 (de) * | 2013-01-23 | 2014-07-24 | Osram Opto Semiconductors Gmbh | Anordnung und Verfahren zum Betreiben einer Anordnung |
-
2014
- 2014-03-10 JP JP2014046174A patent/JP6278238B2/ja active Active
-
2015
- 2015-03-05 EP EP15157687.3A patent/EP2919559B1/de active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013084635A (ja) | 2013-02-15 | 2013-05-09 | Mitsubishi Electric Corp | Led点灯装置および車両用前照灯 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9900950B1 (en) | 2016-12-08 | 2018-02-20 | Nxp B.V. | Adjusted pulse width modulation (PWM) curve calculations for improved accuracy |
EP3334251A1 (de) * | 2016-12-08 | 2018-06-13 | Nxp B.V. | Angepasste pulsweitenmodulationskurvenberechnungen für verbesserte genauigkeit |
Also Published As
Publication number | Publication date |
---|---|
EP2919559B1 (de) | 2019-01-16 |
EP2919559A3 (de) | 2015-10-14 |
JP6278238B2 (ja) | 2018-02-14 |
JP2015170556A (ja) | 2015-09-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9265109B2 (en) | Light source control device | |
KR100716859B1 (ko) | 발광 다이오드 구동용 반도체 회로, 및 그것을 구비한 발광다이오드 구동 장치 | |
JP6882976B2 (ja) | スイッチング制御回路 | |
US9198247B2 (en) | Vehicle lamp, driving device thereof, and control method thereof | |
US10581318B2 (en) | Resonant converter including capacitance addition circuits | |
CN111771322B (zh) | 开关电路 | |
US20070170874A1 (en) | Light emitting diode drive apparatus | |
TWI554146B (zh) | 半導體光源裝置及半導體光源裝置控制方法 | |
US20150091539A1 (en) | Half-bridge gate driver control | |
CN112202317A (zh) | 栅极驱动装置及功率转换装置 | |
JP6417546B2 (ja) | ゲート駆動回路およびそれを用いた電力変換装置 | |
US20180049283A1 (en) | Apparatus and methods for converter mode and load configuration control | |
US9222657B2 (en) | Vehicle lighting device | |
CN112803727A (zh) | 栅极驱动装置及功率转换装置 | |
CN110036694B (zh) | 用于led控制器的自适应性关断延迟时间补偿 | |
US9992826B1 (en) | Dual mode constant current LED driver | |
US10243445B2 (en) | Semiconductor device and control method thereof | |
TWI419447B (zh) | 電源轉換器及其功率電晶體的閘極驅動器 | |
US12101857B2 (en) | Light source driver circuit, optical measuring device comprising the light source driver circuit, device for checking value documents, and method for operating a light source load by means of the light source driver circuit | |
EP2919559A2 (de) | Ansteuerungsvorrichtung einer lichtemittierenden last und lichtemittierende vorrichtung für ein fahrzeug | |
US20180007755A1 (en) | Light-source driving apparatus and light-source driving method | |
US9800155B2 (en) | DC-DC converter | |
CN104853477A (zh) | 用于发光二极管(led)驱动器的通用输入和宽输出功能 | |
CN111225478B (zh) | 开关组件保护电路 | |
US6661117B2 (en) | Load driving system and method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
AX | Request for extension of the european patent |
Extension state: BA ME |
|
AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
AX | Request for extension of the european patent |
Extension state: BA ME |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H05B 33/08 20060101AFI20150908BHEP |
|
17P | Request for examination filed |
Effective date: 20160414 |
|
RBV | Designated contracting states (corrected) |
Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: GRANT OF PATENT IS INTENDED |
|
INTG | Intention to grant announced |
Effective date: 20180906 |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE PATENT HAS BEEN GRANTED |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: EP |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FG4D |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R096 Ref document number: 602015023466 Country of ref document: DE |
|
REG | Reference to a national code |
Ref country code: AT Ref legal event code: REF Ref document number: 1090722 Country of ref document: AT Kind code of ref document: T Effective date: 20190215 |
|
REG | Reference to a national code |
Ref country code: NL Ref legal event code: MP Effective date: 20190116 |
|
REG | Reference to a national code |
Ref country code: LT Ref legal event code: MG4D |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 |
|
REG | Reference to a national code |
Ref country code: AT Ref legal event code: MK05 Ref document number: 1090722 Country of ref document: AT Kind code of ref document: T Effective date: 20190116 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: PT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190516 Ref country code: FI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: PL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: LT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: SE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: NO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190416 Ref country code: ES Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190417 Ref country code: LV Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: HR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: IS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190516 Ref country code: RS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: BG Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190416 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R097 Ref document number: 602015023466 Country of ref document: DE |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: AT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: EE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: CZ Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: RO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: AL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: DK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: SK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: MC Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R079 Ref document number: 602015023466 Country of ref document: DE Free format text: PREVIOUS MAIN CLASS: H05B0033080000 Ipc: H05B0045000000 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LU Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20190305 Ref country code: SM Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 |
|
REG | Reference to a national code |
Ref country code: BE Ref legal event code: MM Effective date: 20190331 |
|
26N | No opposition filed |
Effective date: 20191017 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20190305 Ref country code: LI Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20190331 Ref country code: CH Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20190331 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 Ref country code: BE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20190331 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: TR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20190305 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: CY Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: HU Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO Effective date: 20150305 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20190116 |
|
P01 | Opt-out of the competence of the unified patent court (upc) registered |
Effective date: 20230503 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20240130 Year of fee payment: 10 Ref country code: GB Payment date: 20240201 Year of fee payment: 10 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20240213 Year of fee payment: 10 |