Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
  • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
  • G06K19/07766—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement
  • G06K19/07769—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement the further communication means being a galvanic interface, e.g. hybrid or mixed smart cards having a contact and a non-contact interface
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
  • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
  • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
  • G06K19/07754—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being galvanic
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
  • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
  • G06K19/07773—Antenna details
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
  • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
  • H01L2224/321—Disposition
  • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/4805—Shape
  • H01L2224/4809—Loop shape
  • H01L2224/48095—Kinked
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/481—Disposition
  • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
  • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
  • H01L2224/491—Disposition
  • H01L2224/4912—Layout
  • H01L2224/49171—Fan-out arrangements
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
  • H01L2224/732—Location after the connecting process
  • H01L2224/73251—Location after the connecting process on different surfaces
  • H01L2224/73265—Layer and wire connectors
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
  • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
  • H01L2224/83385—Shape, e.g. interlocking features
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/30—Technical effects
  • H01L2924/301—Electrical effects
  • H01L2924/30107—Inductance
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/30—Technical effects
  • H01L2924/301—Electrical effects
  • H01L2924/3011—Impedance

Definitions

• the invention relates to an electronic module with a dual contact and contactless communication interface, and a smart card integrating such a module.
• an electronic module comprising a microelectronic chip, a contact connection terminal block intended to be brought into contact with the corresponding terminals of a contact chip card reader, and two contacts located on the rear face allowing the connection to the 'antenna.
• plastic card including an antenna
• This structure has often posed a series of problems in achieving the mechanical connection between the antenna and the module, leading to loss of reliability or manufacturing efficiency.
• the manufacturing steps of the vias introduce additional steps of quality reviews and decreases in overall manufacturing yield, which leads to an increased unit cost compared to a product that would be devoid of vias.
• a general object of the invention is therefore to provide an electronic module with a dual contact and non-contact communication interface, which has none of the aforementioned drawbacks.
• Another object of the invention is to provide an electronic module with a dual contact and non-contact communication interface that is simpler to manufacture and less expensive than the known modules, without impairing the high level of reliability.
• a particular object of the invention is to propose an electronic module for a smart card with a dual contact and non-contact communication interface, which does not require interconnections or vias between the faces of the substrate.
• the electronic module comprises a modification of the antenna design including a zone of detachment of the turns in the direction of the chip and its drop of protective resin, and the two connection pads of the antenna, to the distal and proximal pads are both located in the area of the encapsulation drop (or any other equivalent protection or encapsulation), which allows the terminals of the contactless interface to be connected of the chip with the connection pads of the antenna without recourse metallized vias or any other type of electrical connection between the faces of the film.
• the contactless function of the module is exclusively located on the front face of the module, which supports the antenna, the chip and their interconnections, the ISO contacts 7816 being located on the opposite face.
• the subject of the invention is therefore an electronic module with a dual contact and non-contact communication interface, in particular for a smart card, said module comprising on the one hand a substrate having on a first face a terminal block of electrical contacts allowing operation by contact with the corresponding contacts of a smart card reader, and having on a second face an antenna provided with at least one turn and a microelectronic chip located in an encapsulation zone and provided with a communication interface without contact, said antenna comprising a proximal connection stud and a distal connection pad intended to be connected to the corresponding terminals of said contactless communication interface of the chip, characterized in that the two connection pads proximal and distal of the antenna are arranged inside the encapsulation zone, so as to make a direct electrical connection between the acun proximal or distal connection pads and the corresponding terminal of the chip, without using vias, and in that this direct electrical connection is also located in the encapsulation area of the chip.
• the antenna is at least partly disposed under the chip and the conductive bridge between the proximal and distal connection pads of the antenna is then made directly by the chip and the conductive wires connecting the connection pad distal to the chip, and connecting the chip to the proximal connection pad.
• the invention provides that the turns of the antenna, which are normally located on the periphery of the module, have in the vicinity of the connection pad furthest from the chip (distal pad), a localized detachment of the turns extending in the direction of the chip, so as to allow the connection of said distal connection pad to the corresponding terminal of the chip, within the protected area encapsulation.
• connection areas of the antenna (pad” in English terminology) and the radiofrequency communication function on one side of the module substrate, without having to go through the other side by a strap.
• This allows in particular to directly connect the contactless interface of the microelectronic chip with the connection pads of the antenna, without using vias or other electrical connections between the two opposite faces of the substrate.
• the turns of the antenna may pass themselves in the vicinity of the chip on one side of the module, without detachment located from the periphery of the module in the direction of the chip.
• the turns may cover the connection wells between the terminals of the contact interface of the chip, and the module's ISO contacts.
• the invention provides in this variant, that the turns comprise localized deviations to make them bypass said connection wells arranged between the terminals of the contact interface of the chip, and ISO connection terminals of the module.
• the antenna is configured in two sets of turns in series, namely an outer layer close to the periphery of the module and an inner layer closer to the chip, and at least the inner layer. being provided with a recess and a contact terminal located in the encapsulation zone, so as to connect to the chip during the production of the module, only the inner ply (3i) or the two plies (3i, 3rd) of turns.
• This possibility of connecting two sets of turns in series also makes it possible to choose the characteristics of the antenna as a function of the input impedance of the contactless communication interface of the microelectronic chip.
• the antenna is arranged partly under the chip, so as to bring the distal connection pad of the antenna closer to the encapsulation zone of the chip (formed in particular by a drop of insulating resin), so as to obtain a reduced encapsulated surface and wires shorter interconnection between the antenna connection pads and the terminals of the contactless interface of the chip.
• the chip can be arranged in a window arranged in the thickness of the substrate, so as to obtain a module of thickness less than or of the order of the sum of the thicknesses of the chip and of the substrate, which makes it possible to adapt the module according to the invention to the needs of very fine products, the module then having a thickness of less than about 350 micrometers.
• the invention also relates to a smart card comprising an improved electronic module and simplified according to the above characteristics.
• FIGS. 1A and 1B respectively illustrate a plan view and a sectional view of an electronic module with a dual communication interface according to the state of the art, in particular for a smart card;
• FIGS. 2A and 2B to 2E respectively show a plan view and several sectional views of an electronic module with a dual communication interface according to the invention
• FIG. 3 illustrates a plan view of an electronic module variant of FIG. 2.
• FIGS. 1A and 1B show a known electronic module 1, including a chip 2 bonded with a glue layer 13 to a substrate 8 having an insulating layer 16.
• the chip 2 is connected on the one hand to a terminal block of electrical contacts (not shown) located on the face of the module opposite to that which carries the chip, these contacts being intended to ensure operation in contact mode with a contact reader.
• This connection is made by well-known conductive vias 11, which make it possible to electrically connect points situated on the opposite faces of the module, and which the present invention seeks to suppress.
• the chip 2 is connected on the other hand to an antenna 3 located in a card body or directly on the module, so as to ensure radio frequency communication with a contactless smart card reader, not shown.
• the electrical contacts of the terminal block are located on one side of the substrate 8 of the module, and the turns of the antenna 3 of the microelectronic module and the chip 2 are located on the opposite face of the substrate.
• the turns of the antenna 3 are in the current state of the art integrally located along the periphery of the module, which makes it possible to maximize the antenna area and consequently the range of the radiofrequency communication between module 1 and a remote contactless reader.
• connection pads 4,5 of the antenna 3 are located outside the encapsulation zone 7 shown in hatched lines and often corresponding in practice to the surface of a drop of insulating resin encapsulating and protecting the chip.
• the distal connection pad 5 of the antenna corresponding to the antenna end furthest from the chip, is connected to a via 10, itself connected to a track 6 connected to the proximal connection pad 4 of the antenna.
• antenna namely the connection pad closest to the chip
• the track 6 thus acts as a conductive bridge to pass over the turns of the antenna 3 and bring the distal connection pad of the antenna near the terminal of the corresponding chip.
• the assembly constituted by the track 6 and the two vias 9,10 thus constitutes a conductive bridge which is commonly called a "strap" in English terminology.
• FIG. 1B represents a cross-section of the module of FIG. 1, along a fictitious cut line passing through the vias 9, 10 and the connecting track 6.
• the vias 9, 10 are one-eyed, while in the lower Figure 1B, they are open.
• the parasitic metal layer 14 which is due to the realization of vias 9,10 by metalization.
• FIG. 2A shows an electronic module 21 according to the invention, seen from below (FIG. 2A), that is to say a view of the chip and antenna side, and sectional views. ( Figures 2B to 2E) according to different sectional planes showing the details of the variants.
• the distal connection pad 5 of the antenna is brought back inside the encapsulation zone represented by line 27.
• the invention provides for locally deflecting the entire coil layer of the antenna 3 in the vicinity of the distal stud 5, towards the chip.
• the antenna 3 forms a localized recess 40 extending from the periphery of the module
• FIG. 2A also shows interconnection wells 23 which are openings in the substrate making it possible to bring connection wires.
• connection wire 22 is seen in particular between the contact interface 25 of the chip and an ISO contact 35 through an interconnection well 23. (or "bonding" well in English terminology) arranged in the dielectric 16 of the substrate.
• FIG. 2C which corresponds to a section along CC of FIG. 2A, there is shown a metal connection wire 12 between the contactless interface 30 of the chip 2, and the proximal connection pad 4 of the antenna, know the connection pad of the antenna that corresponds to the end of the antenna coil that is closest to the chip.
• this proximal stud 4 is located inside of the encapsulation zone 7, so that the wire 12 in question is a simple direct wire requiring no via.
• FIG. 2D which corresponds to a section along DD of FIG. 2A, there is shown a metal connection wire 12 between the contactless interface 32 of the chip and the distal connection pad 5 of the antenna, namely the external connection pad of the antenna which corresponds to the end of the antenna coil which is farthest from the chip.
• this distal stud 5 is also located inside the encapsulation zone 7, so that the wire 12 in question is also an electrical connection direct, for example a simple direct wire, requiring no via.
• FIG. 2E shows a figure similar to FIGS. 2B to 2D, with the difference that the sheet of antenna turns 3 which is deflected towards the chip (the recess 40) extends as far below the chip 2, which makes it possible to reduce the size of the encapsulation zone 7 and to further shorten the length of the connection wires 12 between the antenna and the chip.
• the chip 2 can be arranged in a window arranged in the thickness of the substrate 8, so as to obtain a module 21 with a thickness less than the sum of the thicknesses of the chip 2 and the substrate 8.
• the antenna coil ply 3 is subdivided into two series plies, namely an external ply 3e located at the periphery of the module, and an internal web 3i located between the outer ply and the encapsulation zone of the chip.
• only the inner ply 3i has a recess in the direction of the chip, and a distal contact pad 5 located in the encapsulation zone.
• the antenna used is then, depending on the connections made, either only the antenna formed by the internal layers of turns, or that formed by the internal and external layers in series. This allows in particular to choose a self-inductance value that is the best suited, depending on the input capacity of the chip used. This option therefore makes it possible to produce a module with a more universal use, for the physical assembly of several types of chips, and to select the electrical characteristic of the antenna by connecting it to the number of suitable antenna turns.
• the invention proposes a module design, in particular of a smart card module, in particular that it allows the economy of interconnections and vias between the faces of the film, while allowing a conventional assembly of the module. .

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• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Computer Hardware Design (AREA)
• Physics & Mathematics (AREA)
• General Physics & Mathematics (AREA)
• Theoretical Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Credit Cards Or The Like (AREA)
• Details Of Aerials (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=49378305

Family Applications (1)

Country Status (6)

Cited By (1)

Families Citing this family (9)

Citations (1)

Family Cites Families (8)

• 2012
  • 2012-10-15 FR FR1202740A patent/FR2996944B1/fr active Active
• 2013
  • 2013-10-14 CN CN201380065513.4A patent/CN104995642A/zh active Pending
  • 2013-10-14 EP EP13795543.1A patent/EP2907084A1/de not_active Withdrawn
  • 2013-10-14 WO PCT/FR2013/000269 patent/WO2014060659A1/fr active Application Filing
  • 2013-10-14 US US14/435,680 patent/US20150269476A1/en not_active Abandoned
• 2015
  • 2015-04-15 PH PH12015500827A patent/PH12015500827A1/en unknown

Patent Citations (1)

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