EP2798670A1 - Verfahren und vorrichtung zum bonden von substraten - Google Patents

Verfahren und vorrichtung zum bonden von substraten

Info

Publication number
EP2798670A1
EP2798670A1 EP11805881.7A EP11805881A EP2798670A1 EP 2798670 A1 EP2798670 A1 EP 2798670A1 EP 11805881 A EP11805881 A EP 11805881A EP 2798670 A1 EP2798670 A1 EP 2798670A1
Authority
EP
European Patent Office
Prior art keywords
substrates
substrate
bonding
fixing
carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11805881.7A
Other languages
German (de)
English (en)
French (fr)
Inventor
Jürgen Burggraf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EV Group E Thallner GmbH
Original Assignee
EV Group E Thallner GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EV Group E Thallner GmbH filed Critical EV Group E Thallner GmbH
Publication of EP2798670A1 publication Critical patent/EP2798670A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/18Handling of layers or the laminate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/16Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating
    • B32B37/18Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating involving the assembly of discrete sheets or panels only
    • B32B37/187Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating involving the assembly of discrete sheets or panels only the layers being placed in a carrier before going through the lamination process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1089Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
    • Y10T156/1092All laminae planar and face to face
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/17Surface bonding means and/or assemblymeans with work feeding or handling means
    • Y10T156/1702For plural parts or plural areas of single part
    • Y10T156/1744Means bringing discrete articles into assembled relationship

Definitions

  • the present invention relates to a device for bonding first substrates with second substrates according to claim 1 and a corresponding method according to claim 7.
  • the present invention is based on the basic idea, in particular using a standard bonding chamber, of bonding a plurality of substrate stacks arranged side by side on a carrier substrate in parallel or simultaneously from at least one first and one second substrate.
  • An independent invention therefore provides an apparatus for bonding first substrates to second substrates having the following features:
  • a receptacle for receiving one or in particular a plurality of carrier substrate / carrier substrates
  • a placement device for placing a plurality of first substrates on a side of the substrate facing away from the receptacle
  • Carrier substrate and a fixing device for fixing each of the first substrates on the substrate side to at least one fixing section of each first substrate.
  • the fixation or prefixing thus serves primarily to transport the carrier substrate produced according to the invention, in particular to a separately provided bonding chamber.
  • the fixing device is set up for the temporary fixing of each first substrate or that the first substrates are arranged on the first substrate
  • the temporary fixation is also known by the term "tearing", with polymers, adhesives or the formation of eutectic alloys being available for temporary fixation according to the invention Alternatively, van der Waals connections between two polished surfaces can also be used are known in the art and are often produced and used for example between silicon oxide surfaces.
  • the temporary fixation takes place in particular in such a way that the fixation is so strong that the carrier substrate with the substrate stacks temporarily fixed on it can be transported, without that on the
  • the first substrates are prior to placement
  • Aligned alignment marks which device according to a
  • a placement device (or a separate placement device) is arranged for aligning and placing the first substrates on alignment marks. In this way, the placement of further (in each case second, possibly even further, ie third, fourth, etc.) substrates on the first substrates is accelerated.
  • the second substrates in particular after alignment with alignment marks of the first substrates, are placed on the first substrates and / or, in particular temporarily, fixed.
  • the second substrates are in each case bonded simultaneously with the first substrates, in particular permanently, in particular in a bonding chamber designed as a separate bonding module.
  • FIG. 1 shows a plan view of a carrier substrate in a first
  • Figure 2 is a plan view of the carrier substrate with placed first
  • Figure 3 is a cross-sectional view taken along section line A-A of Figure 2 and
  • Figure 4 is a cross-sectional view taken along section line A-A of Figure 2 after
  • the alignment marks 3 can be detected by a placement device for placing a plurality of first substrates 2 on the substrate side ls such that the first substrates 2 can each be placed on an alignment mark 3 on the carrier substrate 1 (see FIG. 2).
  • the first substrates 2 have one, in particular less than half the diameter D i, preferably less than one third of the diameter D i, more preferably less than one quarter of the diameter D i
  • Embodiment 14 first substrates 2 on the substrate side l s
  • the diameter of the first substrates deviates less than 50%, better still less than 25%, advantageously less than 15% or most preferably less than 5% of the diameter of the carrier substrates.
  • the receptacle of the carrier substrates is designed so that it can simultaneously receive and fix a plurality of carrier substrates.
  • Suitable fixatives are known in the art.
  • vacuum fixation can be used. All other features and
  • Method steps behave analogously to the exemplary embodiment with only a single carrier substrate having a diameter which is larger than that of the first substrates.
  • a single carrier substrate having a diameter which is larger than that of the first substrates.
  • Carrier substrates on the side facing away from the receiving device side ls provided one or more registration marks for alignment of the first substrates.
  • the temporary fixation takes place in each case at least in a fixing section 2a of each first substrate 2, that is to say at least at one, in particular punctiform, fixing point.
  • Fixing force the fixing of each j edes first substrate 2 at two or three fixing sections 2a, wherein in the case of a single fixing section 2a of the fixing 2a is arranged in the center of each first substrate 2 (see embodiment of Figure 2).
  • the first substrates 2 of each row of first substrates 2, in particular equidistant from each other, are arranged distributed on the substrate side l s.
  • each first substrate 2 has at least two
  • Alignment marks 5 so that not only a translationally correct alignment of the first substrates 2 with the second substrates 2 'can take place, but also a rotationally correct orientation.
  • Substrate stack 4 (in the embodiment shown 14 substrate stack 4) to the carrier substrate 1 prefixed such that the carrier substrate 1 can be transported with the substrate stacks 4 to a bonding chamber, not shown, where the substrate stacks 4 are permanently bonded simultaneously.
  • an alignment accuracy when aligning the first and second substrates 2, 2 'as well as in aligning other substrates of in particular less than 100 ⁇ , preferably less than 50 ⁇ , more preferably less than 10 ⁇ , more preferably less than 2 ⁇ , feasible ,
  • the temporary bond in particular automatically by the permanent bonding, preferably by temperature exposure, dissolved.
  • these are gassed during bonding, in particular residue-free.
  • prefixing and / or bonding is preferably a
  • Carrier substrate 1 made of a material with a thermal
  • Expansion coefficient which does not deviate more than 5% from the thermal expansion coefficient of the first and / or second substrates 2, 2 ', in particular of the same material.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
EP11805881.7A 2011-12-28 2011-12-28 Verfahren und vorrichtung zum bonden von substraten Withdrawn EP2798670A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2011/074166 WO2013097894A1 (de) 2011-12-28 2011-12-28 Verfahren und vorrichtung zum bonden von substraten

Publications (1)

Publication Number Publication Date
EP2798670A1 true EP2798670A1 (de) 2014-11-05

Family

ID=45464568

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11805881.7A Withdrawn EP2798670A1 (de) 2011-12-28 2011-12-28 Verfahren und vorrichtung zum bonden von substraten

Country Status (8)

Country Link
US (1) US20140360666A1 (ja)
EP (1) EP2798670A1 (ja)
JP (1) JP2015509284A (ja)
KR (1) KR20140107343A (ja)
CN (1) CN104247000A (ja)
SG (1) SG2014009963A (ja)
TW (1) TW201330052A (ja)
WO (1) WO2013097894A1 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3034566A1 (fr) * 2015-03-31 2016-10-07 Commissariat Energie Atomique Procede d'assemblage de substrats
WO2021089127A1 (de) * 2019-11-05 2021-05-14 Ev Group E. Thallner Gmbh Verfahren zur herstellung einer analysevorrichtung

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4342090A (en) * 1980-06-27 1982-07-27 International Business Machines Corp. Batch chip placement system
US5236118A (en) * 1992-05-12 1993-08-17 The Regents Of The University Of California Aligned wafer bonding
US5348611A (en) * 1992-05-20 1994-09-20 General Signal Corporation Die paste transfer system and method
US6423613B1 (en) * 1998-11-10 2002-07-23 Micron Technology, Inc. Low temperature silicon wafer bond process with bulk material bond strength
DE10137376A1 (de) * 2001-07-31 2003-02-27 Infineon Technologies Ag Geklebte Chip- und Waferstapel
WO2006078631A2 (en) * 2005-01-18 2006-07-27 Suss Micro Tec Inc. High-throughput bond tool
US20090223628A1 (en) * 2008-03-07 2009-09-10 Semiconductor Energy Laboratory Co., Ltd. Manufacturing apparatus of composite substrate and manufacturing method of composite substrate with use of the manufacturing apparatus
FR2961519B1 (fr) * 2010-06-18 2012-07-06 Commissariat Energie Atomique Procede de collage calibre en epaisseur entre au moins deux substrats

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2013097894A1 *

Also Published As

Publication number Publication date
CN104247000A (zh) 2014-12-24
SG2014009963A (en) 2014-09-26
KR20140107343A (ko) 2014-09-04
JP2015509284A (ja) 2015-03-26
WO2013097894A1 (de) 2013-07-04
US20140360666A1 (en) 2014-12-11
TW201330052A (zh) 2013-07-16

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