EP2759001A1

EP2759001A1 - Led chip and method for manufacturing the same

Info

Publication number: EP2759001A1
Application number: EP12833315.0A
Authority: EP
Inventors: Ge Zhang
Original assignee: BYD Co Ltd; Shenzhen BYD Auto R&D Co Ltd
Current assignee: BYD Co Ltd; Shenzhen BYD Auto R&D Co Ltd
Priority date: 2011-09-22
Filing date: 2012-08-22
Publication date: 2014-07-30
Also published as: CN103022274A; WO2013040974A1; CN103022274B; EP2759001A4

Abstract

An LED chip and a method for manufacturing the same are provided. The method comprises steps of: a) providing an epitaxial wafer including a substrate, and a buffer layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer formed on the substrate sequentially; b) forming a conductive layer on the epitaxial wafer, and etching the conductive layer to form a plurality of first grooves in the conductive layer; c) providing a mold having a plurality of protrusions corresponding to the plurality of first grooves, and forming a phosphor layer on a surface of the mold having the plurality of protrusions; d) pressing the mold on the conductive layer vertically, so as to insert the plurality of protrusions into the corresponding first grooves; and e) performing a heat treatment, and removing the mold.

Description

LED CHIP AND METHOD FOR MANUFACTURING THE SAME

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and benefits of Chinese Patent Application Serial No. 201110282701.5, filed with the State Intellectual Property Office of P. R. China on September 22, 2011, the contents of which are incorporated herein by reference in its entirety.

FIELD

Exemplary embodiments of the present disclosure generally relate to semiconductor lighting, and in particular, relate to an LED (light-emitting diode) chip and a method for manufacturing the same.

BACKGROUND

With the development of an LED technology, there is a higher demand for the light extraction uniformity of an LED. To improve the light efficacy of the LED, an implementation of a new LED phosphor-coating technology is an effective way to improve the light extraction uniformity of an LED.

The conventional potting technology, ideally, may be used to form a substantially spherical cap-shaped phosphor layer, but in practice, this kind of phosphor layer has obvious structural defects. For example, the structure of the phosphor layer from a center to an edge of the phosphor layer is not uniform. Moreover, whether operated manually or operated by a machine, even in the same batch of LEDs, there may be some difference in the shape of the phosphor layers. Therefore, it is difficult to control the uniformity and consistency of the shape of the phosphor layers, thus leading to large color differences between different LEDs. Furthermore, since the microscopic surface of the phosphor layer is uneven, when a light is emitted, the color of the white light may be non-uniform, thus resulting in the appearance of non-uniform yellowish or bluish light spots.

SUMMARY

Embodiments of the present disclosure seek to solve at least one of the problems existing in the prior art to at least some extent, particularly to solve at least one defects of a conventional LED chip. According to a first aspect of the present disclosure, a method for manufacturing an LED chip is provided. The method for manufacturing the LED chip comprises steps of: a) providing an epitaxial wafer including a substrate, and a buffer layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer formed on the substrate sequentially; b) forming a conductive layer on the epitaxial wafer, and etching the conductive layer to form a plurality of first grooves in the conductive layer; c) providing a mold having a plurality of protrusions corresponding to the plurality of first grooves, and forming a phosphor layer on a surface of the mold having the plurality of protrusions; d) pressing the mold on the conductive layer vertically, so as to insert the plurality of protrusions into the corresponding first grooves; and e) performing a heat treatment, and removing the mold.

According to a second aspect of the present disclosure, an LED chip manufactured through the method according to the first aspect of the present disclosure is provided.

According to a third aspect of the present disclosure, an LED chip is provided. The LED chip comprises: an epitaxial wafer including a substrate, and a buffer layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer formed on the substrate sequentially; a conductive layer formed on the epitaxial wafer, with a plurality of first grooves formed in the conductive layer; and a phosphor layer formed on the conductive layer.

With the LED chips and the method for manufacturing the same according to embodiments of the present disclosure, by imprinting a phosphor layer with a uniform thickness and a flat surface on the surface of the epitaxial wafer, after a light emitted from the whole surface of the LED chip passes through the phosphor layer with a uniform thickness, a white light with a uniform and consistent color may be obtained.

Additional aspects and advantages of the embodiments of the present disclosure will be given in part in the following descriptions, become apparent in part from the following descriptions, or be learned from the practice of the embodiments of the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing summary, as well as the following detailed description, will be better understood when read in conjunction with the appended drawings. The embodiments illustrated in the figures of the accompanying drawings herein are by way of example and not by way of limitation. In the drawings: FIG. 1 is a schematic view illustrating an epitaxial wafer coated with a photoresist layer according to an embodiment of the present disclosure;

FIG. 2 is a schematic view illustrating an epitaxial wafer according to an embodiment of the present disclosure, with a plurality of first grooves formed in the epitaxial wafer;

FIG. 3 is a schematic view illustrating a mold according to an embodiment of the present disclosure;

FIG. 4 is a schematic view illustrating a mold coated with a phosphor layer according to an embodiment of the present disclosure; and

FIG. 5 is a schematic view illustrating an LED chip according to an embodiment of the present disclosure.

DETAILED DESCRIPTION

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

In the specification, unless specified or limited otherwise, relative terms such as "central", "longitudinal", "lateral", "front", "rear", "right", "left", "inner", "outer", "lower", "upper", "horizontal", "vertical", "above", "below", "up", "top", "bottom" as well as derivative thereof (e.g., "horizontally", "downwardly", "upwardly", etc.) should be construed to refer to the orientation as then described or as shown in the drawings under discussion. These relative terms are for convenience of description and do not require that the present disclosure be constructed or operated in a particular orientation.

According to an embodiment of the present disclosure, a method for manufacturing an LED chip comprises steps of:

a) providing an epitaxial wafer including a substrate, and a buffer layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer formed on the substrate sequentially;

b) forming a conductive layer on the epitaxial wafer, and etching the conductive layer to form a plurality of first grooves in the conductive layer;

c) providing a mold having a plurality of protrusions corresponding to the plurality of first grooves, and forming a phosphor layer on a surface of the mold having the plurality of protrusions; d) pressing the mold on the conductive layer vertically, so as to insert the plurality of protrusions into the corresponding first grooves; and

e) performing a heat treatment, and removing the mold.

The method for manufacturing the LED chip according to an embodiment of the present disclosure will be described below in detail in conjunction with the drawings.

In some embodiments, referring to FIG. 1, in step a), the epitaxial wafer may be commercially available. Generally, an epitaxial wafer used in the art includes a substrate, and a buffer layer, an n-type semiconductor layer, an light-emitting layer and a p-type semiconductor layer formed on the substrate sequentially.

Certainly, the epitaxial wafer may be obtained by methods known in the prior art. For example, MOCVD (metal organic chemical vapor deposition) may be used to form the epitaxial wafer, that is, MOCVD is used to form a buffer layer 2, an n-type semiconductor layer 3, a light-emitting layer 4 and a p-type semiconductor layer 5 on a substrate 1 sequentially. In some embodiments of the present disclosure, a material of the substrate 1 may be sapphire, SiC or GaN; the light-emitting layer 4 may be a quantum well layer, preferably a MQW (multiple quantum well) layer; and the n-type semiconductor layer 3 and the p-type semiconductor layer 5 may be nitride layers. In this embodiment, the n-type semiconductor layer 3 is an n-type GaN (gallium nitride) semiconductor layer, and the p-type semiconductor layer 5 is a p-type GaN semiconductor layer.

In some embodiments, referring to FIG. 1 and FIG. 2, in step b), the conductive layer 6 is deposited on the p-type semiconductor layer 5, and the conductive layer 6 is etched to form the plurality of first grooves 61 in the conductive layer 6. The shape of the plurality of first grooves 61 in the conductive layer 6 viewed from the top of the epitaxial wafer shown in FIG. 2 may be long strip-shaped or round hole-shaped. In some embodiments, the plurality of first grooves 61 in the conductive layer 6 extend into the p-type semiconductor layer 5 in a vertical direction.

In some embodiments of the present disclosure, the step b) comprises:

bl) forming the conductive layer 6 on the p-type semiconductor layer 5;

b2) coating a photoresist layer 7 on the conductive layer 6, and imprinting the photoresist layer 7 to form a plurality of second grooves corresponding to the plurality of first grooves 61; and b3) etching the conductive layer 6 to form the plurality of first grooves 61, and removing the photoresist layer 7.

In some embodiments, by etching, the plurality of first grooves 61 may extend into the p-type semiconductor layer 5.

In some embodiments, in step bl), the conductive layer 6 is deposited on the p-type semiconductor layer 5 by an electron beam evaporator at a high temperature. During the depositing, the temperature is controlled at about 295°C to about 315°C, the flow rate of oxygen is about 9sccm (standard-state cubic centimeter per minute), the initial deposition pressure is controlled at about 2.5^x 10e^"6TOrr, the deposition rate is controlled at about 0.5A/s to about lA/s, and the rotation speed of the evaporation umbrella is controlled at about lOrpm to about 12rpm. In some embodiments, the material of the conductive layer 6 may be ITO (indium tin oxide), aluminum-doped ZnO or Ni/Au. In one embodiment, the material of the conductive layer 6 may be ITO.

In step b2), the photoresist layer 7 is spin-coated on the conductive layer 6 by a spin-coating machine, the thickness of the photoresist layer 7 is about 2μιη to about 3μιη, and the photoresist layer 7 is imprinted to form the plurality of second grooves corresponding to the plurality of first grooves 61.

The imprinting method described above is a method commonly used in the prior art. In some embodiments, an imprinting mold is provided according to the required second grooves, and the imprinting mold has a plurality of protrusions corresponding to the plurality of second grooves in the photoresist layer. For example, the shape of the protrusions of the imprinting mold may be long strip-shaped or round hole-shaped.

The imprinting mold is pressed on the epitaxial wafer coated with a photoresist vertically at a suitable temperature under a suitable pressure, and the imprinting mold is removed to obtain the photoresist layer 7 with required second grooves formed therein, so that the photoresist layer 7 covers a first part of the conductive layer 6, and a second part of the conductive layer 6 corresponding to the plurality of second grooves is exposed.

In step b3), the conductive layer 6 is etched by ICP (inductively coupled plasma) dry etching to form the plurality of first grooves 61 corresponding to the plurality of second grooves in the photoresist layer 7. In some embodiments, the etching is continued to extend the plurality of first grooves 61 into the p-type semiconductor layer 5. In other words, the plurality of first grooves 61 extend into the p-type semiconductor layer 5 in the vertical direction, so as to roughen a surface of the p-type semiconductor layer 5, destroy the total reflection angle at an interface between the p-type semiconductor 5 and the conductive layer 6, and increase the light extraction efficiency of the epitaxial wafer. In some embodiments of the present disclosure, the etching is carried out using a gas mixture of Cl₂, CH₄, BC1₃ and Ar under a pressure of about 0.6Pa and a RF (radio frequency) energy of about 100W, in which the flow rates of Cl₂, CH₄, BC1₃ and Ar are about 20sccm, about lOsccm, about 5sccm and about 3sccm respectively. After the etching, the photoresist layer 7 remaining on the surface of the conductive layer 6 is removed to form the plurality of first grooves 61 having a depth of about 50nm to about lOOnm.

In some embodiments of the present disclosure, the method for manufacturing the LED chip further comprises: after step b), defining the position of electrodes on the epitaxial wafer by a lithography process, and forming a first electrode 51 of the p-type semiconductor layer 5 and a second electrode (not shown) of the n-type semiconductor layer 3.

In some embodiments, referring to FIG. 3 and FIG. 4, in step c), a mold 8 having a plurality of protrusions corresponding to the plurality of first grooves 61 is provided, and a phosphor layer 9 is coated on a surface of the mold 8 having the plurality of protrusions by screen printing or spraying. A material of the phosphor layer 9 is a uniform mixture of a phosphor and an adhesive, and the adhesive is epoxy resin or silicone, preferably silicone. In some embodiments, the phosphor is a nanoscale phosphor, which may effectively reduce the thickness of the phosphor layer 9, inhibit the generation of the diffuse reflection of light, and reduce losses caused by the fact that light penetrates through silicone. Therefore, the brightness and light extraction efficiency of the LED chip may be improved.

In some embodiments, referring to FIG. 5, in step d), the mold 8 coated with the phosphor layer 9 is pressed on the conductive layer 6 vertically. In step e), a heat treatment is performed to improve the adhesive force between the phosphor layer 9 and the epitaxial wafer. The heat treatment is performed at a temperature of about 100°C to about 150°C for about 30 minutes to about 50 minutes. After the phosphor layer 9 is closely joined to a surface of the epitaxial wafer, the mold 8 is removed to form a uniform and flat phosphor layer 9 covering the surface of the epitaxial wafer.

In some embodiments, a region of the surface of the mold 8 having the plurality of protrusions and corresponding to the electrodes of the epitaxial wafer, i.e., the first electrode 51 of the p-type semiconductor layer 5 and the second electrode of the n-type semiconductor layer 3, is not coated with the phosphor layer 9, and when the mold 8 is pressed on the conductive layer 6 vertically, the phosphor layer 9 may not cover the electrode region of the epitaxial wafer. In some embodiments, before step d), the method for manufacturing the LED chip further comprises: coating a layer of a tackifier on a surface of the conductive layer 6, in which the tackifier is a silane coupling agent. The tackifier may enhance the adhesive force between the epitaxial wafer and the phosphor layer 9, so that the phosphor layer 9 may not easily break away from the conductive layer 6 and the surface of the epitaxial wafer due to heating, etc. The silane coupling agent may be HMDS (hexamethyldisilazane), KH-560 silane coupling agent, KH-570 silane coupling agent, KH-550 silane coupling agent or other silane coupling agents.

According to an embodiment of the present disclosure, an LED chip is provided, in which the phosphor layer of the LED chip is manufactured through the method described above.

According to an embodiment of the present disclosure, an LED chip is provided. The LED chip comprises: an epitaxial wafer including a substrate 1, and a buffer layer 2, an n-type semiconductor layer 3, a light-emitting layer 4 and a p-type semiconductor layer 5 formed on the substrate 1 sequentially; a conductive layer 6 formed on the epitaxial wafer, with a plurality of first grooves 61 formed in the conductive layer 6; and a phosphor layer 9 formed on the conductive layer 6.

In some embodiments, the LED chip further comprises: a layer of a tackifier formed between the conductive layer 6 and the phosphor layer 9, in which the tackifier is a silane coupling agent.

In some embodiments, the shape of the plurality of first grooves 61 is long strip-shaped or round hole-shaped. In some embodiments, the plurality of first grooves 61 in the conductive layer 6 extend into the p-type semiconductor layer 5 in a vertical direction. In some embodiments, the depth of the plurality of first grooves 61 is about 50nm to about lOOnm.

In some embodiments, a material of the phosphor layer 9 is a uniform mixture of a phosphor and an adhesive, and the adhesive is epoxy resin or silicone. In some embodiments, the phosphor is a nanoscale phosphor.

With the LED chips and the method for manufacturing the same according to embodiments of the present disclosure, by imprinting a phosphor layer with a uniform thickness and a flat surface on the surface of the epitaxial wafer, after a light emitted from the whole surface of the LED chip passes through the phosphor layer with a uniform thickness, a white light with a uniform and consistent color may be obtained, thus improving the distribution uniformity of the light spots of the white LED.

It will be appreciated by those skilled in the art that changes could be made to the examples described above without departing from the broad inventive concept. It is understood, therefore, that this disclosure is not limited to the particular examples disclosed, but it is intended to cover modifications within the spirit and scope of the present disclosure as defined by the appended claims.

Claims

WHAT IS CLAIMED IS:

1. A method for manufacturing an LED chip, comprising steps of:

e) performing a heat treatment, and removing the mold.

2. The method of claim 1, before step d), further comprising:

coating a layer of a tackifier on a surface of the conductive layer, wherein the tackifier is a silane coupling agent.

3. The method of claim 1, wherein step b) comprises:

bl) forming the conductive layer on the p-type semiconductor layer;

b2) coating a photoresist layer on the conductive layer and imprinting the photoresist layer to form a plurality of second grooves corresponding to the plurality of first grooves; and

b3) etching the conductive layer to form the plurality of first grooves, and removing the photoresist layer.

4. The method of claim 3, wherein the etching is carried out using a gas mixture of Cl₂, CH₄, BCI₃ and Ar under a pressure of about 0.6Pa and a RF energy of about 100W, in which the flow rates of Cl₂, CH₄, BCI₃ and Ar are about 20sccm, about lOsccm, about 5sccm and about 3sccm respectively.

5. The method of claim 3, wherein the thickness of the photoresist layer is about 2μιη to about

3μιη.

6. The method of claim 1, wherein the shape of the plurality of first grooves in the conductive layer is long strip-shaped or round hole-shaped.

7. The method of claim 1, wherein the plurality of first grooves in the conductive layer extend into the p-type semiconductor layer in a vertical direction.

8. The method of claim 7, wherein the depth of the plurality of first grooves is about 50nm to about lOOnm.

9. The method of claim 1, after step b), further comprising:

forming a first electrode of the p-type semiconductor layer and a second electrode of the n-type semiconductor layer.

10. The method of claim 1, wherein the conductive layer is an ITO layer, an aluminum-doped ZnO film or a Ni/Au film.

11. The method of claim 1, wherein a material of the substrate is sapphire, SiC or GaN.

12. The method of claim 1, wherein a material of the phosphor layer is a uniform mixture of a phosphor and an adhesive, and the adhesive is epoxy resin or silicone.

13. The method of claim 12, wherein the phosphor is a nanoscale phosphor.

14. The method of claim 1, wherein the heat treatment is performed at a temperature of about 100°C to about 150°C for about 30 minutes to about 50 minutes.

15. An LED chip manufactured through the method of any of claims 1-14.

16. An LED chip, comprising:

an epitaxial wafer including a substrate, and a buffer layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer formed on the substrate sequentially;

a conductive layer formed on the epitaxial wafer, with a plurality of first grooves formed in the conductive layer; and

a phosphor layer formed on the conductive layer.

17. The LED chip of claim 16, further comprising:

a layer of a tackifier formed between the conductive layer and the phosphor layer, wherein the tackifier is a silane coupling agent.

18. The LED chip of claim 16, wherein the shape of the plurality of first grooves is long strip-shaped or round hole-shaped.

19. The LED chip of claim 16, wherein the plurality of first grooves in the conductive layer extend into the p-type semiconductor layer in a vertical direction.

20. The LED chip of claim 19, wherein the depth of the plurality of first grooves is about 50nm to about lOOnm.

21. The LED chip of claim 16, wherein a material of the phosphor layer is a uniform mixture of a phosphor and an adhesive, and the adhesive is epoxy resin or silicone.

22. The LED chip of claim 21, wherein the phosphor is a nanoscale phosphor.