Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
  • H01L31/042—PV modules or arrays of single PV cells
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
  • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
  • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0216—Coatings
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0216—Coatings
  • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
  • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
  • H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
  • H01L31/022466—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
  • H01L31/022466—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
  • H01L31/022475—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers composed of indium tin oxide [ITO]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0232—Optical elements or arrangements associated with the device
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0236—Special surface textures
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/52—PV systems with concentrators
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/547—Monocrystalline silicon PV cells

Definitions

• the present disclosure relates generally to photovoltaic cells. More specifically, the present disclosure relates to reducing light obstruction by using through silicon vias.
• Conventional solar cells receive energy from a light source such as the sun, and convert the energy into electricity.
• Conventional solar cells generally include a photovoltaic layer that receives light photons and converts those photons into electricity.
• a conductive electrode layer such as one made of Indium-Tin-Oxide, with an irregular surface has been used to deflect more photons into the photovoltaic layer.
• metallic traces are positioned on top of the electrode layer on one side and a metallic layer is positioned on the other side of the photovoltaic layer.
• a load connected between the metallic traces on the one side and the metallic layer on the other side of the photovoltaic layer provides a conduction path for the generated electricity.
• the metallic traces being on the light receiving side of the photovoltaic cell, will obstruct some light from entering into the photovoltaic layer and hence will reduce the efficiency of the solar cell.
• a photovoltaic cell includes a photovoltaic layer with a first node and a second node.
• a first conductive layer is electrically coupled to the second node of the photovoltaic layer.
• a second conductive layer is positioned adjacent to but electrically insulated from the first conductive layer on the second node of the photovoltaic layer, so that the second conductive layer will not block light impinging on the first node of the photovoltaic layer.
• At least one through silicon via is electrically coupled from the first node of the photovoltaic layer to the second conductive layer, with the through silicon via passing through but electrically insulated from the body of the photovoltaic layer and the first conductive layer.
• a light refracting layer can be coupled to the first node of the photovoltaic layer to deflect light into the photovoltaic layer.
• the through silicon via is electrically coupled directly to the first node, the light refracting layer does not need to be an electrode layer and does not need to be conductive and therefore can have a structure that reduces light absorption without increasing the internal resistance.
• an apparatus for reducing obstruction of light to a photovoltaic cell includes a means for receiving light and absorbing the light to generate electricity between polarized nodes.
• a first means for conducting electricity from a first polarized node of the light receiving means while not blocking light from the light receiving means is also included.
• a second means for conducting electricity from a second polarized node of the light receiving means while not blocking light from the light receiving means is included in the apparatus.
• a method of reducing blocked light to a solar cell includes positioning a photovoltaic layer having a first node and a second node. A first conductive layer is then positioned adjacent to and electrically coupled to the second node of the photovoltaic layer so the first conductive layer does not block light from the photovoltaic layer. A second conductive layer is then positioned adjacent to and electrically insulated from the first conductive layer, so the second conductive layer does not block light from the photovoltaic layer.
• At least one through silicon via is then fabricated between the first node of the photovoltaic layer through the photovoltaic layer and the first conductive layer to the second conductive layer while at least one through silicon via is electrically insulated from the photovoltaic layer and the first conductive layer.
• FIGURE 1 is a cross section of a conventional solar cell.
• FIGURE 2 is a top view of the conventional solar cell as depicted in FIGURE 1.
• FIGURE 3 is a cross section of an exemplary photovoltaic cell using through silicon vias.
• FIGURE 4 is a top view of the photovoltaic cell as depicted in FIGURE 3.
• FIGURE 1 is a cross section of a conventional solar cell 100 that includes a photovoltaic layer 102, a metal layer 104, an electrode layer 106, and a metal layer 108.
• the metal layer 104 is electrically coupled to a bottom node 102b of the photovoltaic layer 102 and electrically coupled to a load 116.
• the electrode layer 106 is conventionally composed of an Indium-Tin-Oxide material, which is approximately 90% In 2 O 3 and 10% SnO 2 .
• the electrode layer 106 is electrically coupled to a light receiving top node 102a of the photovoltaic layer 102.
• the electrode layer 106 is a conductive layer that deflects light into the photovoltaic layer 102 to increase electricity generation.
• the electrode layer 106 conventionally includes a scalloped surface, so photon 112a and photon 114b penetrate the electrode layer 106 at an angle to be reflected off the surface (e.g., photon 112b and photon 114b), or be deflected into the photovoltaic layer 102 and be absorbed.
• a metal layer 108 having metal traces (or electrical leads) such as metal traces 108a and 108b are positioned above and in electrically conductive relationship to the electrode layer 106.
• FIGURE 2 is a top view of the solar cell 100 as depicted in Figure 1 showing the metal layer 108 with its metal traces 108a, 108b, 108c, and 108d disposed on the electrode layer 106 ( Figure 1) in electrically conducting relationship with the light receiving top node 102a of the photovoltaic layer 102.
• the metal layer 108 has a y-axis dimension defined as Y metal, and an x-axis dimension defined as X metal.
• the photovoltaic layer 102 has a y-axis dimension defined as Y cell, and an x-axis dimension defined as X cell.
• Conventional metal connections to the electrode layer 106 are configured as a metal mesh that covers area on the photovoltaic layer 102, and has the traces 108a, 108b, 202, 204 that prevent light from impinging on the photovoltaic layer 102.
• the photons blocked by the conventional metal mesh can be estimated using the formula (X metal *(Y cell + Ymetal) + X cell*Ymetal)/((Y cell + Y metal)*(X cell + X metal)).
• the result is an estimate of the ratio of the surface area of the solar cell 100 that is blocked by the metal layer 108.
• FIGURE 3 is a cross section of an exemplary photovoltaic cell 300 with through silicon vias that extend through the photovoltaic layer 302 and so reduce the area of the side that would be blocked by the metal traces of conventional solar cells.
• the photovoltaic cell 300 includes the photovoltaic layer 302 having polarized nodes such as a light receiving top node 302a, and a bottom node 302b opposite of the light receiving top node 302a.
• top and bottom nodes are described, of course other orientations are possible.
• the photovoltaic layer 302 is made of a semiconductor material, such as one of Silicon (Si), Gallium Arsenide (GaAs), Cadmium Telluride (CdTe), and Copper Indium Diselenide (CuInSe 2 ).
• a first conductive layer 303 is electrically coupled to the bottom node 302b of the photovoltaic layer 302.
• a second conductive layer 304 is positioned where it will not block any light to the photovoltaic layer 302.
• the second conductive layer 304 may be positioned adjacent to but electrically insulated from the first conductive layer 303.
• the second conductive layer 304 is adjacent to the first conductive layer 303, the surface area of the second conductive layer 304 can be continuous which reduces the internal resistance of the second conductive layer 304 so to improve efficiency.
• the first conductive layer 303 and the second conductive layer 304 can be made of a conductive material such as metal. Both the first conductive layer 303 and the second conductive layer 304 are electrically coupled to a load 318, so the load 318 can promote current flow between the first conductive layer 303 and the second conductive layer 304.
• At least one via such as a through silicon via
• the through silicon vias 306 and 308 can have a sloped profile (e.g., as a result of a wet etch process).
• the through silicon vias 306 and 308 can be any conductive material, such as a metal or a silicon material, that conducts electricity through the photovoltaic cell 300.
• Each of the through silicon vias 306 and 308 respectively have first ends 306a, 308a electrically coupled to the light receiving top node 302a.
• the through silicon vias 306 and 308 respectively have second opposing ends 306b and 308b electrically coupled to the second conductive layer 304.
• Each through silicon via can extend from the light receiving top node 302a of the photovoltaic layer 302 through the photovoltaic layer 302 and the first conductive layer 303 to the second conductive layer 304, so there are conductive paths 320 and 322 between the light receiving top node 302a and the second conductive layer 304.
• the conductive paths 320 and 322 are not limited to a vertical configuration, as depicted in FIGURE 3, but may be configured horizontally or in any other slope.
• the through silicon vias 306 and 308 including the conductive paths 320 and 322 are electrically insulated (i.e., isolated) from the photovoltaic layer 302 and the first conductive layer 303. Further, multiple through silicon vias can be arranged across the photovoltaic layer 302, thus providing electrical contact points on the top surface of the photovoltaic layer 302.
• a light refracting layer 314 is positioned on the light receiving top node 302a to deflect light into the photovoltaic layer 302, and reduce the amount of light reflected (e.g., photon 316b).
• the light refracting layer 314 is electrically coupled to the light receiving top node 302a.
• the light refracting layer 314 having translucent properties can deflect light photons (e.g., photon 316a) into the photovoltaic layer 302 and electrically conduct the generated electricity from the photovoltaic layer 302 to the through silicon via array 400 as to be described below in Figure 4.
• the light refracting layer 314 can be made of the Indium-Tin-Oxide material, or of other conductive materials. Further, having the through silicon vias spaced relatively close to each other reduces the internal resistance, thus allowing the thickness of the light refracting layer 314 to be reduced so more light can penetrate the photovoltaic layer 302.
• the through silicon via connections to the light refracting layer 314 reduce or eliminate the need of having metallization requirements exist above the photovoltaic layer 302 because the through silicon vias can provide passage to the second conductive layer 304 through the body of the photovoltaic layer 302.
• any electrical connection between the light receiving top node 302a and the second conductive layer 304 would travel through the through silicon vias 306 and 308 while reducing the area of the light receiving top node 302a that obstructs the light from entering the photovoltaic layer 302 so as to improve efficiency.
• through silicon via includes the word silicon, it is noted that through silicon vias are not necessarily constructed in silicon. Rather, the material can be any device substrate material. In some embodiments, the photovoltaic cell 300 and the above-described elements may be varied and are not limited to the functions, structures, configurations, implementations, or examples provided.
• FIGURE 4 is a top view of the photovoltaic cell 300 ( Figure 3) that includes the photovoltaic layer 302 with through silicon vias 306, 307, 308, and 309 electrically coupled to the light receiving top node 302a ( Figure 3).
• the through silicon vias 306, 307, 308, and 309 are in an electrically conductive relationship with each other on the photovoltaic layer 302, which have an effect on the internal resistance between the through silicon vias.
• the through silicon vias can be positioned in spaced relationship to each other along the light receiving top node 302a of the photovoltaic layer 302, thus forming a through silicon via array 400.
• the through silicon via array 400 provides any desired number of electrical contact points between the photovoltaic layer 302 and the light refracting layer 314 to provide more conductive paths to the second conductive layer 304 so to improve efficiency. Moreover, the internal resistances of the photovoltaic cell 300 can be reduced by either spacing the through silicon vias closer to each other or increasing the surface area of the second conductive layer 304 ( Figure 3). The spacing between each through silicon via can be adjusted according to the amount of internal resistance allowable by design requirements. In some embodiments, the through silicon via array 400 and the above- described elements may be varied and are not limited to the functions, structures, configurations, implementations, or examples provided.

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• 2009
  • 2009-02-18 US US12/372,778 patent/US20100206370A1/en not_active Abandoned
• 2010
  • 2010-02-18 WO PCT/US2010/024610 patent/WO2010096575A2/en active Application Filing
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