EP2315273B1 - Dispositif électroluminescent et conditionnement de dispositif électroluminescent - Google Patents

Dispositif électroluminescent et conditionnement de dispositif électroluminescent Download PDF

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Publication number
EP2315273B1
EP2315273B1 EP10188577.0A EP10188577A EP2315273B1 EP 2315273 B1 EP2315273 B1 EP 2315273B1 EP 10188577 A EP10188577 A EP 10188577A EP 2315273 B1 EP2315273 B1 EP 2315273B1
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Prior art keywords
layer
light emitting
emitting device
type semiconductor
conductivity type
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German (de)
English (en)
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EP2315273A1 (fr
Inventor
Sung Min Hwang
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LG Innotek Co Ltd
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LG Innotek Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials

Definitions

  • the application relates to a light emitting device, a light emitting device package, and a lighting system.
  • a light emitting device includes a p-n junction diode having a characteristic of converting electric energy into optical energy.
  • the p-n junction diode can be formed by combining group III-V elements of the periodic table.
  • the LED can represent various colors by adjusting the compositional ratio of compound semiconductors.
  • a nitride semiconductor represents superior thermal stability and wide band gap energy so that the nitride semiconductor has been spotlighted in the field of optical devices and high-power electronic devices.
  • blue, green, and UV light emitting devices employing the nitride semiconductor have already been developed and extensively used.
  • a current may flow reversely when electrostatic discharge (ESD) occurs, thereby causing damage to an active layer formed in a light emitting area.
  • ESD electrostatic discharge
  • Zener diode is mounted in a package in the reverse direction of the LED while connecting the Zener diode with the LED in parallel.
  • a current flows to the LED so that the LED emits the light.
  • the current flows to the Zener diode, so that the LED can be prevented from being damaged.
  • the Zener diode is mounted in the package, so that light absorption may be lowered.
  • US2007/0284606 A1 proposes to utilize an integrated thick-film capacitor or a Schottky barrier for ESD protection.
  • n and p type electrodes are formed at the top and bottom of the light emitting device, respectively, for current injection.
  • electrons and holes injected by the n and p type electrodes carry to an active layer and are combined with each other to emit light.
  • the light may be emitted to the outside, or reflected by the n type electrode and disappeared inside the light emitting device.
  • light emitted under the n type electrode is reflected by the n type electrode, so that light emission efficiency may be reduced.
  • the light reflected by the n type electrode is re-absorbed, so that heat may be emitted.
  • the life span and the reliability of the light emitting device may be lowered due to current crowding.
  • WO 2007/036164 A1 and JP2927158 B2 propose to utilize a current blocking layer and a reflective layer placed under the top electrode.
  • the embodiment of the invention as defined in claim 1 provides a light emitting device, a light emitting device package, and a lighting system, capable of preventing the light emitting device from being damaged due to ESD while preventing light absorption from being lowered.
  • the embodiment provides a light emitting device, a light emitting device package, and a lighting system, capable of improving light extraction efficiency while enhancing current spreading efficiency.
  • a light emitting device package includes a package body, third and fourth electrode layers installed in the package body, and a light emitting device electrically connected to the third and fourth electrode layers.
  • a lighting system includes a substrate and a light emitting module including a light emitting device package over the substrate.
  • the light emitting device package includes a package body, third and fourth electrode layers installed in the package body, and the light emitting device electrically connected to the third and fourth electrode layers.
  • a layer or film
  • it can be directly on another layer or substrate, or intervening layers may also be present.
  • intervening layers may also be present.
  • a layer when a layer is referred to as being 'under' another layer, it can be directly under another layer, and one or more intervening layers may also be present.
  • a layer when referred to as being 'between' two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
  • FIG. 1 is a sectional view showing a light emitting device according to a first illustrative example
  • FIG. 2 is a circuit diagram showing the light emitting device according to the embodiment.
  • the light emitting device includes a light emitting structure 110 including a first conductivity type semiconductor layer 102, an active layer 104, and a second conductivity type semiconductor layer 106, a dielectric layer 130 formed in a cavity defined by removing a portion of the light emitting structure 110, and a second electrode layer 120 formed on the dielectric layer 130.
  • the first conductivity type semiconductor layer 102, the dielectric layer 130, and the second electrode layer 120 can carry out the function of a capacitor C.
  • a capacitor C is shown in FIG. 1 , the illustrative example is not limited thereto. According to another illustrative example, a plurality of capacitors may be provided.
  • the light emitting device can be prevented from being damaged due to ESD (Electrostatic Discharge) while preventing light absorption from being lowered.
  • ESD Electrostatic Discharge
  • an electrode is formed over the dielectric layer, thereby forming a capacitor in parallel to the LED. Therefore. when a DC constant voltage is applied, a current flows to a light emitting layer, which is the active layer 104, to emit light. In an ESD shock in the form of a pulse occurring in discharging, energy having a high-frequency component passes through the dielectric layer of the capacitor, so that the light emitting layer can be protected.
  • the capacitor is formed in an LED chip to prevent the LED from being damaged due to ESD, so that package cost can be reduced, and the manufacturing process can be simplified. Accordingly, light absorption can be prevented from being lowered.
  • the reliability for the light emitting device can be improved due to current spreading.
  • FIG. 2 is a circuit diagram showing the light emitting device according to the embodiment.
  • the first conductivity type semiconductor layer 102, the dielectric layer 130, and the second electrode layer 120 can perform the function of the MOS (Metal/Oxide/Semiconductor) capacitor C.
  • MOS Metal/Oxide/Semiconductor
  • the light emitting device can be realized as the circuit shown in FIG. 2 .
  • a forward voltage is applied according to a constant voltage
  • a current flows through the LED to emit light.
  • a reverse voltage is applied according to the ESD, the current flows through the MOS capacitor C.
  • FIG. 3 is a view showing a waveform of the light emitting device according to the embodiment in the ESD.
  • the pulse waveform is transformed into a signal having a high-frequency component.
  • the intensity of the high-frequency component is increased.
  • j represents the factor of an imaginary part
  • Z lm is impedance made by a capacitor
  • a region for a cavity A provided perpendicularly under a first electrode 140 has no active layer 104, light derived from the recombination of carriers (electrons and holes) is not created in the region of the cavity A.
  • the dielectric layer 130 is formed. Accordingly, current is not smoothly supplied to the region for the cavity A. Therefore, light is not emitted from the active layer 104 over the cavity A, so that the light absorption by the first electrode 140 over the cavity A can be minimized.
  • the LED can be prevented from being damaged due to ESD (Electrostatic Discharge) while preventing light absorption from being lowered.
  • ESD Electrostatic Discharge
  • an electrode is formed over the dielectric layer, thereby forming a capacitor in parallel to the LED. Therefore, when a DC constant voltage is applied, a current flows to a light emitting layer, which is the active layer 104, to emit light.
  • a light emitting layer which is the active layer 104
  • shock in the form of a pulse occurring in discharging energy having a high-frequency component passes through the dielectric layer of the capacitor, so that the light emitting layer can be protected.
  • the capacitor is formed in the LED chip to prevent the LED from being damaged due to ESD, so that package cost can be reduced, and the manufacturing process can be simplified. In addition, light absorption can be prevented from being lowered.
  • current flow can be effectively adjusted, so that light extraction efficiency can be improved.
  • the reliability for the light emitting device can be improved due to current spreading.
  • the light emitting device may include GaN, GaAs, GaAsP, or GaP.
  • a green or blue LED may include GaN (InGaN)
  • a yellow or red LED may include InGaAIP, or AIGaAs. According to the composition of materials, full colors can be realized.
  • the first substrate 101 may include a conductive substrate or an insulating substrate.
  • the first substrate 101 may include at least one selected from the group consisting of Al 2 O 3 , SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga 2 0 3 .
  • the first substrate 101 may be provided thereon with a concave-convex structure, but the embodiment is not limited thereto.
  • a wet washing process is performed with respect to the first substrate 101, so that impurities can be removed from the surface of the first substrate 101.
  • the light emitting structure 110 including the first conductivity type semiconductor layer 102, the active layer 104, and the second conductivity type semiconductor layer 106 is formed on the first substrate 101.
  • a buffer layer (not shown) may be formed on the first substrate 101.
  • the buffer layer can attenuate the lattice mismatch between the material of the light emitting structure 110 and the first substrate 101.
  • the buffer layer may include at least one selected from the group consisting of GaN, InN, AIN, InGaN, AlGaN, InAIGaN, and AlInN which are group III-V compound semiconductors.
  • An undoped semiconductor layer may be formed on the buffer layer, but the embodiment is not limited thereto.
  • the first conductivity type semiconductor layer 102 may be realized by using group III-V compound semiconductors doped with first conductive dopants. If the first conductivity type semiconductor layer 102 is an N type semiconductor layer, the first conductivity type dopant may include Si, Ge, Sn, Se, or Te as the N type dopant, but the embodiment is not limited thereto.
  • the first conductivity type semiconductor layer 102 may include a semiconductor material having a composition formula of In x Al y Ga 1-x-y N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1).
  • the first conductivity type semiconductor layer 102 may include at least one selected from the group consisting of GaN, InN, A1N, InGaN, A1GaN, InA1GaN, AlInN, A1GaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, and InP.
  • the first conductivity type semiconductor layer 102 may include an N type GaN layer formed through a CVD (Chemical Vapor Deposition) scheme, an MBE (Molecular Beam Epitaxy) scheme, a sputtering scheme, or a HVPE (Hydride Vapour Phase Epitaxy) scheme.
  • the first conductivity type semiconductor layer 102 may be formed by applying trimethylgallium gas (TMGa), ammonia gas (NH 3 ), nitrogen gas (N 2 ), or silane gas (SiH 4 ) including N type impurities such as Si to the chamber.
  • TMGa trimethylgallium gas
  • NH 3 ammonia gas
  • N 2 nitrogen gas
  • SiH 4 silane gas
  • the active layer 104 is formed on the first conductivity type semiconductor layer 102.
  • the active layer 104 may include at least one of a single quantum well structure, a multi-quantum well structure, a quantum-wire structure, and a quantum dot structure.
  • the active layer 104 may be formed in the multi-quantum well structure by injecting TMGa, NH 3 , N 2 , or TMIn, but the embodiment is not limited thereto.
  • the active layer 104 has a well/barrier layer which is prepared as a pair structure, such as an InGaN/GaN layer, an InGaN/InGaN layer, an AlGaN/GaN layer, an InAlGaN/GaN layer, a GaAs(InGaAs)/AlGaAs layer or a GaP(InGaP)/AlGaP layer, but the embodiment is not limited thereto.
  • the well layer includes material having a band gap lower than that of the barrier layer.
  • a conductive clad layer may be provided over and/or under the active layer 104.
  • the conductive clad layer may include an AlGaN-based semiconductor, and may have a band gap higher than that of the active layer 104.
  • the second conductivity type semiconductor layer 106 is formed on the active layer 104.
  • the conductivity type conductive semiconductor layer 106 may include compound semiconductors of group III-V elements doped with second conductivity type dopants.
  • the second conductivity type semiconductor layer 106 may include semiconductor materials having a composition formula of In x Al y Ga 1-x - y N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1),
  • the second conductivity type semiconductor layer 106 may be selected from the group consisting of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP.
  • the second conductivity type dopant may include Mg, Zn, Ca, Sr, or Ba as a P type dopant.
  • the second conductivity type semiconductor layer 106 may have a single layer structure or a multiple layer structure, but the embodiment is not limited thereto.
  • the second conductivity type semiconductor layer 106 may include a P type GaN layer formed by injecting TMGa, NH 3 , N 2 , and (EtCp 2 Mg) ⁇ Mg(C 2 H 5 C 5 H 4 ) 2 ⁇ including P type impurities such as Mg into the chamber, but the embodiment is not limited thereto.
  • the first conductivity type semiconductor layer 102 may be realized by using an N type semiconductor layer
  • the second conductivity type semiconductor layer 106 may be realized by using a P type semiconductor layer, but the embodiment is not limited thereto.
  • a semiconductor such as an N type semiconductor layer (not shown), having polarity opposite to the polarity of the second conductivity type semiconductor layer may be formed.
  • the light emitting structure 110 may be realized by using one of an N-P junction structure, a P-N junction structure, an N-P-N junction structure, and a P-N-P junction structure.
  • the cavity A is formed by removing portions of the second conductivity type semiconductor layer 106, the active layer 104, and the second conductivity type semiconductor layer 106.
  • the cavity A may include a recess, a groove, a trough or a trench.
  • an etching process may be performed from a portion of the second conductivity type semiconductor layer 106, which is provided perpendicularly under the first electrode 140, to be formed later, to a point at which the first conductivity type semiconductor layer 102 is exposed.
  • a dry etching process or a wet etching process can be performed.
  • a current is not smoothly supplied to the region for the cavity A, so that light emission does not occur over the cavity A. Accordingly, light absorption by the first electrode 140 provided over the cavity A can be minimized.
  • the region for the cavity A provided perpendicularly under the first electrode 140 has no active layer 104, light derived from the recombination of carriers (electrons and holes)is not created in the region for the cavity A.
  • the light emitting structure may be etched from the second conductivity type semiconductor layer 106 to the active layer 104. Accordingly, the dielectric layer 130 is thereafter formed over the cavity A, so that a constant voltage/current is not smoothly supplied to the region for the cavity A. Accordingly, light emission rarely occurs in the active layer 104 over the cavity A, thereby minimizing light absorption by the first electrode 140 existing over the cavity A.
  • the dielectric layer 130 is formed over the cavity A.
  • the dielectric layer 130 may be formed over the cavity A by using a nitride layer or an oxide layer including SiO 2 , TiO 2 , Al 2 O 3 , Si 3 N 4 ,SrBi 2 (Ta, Nb) 2 O 9 (SBT), Pb(Zr,Ti)O 3 (PZT), or Bi 4 Ti 3 O 12 (BTO). Even if the dielectric layer 130 has a thin thickness under a condition at which the dielectric layer 130 includes ferroelectricity, the dielectric layer 130 can ensure high capacitance.
  • the dielectric layer 130 may be formed in the second conductivity type semiconductor layer 106 in addition to lateral and bottom surfaces of the cavity A. Therefore, the dielectric layer 130 may be firmly maintained.
  • the dielectric layer 130 has a thicker thickness at the lateral surface of the cavity A than at the bottom surface of the cavity A, but the illustrative example is not limited thereto.
  • the second electrode layer 120 is formed between the second conductivity type semiconductor layer 106 and the dielectric layer 130.
  • the second electrode layer 120 may include an ohmic layer (not shown), a reflective layer 122, a coupling layer (not shown), and a conductive support substrate 124.
  • the second electrode layer 120 may include the ohmic layer (not shown).
  • the ohmic layer makes ohmic contact with the light emitting structure 110, so that power is smoothly supplied to the light emitting structure.
  • the ohmic layer may have a stack structure includes single metal, metal alloy, or metal oxide.
  • the ohmic layer may include at least one of ITO (indium tin oxide), IZO (indium zinc oxide), IZTO (indium zinc tin oxide), IAZO (indium aluminum zinc oxide), IGZO (indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO(Al-Ga ZnO), IGZO(In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, Ni/IrOx/Au/ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • IZTO indium zinc
  • the second electrode layer 120 includes the reflective layer 122 to reflect light incident from the light emitting structure 110, so that light extraction efficiency can be improved.
  • the reflective layer 122 may include metal or alloy including at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf.
  • the reflective layer 122 may be formed in a multi-layer structure by using the metal or alloy and a transmissive conductive material such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, or ATO.
  • the reflective layer 122 may have a stack structure of IZO/Ni, AZO/Ag, IZO/Ag/Ni, and AZO/Ag/Ni.
  • the reflective layer 122 may act as the bonding layer, or may include barrier metal or bonding metal.
  • the bonding layer may include at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, and Ta.
  • the second electrode layer 120 may include the conductive support substrate 124.
  • the conductive support substrate 124 may supply power to the light emitting structure 110 together with the first electrode 140 while supporting the light emitting structure 110.
  • the conductive support substrate 124 may include metal, metal alloy, or a conductive semiconductor material having superior electrical conductivity.
  • the conductive support substrate 124 may include at least one of Cu, Cu alloy, Au, Ni, Mo, Cu-W, carrier wafers (e.g., Si, Ge, GaAs, GaN, ZnO, SiGe, or SiC)
  • carrier wafers e.g., Si, Ge, GaAs, GaN, ZnO, SiGe, or SiC
  • the thickness of the conductive support substrate 124 may vary according to the design of the light emitting device 100.
  • the conducive support substrate 124 may have a thickness in the range of about 30 ⁇ m to about 500 ⁇ m.
  • the conductive support substrate 124 may be formed through an electro-chemical metal deposition scheme, a plating scheme, or a bonding scheme using eutectic metal.
  • FIG. 6B is a sectional view showing a cavity according to another illustrative example.
  • the cavity may be inclined as shown in FIG. 6B .
  • the dielectric layer 130 or the reflective layer 122 may be formed along an inclined sidewall of the cavity.
  • FIG. 6C is a sectional view showing a cavity according to still another illustrative example.
  • a concave-convex pattern is formed on a sidewall of the cavity as shown in FIG. 6C so that the contact area between the cavity and the dielectric layer 130 can be increased. Accordingly, the capacitance can be increased.
  • the first substrate 101 is removed such that the first conductive semiconductor layer 102 is exposed.
  • the first substrate 101 may be removed through a laser lift off scheme or a chemical lift off scheme.
  • the first substrate 101 may be physically ground to be removed.
  • the first electrode 140 may be formed on the first conductivity type semiconductor layer 102 exposed by removing the first substrate 101.
  • the first electrode 140 may include a pad part subject to wire bonding, and a finger part extending from the pad part.
  • the finger part may branch in a predetermined pattern, and may have various shapes.
  • a roughness pattern (not shown) may be formed on a top surface of the first conductivity type semiconductor layer 102 to improve light extraction efficiency. Accordingly, the roughness pattern may be formed even on the top surface of the first electrode 140, but the embodiment is not limited thereto.
  • the first electrode 140 may be formed on the first conductivity type semiconductor layer 102 such that the first electrode 140 spatially overlaps with the cavity A, but the embodiment is not limited thereto. Even if the first electrode 140 slightly overlaps with the cavity A, the effects according to the embodiment can be obtained.
  • the active layer 104 since the active layer 104 is not formed at the region of the cavity A provided perpendicularly under the first electrode 140, light derived from the recombination of carriers (electrons and holes) may not be created at the region of the cavity A.
  • the thickness of the first conductivity type semiconductor layer 102 may be thicker than that of the dielectric layer 130 or the reflective layer 122, but the embodiment is not limited thereto. According to the second and third illustrative examples , the first conductivity type semiconductor layer 102, the dielectric layer 130, and the reflective layer 122 may be formed at various thickness ratios.
  • FIG. 8 is a sectional view showing a light emitting device 100b.
  • a second reflective layer 122a may be filled in the cavity A. Accordingly, the conductive layer 124 may be easily formed thereafter.
  • FIG. 9 is a sectional view showing a light emitting device 100c according to an embodiment as claimed.
  • a second dielectric layer 130a is tilled in a portion of the cavity A, and a third reflective layer 122b may be filled in a remaining portion of the cavity A.
  • the second dielectric layer 130a is formed to the height of the active layer 104, or a portion of the first conductivity type semiconductor layer 102.
  • C ⁇ ⁇ A / d , wherein ⁇ is permittivity of a dielectric layer , A represents the area of the dielectric layer , and d represents the thickness of dielectric layer .
  • Equation 3 As the permittivity and the area of the dielectric layer are increased, and the thickness of the dielectric layer is decreased, capacitance C is increased. Therefore, according to the embodiment, the structure and the characteristics of the dielectric layer may be an important factor to prevent impact from being exerted on an active layer in ESD.
  • FIG. 10 is a view showing a light emitting device package 200 in which a light emitting device is installed according to the embodiments.
  • the light emitting device package 200 includes a package body 205, third and fourth electrode layers 213 and 214 formed on the package body 205, the light emitting device 100 provided on the package body 205 and electrically connected to the third and fourth electrode layers 213 and 214 and a molding member 240 that surrounds the light emitting device 100.
  • the package body 205 may include silicon, synthetic resin or metallic material.
  • An inclined surface may be formed around the light emitting device 100.
  • the third and fourth electrode layers 213 and 214 are electrically isolated from each other to supply power to the light emitting device 100.
  • the third and fourth electrode layers 213 and 214 reflect the light emitted from the light emitting device 100 to improve the light efficiency and dissipate heat generated from the light emitting device 100 to the outside.
  • the vertical type light emitting device shown in FIGS. 1 , 8, and 8 is applicable to the light emitting device 100, but the embodiment is not limited thereto.
  • the lateral type light emitting device may be applicable to the light emitting device 100.
  • the light emitting device 100 may be installed on the package body 205 or the third and fourth electrode layers 213 and 214.
  • the light emitting device 100 is electrically connected to the third electrode layer 213 and/or the fourth electrode layer 214 through at least one of a wire bonding scheme, a flip chip bonding scheme and a die bonding scheme. According to the embodiment, the light emitting device 100 is electrically connected to the third electrode layer 213 through a wire 230 and electrically connected to the fourth electrode layer 214 through the die bonding scheme.
  • the molding member 240 surrounds the light emitting device 100 to protect the light emitting device 100.
  • the molding member 240 may include phosphors to change the wavelength of the light emitted from the light emitting device 100.
  • a plurality of light emitting device packages according to the embodiment may be arrayed on a substrate, and an optical member including a light guide plate, a prism sheet, a diffusion sheet or a fluorescent sheet may be provided on the optical path of the light emitted from the light emitting device package.
  • the light emitting device package, the substrate, and the optical member may serve as a backlight unit or a lighting unit.
  • the lighting system may include a backlight unit, a lighting unit, an indicator, a lamp or a streetlamp.
  • FIG. 11 is a perspective view showing a lighting unit 1100 according to the embodiment.
  • the lighting unit 1100 shown in FIG. 11 is an example of a lighting system and the embodiment is not limited thereto.
  • the lighting unit 1100 includes a case body 1110, a light emitting module 1130 installed in the case body 1110, and a connection terminal 1120 installed in the case body 1110 to receive power from an external power source.
  • the case body 1110 includes material having superior heat dissipation property.
  • the case body 1110 includes metallic material or resin material.
  • the light emitting module 1130 may include a substrate 1132 and at least one light emitting device package 200 installed on the substrate 1132.
  • the substrate 1132 includes an insulating member printed with a circuit pattern.
  • the substrate 1132 includes a PCB (printed circuit board), an MC (metal core) PCB, an F (flexible) PCB, or a ceramic PCB.
  • the substrate 1132 may include material that effectively reflects the light.
  • the surface of the substrate 1132 can be coated with a color, such as a white color or a silver color, to effectively reflect the light.
  • At least one light emitting device package 200 can be installed on the substrate 1132.
  • Each light emitting device package 200 may include at least one LED (light emitting diode).
  • the LED may include a colored LED that emits the light having the color of red, green, blue or white and a UV (ultraviolet) LED that emits UV light.
  • the LEDs of the light emitting module 1130 can be variously arranged to provide various colors and brightness.
  • the white LED, the red LED and the green LED can be arranged to achieve the high color rendering index (CRI).
  • connection terminal 1120 is electrically connected to the light emitting module 1130 to supply power to the light emitting module 1130.
  • the connection terminal 1120 has a shape of a socket screw-coupled with the external power source, but the embodiment is not limited thereto.
  • the connection terminal 1120 can be prepared in the form of a pin inserted into the external power source or connected to the external power source through a wire.
  • FIG. 12 is an exploded perspective view showing a backlight unit 1200 according to the embodiment.
  • the backlight unit 1200 shown in FIG. 12 is an example of a lighting system and the embodiment is not limited thereto.
  • the backlight unit 1200 includes a light guide plate 1210, a light emitting module 1240 for providing the light to the light guide plate 1210, a reflective member 1220 positioned under the light guide plate 1210, and a bottom cover 1230 for receiving the light guide plate 1210, light emitting module 1240, and the reflective member 1220 therein, but the embodiment is not limited thereto.
  • the light guide plate 1210 diffuses the light to provide surface light.
  • the light guide 1210 includes transparent material.
  • the light guide plate 1210 can be manufactured by using acryl-based resin, such as PMMA (polymethyl methacrylate), PET (polyethylene terephthalate), PC (polycarbonate), COC or PEN (polyethylene naphthalate) resin.
  • PMMA polymethyl methacrylate
  • PET polyethylene terephthalate
  • PC polycarbonate
  • COC polycarbonate
  • PEN polyethylene naphthalate
  • the light emitting module 1240 supplies the light to at least one lateral side of the light guide plate 1210 and serves as the light source of the display device including the backlight unit.
  • the light emitting module 1240 can be positioned adjacent to the light guide plate 1210, but the embodiment is not limited thereto.
  • the light emitting module 1240 includes a substrate 1242 and a plurality of light emitting device packages 200 installed on the substrate 1242 and the substrate 1242 can be adjacent to the light guide plate 1210, but the embodiment is not limited thereto.
  • the substrate 1242 may include a printed circuit board (PCB) having a circuit pattern (not shown).
  • the substrate 1242 may also include a metal core PCB (MCPCB) or a flexible PCB (FPCB), but the embodiment is not limited thereto.
  • PCB printed circuit board
  • MCPCB metal core PCB
  • FPCB flexible PCB
  • the light emitting device packages 200 are arranged such that light exit surfaces of the light emitting device packages 200 are spaced apart from the light guide plate 1210 at a predetermined distance.
  • the reflective member 1220 is disposed under the light guide plate 1210.
  • the reflective member 1220 reflects the light, which is traveled downward through the bottom surface of the light guide plate 1210, toward the light guide plate 1210, thereby improving the brightness of the backlight unit.
  • the reflective member 1220 may include PET, PC or PVC resin, but the embodiment is not limited thereto.
  • the bottom cover 1230 may receive the light guide plate 1210, the light emitting module 1240, and the reflective member 1220 therein. To this end, the bottom cover 1230 has a box shape with an open top surface, but the embodiment is not limited thereto.
  • the bottom cover 1230 can be manufactured through a press process or an extrusion process by using metallic material or resin material.
  • the LED can be prevented from being damaged due to ESD while preventing light absorption from being lowered.
  • an electrode is formed over the dielectric layer, thereby forming a capacitor in parallel to the LED. Therefore, when a DC constant voltage is applied, a current flows to a light emitting layer, which is the active layer, to emit light. In contrast, in an ESD shock in the form of a pulse occurring in discharging, energy having a high-frequency component passes through the dielectric layer of the capacitor, so that the light emitting layer can be protected.
  • the capacitor is formed in an LED chip to prevent the LED from being damaged due to static electricity, so that package cost can be reduced, and the manufacturing process can be simplified. In addition, the light absorption can be prevented from being lowered.
  • current flow can be effectively adjusted, so that light extraction efficiency can be improved.
  • the reliability for the light emitting device can be improved due to current spreading.
  • the lighting system according to the embodiments includes the light emitting device package according to the embodiments, so that the reliability of the lighting system can be improved.
  • any reference in this specification to "one embodiment,” “an embodiment,” “example embodiment,” etc. means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention.
  • the appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Devices (AREA)

Claims (2)

  1. Dispositif électroluminescent comprenant :
    une structure électroluminescente (110) comprenant une couche de semi-conducteur de second type de conductivité (106), une couche active (104) sur la couche de semi-conducteur de second type de conductivité (106), et une couche de semi-conducteur de premier type de conductivité (102) sur la couche active (104) ;
    une couche diélectrique (130) dans une cavité s'étendant au travers de la couche de semi-conducteur de second type de conductivité (106), et de la couche active (104), et s'étendant partiellement dans ou exposant la première couche de semi-conducteur de premier type de conductivité (102) de la structure électroluminescente (110), la cavité ayant une superficie en coupe A ; et
    une couche de deuxième électrode (120) sous la couche diélectrique (130),
    une première électrode sur la couche de semi-conducteur de premier type de conductivité, la première électrode chevauchant spatialement une portion de la cavité,
    dans lequel la deuxième électrode (120) comprend :
    une couche réfléchissante (122b) sous la couche diélectrique (130) ; et
    une couche conductrice (124) sous la couche réfléchissante (122b) et disposée en contact avec la couche réfléchissante,
    dans lequel la couche réfléchissante (122b) comprend une première portion qui est recouverte par la couche diélectrique (130) et est verticalement chevauchée par la première électrode, et une seconde portion qui est directement connectée à la couche de semi-conducteur de second type de conductivité (106),
    caractérisé en ce que
    la conduite diélectrique (130) remplit complètement la cavité d'une hauteur donnée de la cavité,
    la couche diélectrique (130) a une épaisseur d correspondant à cette hauteur donnée, un condensateur C est formé par la couche de semi-conducteur de premier type de conductivité (102), la couche diélectrique (130) et la couche réfléchissante (122b) et ayant une capacité C = ε x A/d, où ε est la permittivité de la couche diélectrique,
    et la couche réfléchissante (122b) remplit complètement la partie restante de la cavité, et
    la seconde portion de la couche réfléchissante (122b) s'étend à l'extérieur de la cavité.
  2. Boîtier de dispositif électroluminescent comprenant :
    un corps de boîtier ;
    des couches de troisième et quatrième électrodes installées dans le corps de boîtier ; et
    un dispositif électroluminescent selon la revendication 1 électriquement connecté aux couches de troisième et quatrième électrodes.
EP10188577.0A 2009-10-22 2010-10-22 Dispositif électroluminescent et conditionnement de dispositif électroluminescent Active EP2315273B1 (fr)

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US20120086038A1 (en) 2012-04-12
CN102074634B (zh) 2014-04-16
US20110095320A1 (en) 2011-04-28
CN102074634A (zh) 2011-05-25
KR100986407B1 (ko) 2010-10-08

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