Classifications

• • G—PHYSICS
  • G05—CONTROLLING; REGULATING
  • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
  • G05B17/00—Systems involving the use of models or simulators of said systems
  • G05B17/02—Systems involving the use of models or simulators of said systems electric

Definitions

• Oscillation-Based Test Another method called “OBT” (OBT for "Oscillation-Based Test”), similar to the KLV method, consists in inserting the system that one wishes to identify and having a transfer function H, in a nonlinear loop comprising a Comparator 6.
• the return gain (block referenced 7) is adjusted to observe oscillations preferably having a most sinusoidal shape possible. In this way, we can deduce using the hypothesis of the first harmonic, the parameters of the transfer function H using analytical relations, as for the KLV method.
• the means for carrying out said estimate y k of the output of the system may furthermore comprise: second calculation means, intended to apply to the elements Jo,..., Ji,, J n hi calculated of said given criterion J, a function f predetermined passage according to the noise signal u k transmitted at the input of said system, and such that: with hi an impulse response element h of said system and hi an element of said impulse response estimate h of said system.
• the impulse response estimation means may comprise: a chain of blocks respectively forming a first order delay function or having z "1 as a z transfer function, said chain being intended to receive said input signal u k , and to emit values u k , ... ut -1 , u k - n hi of the delayed noise signal respectively output of said blocks.
• the first calculation means may comprise means forming an exclusive OR logic gate, for performing an exclusive OR logic operation between said output signal sk of said comparator taken at a time k and said noise signal (uk-i, with 0 ⁇ i ⁇ nh) delayed by i with respect to said given instant.
• the device may further comprise: means for modifying the coefficient value ⁇ during said estimation of said impulse response.
• the first calculation means may comprise means for applying said coefficient ⁇ in the form of at least one shift register and / or means for applying a ratio l / (l + ⁇ ) in the form of at least one register shift.
• the first calculation means may comprise means making it possible to apply a ratio (1 / ⁇ ) in the form of at least one shift register.
• the modification of the coefficient ⁇ can be carried out according to the evaluation of a second criterion Jt.
• the calculation structure of the second criterion may be similar to that used to calculate the given criterion J.
• means for evaluating said second criterion Jt comprising at least one exclusive OR logic gate to perform a logical operation OR exclusive between said output signal s k of said converter and an estimate s k of this signal,
• the means for carrying out said estimation k may comprise convolution calculation means, provided for performing the calculation of a convolution between the estimated impulse response and the noise input signal.
• FIGS. 3A-3B illustrate another example of a system identification method according to the prior art, called the MCL method.
• FIG. 6 illustrates an example of an LSFR noise generator integrated into a device according to the invention.
• FIG. 9 gives an example of LUT in a device according to the invention, for applying a function of transition between a cost function and a estimated impulse response estimation element.
• FIGS. 10A-10B give examples of curves representative of predetermined passage functions respectively in the case of an input signal in the form of a Gaussian noise injected into a system to be identified, and in the case of a signal of FIG. input as a white noise.
• FIG. 11 gives an example of an impulse response estimation calculation structure within a device according to the invention.
• FIG. 12 gives an example of a convolution calculation structure between impulse response and an input signal of a system to be identified, integrated into an identification device according to the invention.
• FIG. 13 illustrates an example of an impulse response estimation and output structure of a system, within a device according to the invention.
• FIG. 14 gives a variant of a cost function calculation unit integrated into a device according to the invention and in particular to a structure for estimating the output of a system to be identified by means of an estimate of the response. impulse of this system.
• FIG. 15 illustrates another example of an impulse response estimation structure of a system, within a device according to the invention.
• FIG. 16 gives another variant of a cost function calculation unit integrated into a device according to the invention, and in particular to a structure for estimating the output of a system to be identified by means of an estimate of the impulse response of this system.
• FIG. 17 illustrates another example of an impulse response estimation structure of a system within a device according to the invention.
• FIG. 19 illustrates another example of a one-stage estimation structure, of impulse response of a system, within a device according to the invention.
• FIG. 20 illustrates an exemplary device for implementing a system identification method according to the invention, comprising a feedback loop for modifying the precision or the speed of the estimation of an impulse response during of this estimate.
• FIG. 21 illustrates an example of means for modulating a calculation coefficient ⁇ of a criterion J used for an impulse response estimation calculation in a method according to the invention.
• Figure 22 illustrates an affine line representative of a relation connecting a criterion Jt and a coefficient ⁇ involved in the calculation of a cost function.
• FIG. 23 gives examples of representative curves for estimating impulse responses, obtained respectively, using a first device according to the invention without a feedback loop, and with the aid of a second device according to FIG. invention having a feedback loop.
• FIGS. 24 and 25 respectively illustrate an exemplary identification device according to the invention in which the system to be identified is a filter, as well as an exemplary impulse response curve of this identification device.
• Figure 26 gives examples of impulse response estimation curves determined using a simulation performed using the matlab software and an experiment carried out using a program written in VHDL and implemented. on an FPGA target.
• FIG. 27 illustrates an example of a system in the form of an active filter, on which an identification method according to the invention has been implemented.
• FIGS. 28 and 29 give examples of estimation curves of impulse response and gain of the filter of FIG. 27, obtained using an identification device according to the invention.
• Figure 30 gives an example of architecture for the implementation of an identification method according to the invention.
• Such a method implements a treatment that will be called “BIMBO inline” (BIMBO for "Basic Identification Method using Binary Observations", “inline” meaning that the method uses an identification using binary signals called observations. and is performed in real time) and can be implemented for example using at least one digital signal processor (DSP), and / or at least one microprocessor and / or at least one circuit FPGA, and / or at least one computer.
• DSP digital signal processor
• FIG. 5 an equivalent block diagram of a device making it possible to implement such a method is given.
• the identification includes an estimation of the output of the system, using an estimate of the impulse response of this system.
• the system to be identified is a system that can be described by a transfer function.
• a signal u is generated at the input of a system 100.
• the signal u is preferably a discrete signal u k with k representing a moment in discrete time.
• the signal u k may be a spectrally rich signal such as a noise signal, in particular a Gaussian noise or a white noise.
• a digital-to-analog converter can be used to generate the excitation of the observed system, the noise sign being used in the identification process.
• a 0-order blocker may be used to drive the observed system 100 and as the input signal of the present structure.
• the input signal u k can be produced by a noise generator 110.
• a noise generator similar to those used in cryptography and which implements an LFSR (LFSR) method for the Linear Feedback Shift Register. linear feedback ”) with a shift register can be used for example. With such a generator, some bits of a sequence undergo operations or transformations before being reinserted in a loop. Such a generator is intended to produce pseudo-random sequences.
• the generator may for example be an LFSR type 32 noise generator corresponding to the following primitive polynomial: l + x + x 3 + x 30 .
• the method comprises several steps of acquiring the input and output signals of the system 100 to be characterized or identified.
• the means 130 may form an approximate parametric model of the unknown system 100.
• the method makes it possible to converge the approximate model as close as possible to the actual system 100 observed.
• Estimation calculations h of the impulse response of the real system are implemented by the means 130, the estimated impulse response to correspond to that of the observed system, when the parametric model converges to the real system.
• the means 130 may be implemented for example using an FPGA. According to other possibilities, the means 130 can be implemented using a digital signal processor (DSP), and / or a microprocessor and / or a computer.
• DSP digital signal processor
• the calculations of the estimate h are made from the input signal u and the output signal s of the comparator 120, these signals u and s being injected at the input of the means 130. These signals s and u are also called “ observations ". In this case, the observations are in the form of binary signals.
• the means 130 thus produce at the output an estimate y k of the output of the system 100, which is injected into a second comparator 140, for example in the form of a second 1-bit ADC, to apply the sign function to this estimate.
• the signal S k S (y k ) with S () the sign function, can then be compared with the signal s k from the first comparator 120.
• significant duration is meant here a period of at least 1000 times the sampling period, corresponding, for example, to a number N of observation samples of the order of 8,000 or 10,000.
• the method according to the invention makes it possible to obtain an estimate y of the output of the system 100 observed by means of an estimate h of its impulse response.
• impulse response of a system will be referred to as the time output of this system when it is stimulated by a pulse.
• the impulse response can be considered as the response of the system to a Dirac pulse.
• the estimate of the impulse response of the system 100 may be defined by a set of discrete elements H 1 .
• an exemplary curve Ci representative of an impulse response of a discrete HR filter is given.
• Yi 1 is an element of an impulse response and h t an element of an estimated impulse response.
• the model implemented by the means 130 can be adjusted so as to correct the estimate y k produced and thereby maximize the similarities between the signal S k and its estimate.
• This adjustment is carried out in particular by means of the calculation of a given criterion J carried out by the means 130.
• the output s () of comparator 120 is used to calculate said cost function.
• the criterion J has a value between 0 and 1 and is minimal in a zone of the parameters space of the parametric model which one will call "zone of acceptability" of the approximate parametric model.
• the result Ji which is a cost function element, corresponds to a correlation coefficient or a correlation term between the output signal s and the input signal u of the system 100.
• the cost function element J 1 is determined by an iterative calculation comprising a correlation term between the signal s and the signal u.
• the cost function element calculation unit J 1 comprises means 202 forming an input multiplier from which an output signal s k taken at a time k and a delayed input signal Uk -1. of i are issued.
• the unit 200 also comprises means 204 forming an adder at the output of the multiplier 202, as well as means 206 forming a filter. discrete delay of order 1, or a transfer function block in z equal to z "1 at the output of the adder.
• the output of the block 206 is fed back to the input of the adder 204, while means 208 forming a divider by N (with N the number of samples or points of the iterative calculation on which the calculation is made) at the output of the adder 204.
• a loopback is thus formed such that an element Ji (n + 1) calculated at a given instant depends on a previously calculated element Ji (n).
• the unit 250 comprises means 252 forming an exclusive OR logic gate (XOR) at the input of which the output signal s k of the comparator 120 at a time k and the input signal u k-1 of the system 100 delayed by i, are issued.
• XOR exclusive OR logic gate
• Means 254 forming an adder are provided at the output of the XOR gate, while means 256 forming a first order delay filter or a transfer function block in z equal to z "1 are placed at the output of the XOR gate. adder 254, the output of the block 254 being fed back to the input of the adder 254.
• the cost function element J 1 thus depends on a cost function element calculated at a previous instant. division by N (with N a number of samples) are also provided at the output of the unit 250 and deliver the result J 1 corresponding to a correlation coefficient between the signal s and the signal u delayed by i sampling periods. this result J 1 is then used to estimate the i "th element A 1 of the impulse response of the observed system.
• ⁇ can be chosen equal to 1.
• the input signal u k of the system 100 at a time k is transmitted, delayed signals Uk-i, ..., Uk-i, ..., u n hi, are respectively output filters 240 1 , ... 240 1 , ..., 240 nh _ 1 .
• FIG. 13 an example of a complete structure for delivering an estimate is shown.
• the coefficient ⁇ is also chosen such that (1 + ⁇ ) is equal to a power of 2, so that the means 308 for applying the coefficient l / (l + ⁇ ) are means for effecting an offset bits of their binary input.
• the means 308 may for example be in the form of a shift register. With respect to a unit such as those (referenced 200 and 250) described with reference to FIGS. 8A and 8B, this makes it possible to dispense with a divider and to simplify the implementation of the calculation.
• the coefficient ⁇ is also chosen so that ⁇ is large in front of a (1 ⁇ ⁇ ).
• ⁇ "large” before 1 we mean that ⁇ is greater than 2 10 .
• J ' k (n + 1) (l * j k (n) + ⁇ * J' k (n)) / (l + ⁇ )
• FIG. 16 another example of a calculation unit 350 for implementing the calculation of an element J '' k of another variant of cost function J '' is given.
• This unit 350 comprises means 352 forming an exclusive OR logic gate (XOR) at the input of which an output s k of the comparator 120 is transmitted at a time k, and an input signal u k -i of the system 100.
• XOR exclusive OR logic gate
• the sum (1 + ⁇ ) of the coefficient ⁇ and the unit corresponds to a number N of calculation points.
• the means 353a and 353b are also able to shift their binary input, each to apply the ratio 1 / ⁇ , which amounts to applying a shift of b bits to the right.
• a variant of structure 430 for providing an estimate of y is shown.
• This structure 430 differs from that previously described in connection with FIG. 14, by the calculation of the cost function, and comprises nh units 35Oo,..., 35O 1 ,..., 35O n hi evaluation of cost function elements J '' such as that (referenced 350) which has just been described with reference to FIG.
• the first multiplexer means 362 are provided at the output of nh 350Q units ..., 35O 1, 350 n hi calculating the cost function J '' such as that (referenced 350) described in connection with Figure 16.
• the first multiplexer means 362 Based on a selection signal sent by a control module 365, the first multiplexer means 362 outputs one of a plurality of their inputs.
• Demultiplexer means 364 are provided at the output of the LUT 360.
• the input of the second demultiplexer means 364 is transmitted to one of its outputs selected by a selection signal delivered by the control module 365.
• the outputs of the demultiplexer means 364 respectively deliver elements h ⁇ , ... hi, hnh-1 of impulse response estimation.
• the control module 365 is thus provided to transmit selection signals to the multiplexer means 362, and to the demultiplexer means 364, so as to ensure proper routing of the estimated impulse response values.
• the structure 430 also includes the nh units 270o, 270i, ..., 27O 1 ,..., 27O n hi for carrying out the convolution operation leading to the estimate y.
• the sampling frequency fs may be provided, such that fs> 2 * fc with fc is the cut-off frequency of the oscillator.
• the number nh of stages is preferably small in front of ⁇ , the coefficient of the cost function calculation units.
• ⁇ is at least 28 times larger than nh and ⁇ can be between 2 10 and 20 .
• FIG. 6 Another example of structure 630 intended to deliver an estimate is given in FIG.
• a unit 550 for calculating the elements of a cost function J " is provided.
• This stage differs from that (referenced 350) previously described in connection with FIG. 16, in that the means 356 forming a transfer function delay filter in z equal to z "1 , are replaced by a module 556 comprising means memory 557, means forming a multiplexer 558 connected to the memory, and means forming a demultiplexer 559 connected to the memory, the memory 557 is provided for storing values of elements I 'o, ... j'' lr ..., J'' nh _ ⁇ of cost function J''.
• the multiplexer 558 and the demultiplexer 559 are controlled by signals transmitted by the control module 565.
• an element of the cost function is sent to the input of the demultiplexer means 559, in order to be placed in the memory 557.
• a LUT 560 provided to receive a cost function element J '' i and to output a corresponding impulse response element / zi. This element hi.
• the impulse response may be transmitted to a multiplexer 580 connected to a memory 582 and stored in said memory 582.
• the value of the coefficient ⁇ can be modified, possibly during the identification process.
• the control block 680 can comprise means 683 forming an exclusive OR logic gate (XOR) at the input of which the signals sk and sk are emitted.
• XOR exclusive OR logic gate
• the stage 689 also comprises means 684 making it possible to apply a ratio (1 / ⁇ ), for example using at least one shift register, to the output of the XOR gate, as well as means 686 forming an adder at the output of the means 684, means 687 forming a first-order delay filter and transfer function z "1 at the output of the adder 686 and the output of which is reinjected at the input of means 685 making it possible to apply a ratio (1 / ⁇ ), by example using at least one shift register, the output of the means 685 and the filter 687 being emitted at the input of the adder 686.
• the computing stage 689 implements the calculation of a second criterion Jt to estimate the error on s k with respect to Sk, with Jt such that:
• the implementation of the BIMBO inline method can be carried out by a microcomputer comprising a calculation section with all the electronic components, software or other, necessary for the treatment.
• the microcomputer includes in particular at least one programmable processor, and at least one memory for this treatment.
• the identification method can be used in the context of BIST systems (BIST for "Built In Self Test”) that is to say having the ability to self-test. This makes it possible to avoid, during the test, the use of an important apparatus. It is in this case to apply the BIMBO inline method presented to a system and to compare the desired impulse responses and realized to conclude a good operation of the system.

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