Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of dc power input into dc power output
  • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
  • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
  • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
  • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
  • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/0003—Details of control, feedback or regulation circuits
  • H02M1/0032—Control circuits allowing low power mode operation, e.g. in standby mode
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
  • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
  • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

• the present invention relates to a power supply that can be operated in standby mode.
• Switch Mode Power Supply (SMPS) circuits are power supply circuits which are used in devices that require high amounts of power, for controlling the power consumption of devices.
• the SMPS circuit supplies power only to the processor, which is sufficient to be active in standby mode, and disconnects the supply to other circuits of the device.
• a regulator is used which regulates the voltage between the processor and the SMPS.
• VL SMPS output voltage
• the USA patent document No. US6496390 discloses an application for reduction of power consumption in SMPS circuits.
• the energy consumption levels are set by the signals outputted from the microprocessor.
• the circuit used for obtaining different energy levels comprises a comparator that compares the voltage values and a power supply that provides the power required for the operation thereof.
• the objective of the present invention is to realize a power supply that reduces power consumption in standby mode in devices employing SMPS type power supply.
• Another objective of the invention is to realize a power supply with reduced cost and a simple structure.
• the voltage (VL) at the SMPS output is maintained at a fixed value which is slightly greater than the minimum operation voltage of a voltage regulator connected to the SMPS output.
• the feedback circuit used for obtaining different output voltages comprises two diodes and two transistors.
• the feedback circuit changes the SMPS output voltage with the power supply received from the voltage regulator output, such that it will automatically change the voltage at the SMPS output.
• a transistor and a switch are used, which operate according to the signals received from the processor. In both embodiments, energy is saved when the device is in standby mode since a lower VL value than the normal value is achieved. Furthermore, advantages of ease of production and low cost are provided owing to the fact that the feedback circuits employed in attaining the said levels comprise much fewer components compared to the prior art applications.
• Figure 1 is the graphic view of change of the VL voltage by time in standby mode and normal operation in prior art applications.
• Figure 2 is the graphic view of change of the VL voltage by time in standby mode and normal operation in an embodiment of the invention.
• Figure 3 is the circuit diagram of an embodiment of the inventive power supply.
• Figure 4 is the circuit diagram of another embodiment of the inventive power supply.
• the inventive power supply (1) comprises a power input circuit (2) at the mains input, comprised of a bridge (14) and a capacitor (10); a transformer (3) to which input winding is supplied from the output of the power input circuit (2) and which comprises at least two output windings; at least two diodes (12, 112) and two capacitors (110, 210) which enable obtaining SMPS output voltages (VL, VH) from the voltages at the output windings of the transformer (3); a voltage regulator (4) which regulates VL voltage; a processor (5) which is supplied with power in standby mode and which enables the operation mode to be changed with the S 1 and S2 signals that it provides acquiring logic 1 and 0 values; a feedback circuit (6) which forms two different levels for the SMPS output voltage (VL) in the standby mode according to the signals it receives from the processor (5); a controller (7) which is supplied power by the feedback signal that it receives from the feedback circuit (6) and which controls the SMPS circuit; a clamp circuit (8) which is serial
• the power input circuit (2) transfers the mains voltage applied in between the A-B nodes to the input winding of the transformer (3).
• the diodes (12, 112) and the capacitors (110, 210) connected to the output of the transformer (3) form the DC voltages at the L and H nodes by rectifying the voltage at the output windings.
• the voltage (VL) at the L node is the voltage between the L node and the ground (G).
• VL is the voltage used for supplying power to the voltage regulator (4) and the processor (5) and it is the voltage of the power supply (1) in standby mode. Accordingly, the energy consumed in standby mode changes according to the value of the VL voltage.
• the voltage (VH) at the H node is the voltage between the H node and G node.
• VH is the output voltage of the power supply (1) in the normal operation mode.
• the voltage regulator (4) eliminates the irregularities occurring in the VL voltage.
• Input of the voltage regulator (4) is connected to the output winding (L-G) of the transformer (3) providing low voltage, while the output (C) of the same is connected to the processor (5).
• the voltage (VLC) on the voltage regulator (4) is equal to the voltage between the L-C nodes.
• the processor (5) is connected to the output (C) of the voltage regulator (4) and the
• Sl and S2 signals are sent via at least one output of the processor (5).
• Sl and S2 signals which have logic 1 and 0 values, provide switching between levels (1st level, 2nd level) and modes (standby, normal operation) by the adjustment of energy levels in standby mode. In normal operation mode, both Sl and S2 signals are at logic 1 value. In the 1st level of the standby mode, the values of Sl and S2 signals are logic 1. In the 2nd level of the standby mode, the value of Sl is 0 and the value of S2 is 1.
• S 1 output is connected to the feedback circuit (6) and S2 output is connected to the feedback circuit (6) and the clamp circuit (8).
• the clamp circuit (8) is turned on (conducting) by being triggered upon S2 signal acquiring logic 1 value in standby mode and connects the high voltage output of the transformer (3) to L node. Since logic value of S2 is 0 in normal operation mode, the clamp circuit (8) is not active and it is useless.
• the feedback circuit (6) is connected to Sl and S2 outputs of the processor (5) and L and H nodes.
• the feedback circuit (6) provides switching between the normal operation mode and standby mode and among the energy levels of the standby mode according to the changes in the logic values (1 or 0) of Sl and S2 signals.
• the output of the feedback circuit (6) is connected to the controller (7) and the feedback signal is transferred to the controller (7) via this connection.
• Output of the controller (7) is connected to a transistor (11) via G311 line and D311 end of the transistor (11) is connected with the input winding of the transformer (3) to complete the feedback line.
• the feedback circuit (6) comprises a resistor (13) whose one end is connected to the
• the circuit comprised of two resistors (13, 113) and a parallel regulator (9), receives feedback from the output at the H node in normal operation mode and keeps VH voltage fixed by sending this information to the controller (7) via the optocoupler (16).
• the SMPS output voltage (VL) in standby mode is equal to the sum of the voltages on the voltage regulator (4), that is, the voltage (VCL) between the C and L nodes, and the voltage (VC) of the C node which is the operation voltage of the processor (5). Additionally VL value is obtained by taking into account a certain safety margin against possible voltage drops. For example, in the case that the operation voltage (VC) of the processor (5) is 3.3 V, the voltage drop (VCL) in the regulator is 1.2 V, and the safety margin is 4.3 V; SMPS output voltage will be 8.8 V (VL2) during the period (T) in which the power supply is in standby mode ( Figure 1).
• the inventive power supply (1) provides a two level standby mode in order to reduce the energy consumption in standby mode.
• the output voltage (VL2) at the 2nd level is equal to the value in the present application
• the output voltage (VLl) at the 1st level is adjusted to have a lower safety margin. This way, since VLl value is lower than VL2 value, energy is saved in standby mode.
• the power supply (1) operates in the 1st level (Tl).
• the power supply (1) switches to the 2nd level, which has the normal safety margin and before switching to the normal operation mode, it operates in the 2nd level for a short period of time (T2) and then switches to the normal operation mode.
• Controlling the safety margin in the first level such that it will be lower than the safety margin in the second level can be performed in two different ways:
• VL voltage regulator (4)
• the feedback circuit (6) comprises a transistor
• the parallel regulator (9) does not have an impact on the SMPS output voltage (VL) of the standby mode.
• the feedback circuit (6) is completed via the L node, resistor (213), optocoupler (16), zener diode (212), transistor (211) and ground line. Under these circumstances, (if the voltage drop on the resistor (213) is neglected) the output voltage (VL) is approximately the sum of the voltage drops at zener diode (212), transistor (211) and optocoupler (16). This voltage value is the 1st level voltage value (VLl) in standby mode of the power supply (1).
• This voltage value is more than the 1st level voltage value (VLl) in standby mode of the power supply (1) by an amount of the voltage on the zener diode (312). Accordingly, the required safety margin voltage during leaving the standby mode will be as much as the voltage on the zener diode (312) to be used.
• This voltage value is the value of the 2nd level voltage (VL2) in standby mode of the power supply (1).
• the feedback circuit (6) comprises a resistor
• the feedback is received from the output of the voltage regulator
• VL voltage is not unnecessarily kept high.
• Values of the resistors (113, 313, 413) are selected such that the voltage at the C node (VC) is brought to a value which is slightly lower than the normal operation voltage of the processor (5).
• the voltage regulator (4) is supplied and operated with a voltage at a lower level than the minimum operation voltage and the processor (5) is supplied and operated with a voltage, which is lower than the normal supply voltage which will not hinder its operation thereof, and a lower SMPS voltage (VL) is achieved.
• the output voltage (VL) is the sum of the voltage that is supplied to the processor (5) and the voltage drop (VCL) on the voltage regulator (4).
• This voltage value is the 1st level voltage value (VLl) of the power supply (1) in standby mode.
• the inventive power supply (1) enables energy saving by reducing the SMPS output voltage (VL) in the standby mode and thus the energy consumption in the connected device.
• the output voltage (VL) in standby mode is set to a value (Vl) lower than the voltage (V2) in the existing application when the device to which the power supply (1) is connected is switched to standby mode, and it is brought to a value near the voltage (V2) in the existing applications a shortly before switching from the standby mode to normal operation mode.
• VL output voltage
• the feedback circuit (6) used for achieving the said levels comprises much fewer components compared to the applications in the state of the art, and this provides advantages of ease of production and low cost.

Landscapes

• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Power Sources (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=40566511

Family Applications (1)

Country Status (2)

Families Citing this family (1)

Family Cites Families (4)

• 2008
  • 2008-12-04 EP EP08869624A patent/EP2238675A1/de not_active Withdrawn
  • 2008-12-04 WO PCT/IB2008/055099 patent/WO2009087506A1/en active Application Filing

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events