EP1919822A1 - Verfahren zum miteinander versiegeln oder verschweissen von zwei elementen - Google Patents

Verfahren zum miteinander versiegeln oder verschweissen von zwei elementen

Info

Publication number
EP1919822A1
EP1919822A1 EP06808248A EP06808248A EP1919822A1 EP 1919822 A1 EP1919822 A1 EP 1919822A1 EP 06808248 A EP06808248 A EP 06808248A EP 06808248 A EP06808248 A EP 06808248A EP 1919822 A1 EP1919822 A1 EP 1919822A1
Authority
EP
European Patent Office
Prior art keywords
sealing
elements
welding
sealing material
wettability
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06808248A
Other languages
English (en)
French (fr)
Inventor
François Marion
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Publication of EP1919822A1 publication Critical patent/EP1919822A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261—Processes for packaging MEMS devices
    • B81C1/00269—Bonding of solid lids or wafers to the substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C3/00—Assembling of devices or systems from individually processed components
    • B81C3/002—Aligning microparts
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    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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Definitions

  • PROCESS FOR SEALING OR SOLDING TWO ELEMENTS BETWEEN THEM PROCESS FOR SEALING OR SOLDING TWO ELEMENTS BETWEEN THEM.
  • the invention relates to the field of microelectronics, and more particularly that of hybridization and welding techniques, in particular waterproof and hermetic a cover or a protective housing on active components, electrical or electronic.
  • the invention thus relates to the more general field of microcomponents, more conventionally referred to as electronic chips, but also to micro-sensors, micro-actuators, such as MEMs (according to the Anglo-Saxon expression “Micro Electro-Mechanical System”) etc. ....
  • microcomponents that are the subject of the present invention are conventionally deposited on a substrate of appropriate nature, for example of the semiconductor type (monocrystalline silicon, sapphire, etc.) for electronic components.
  • These substrates are provided with electrically conductive tracks, which radiate from the microcomponent in the direction of the periphery of the substrate, in order to allow, in addition to the electrical power supply of the component, if necessary, also, and above all, the treatment and the exploitation of the signals that said component is called to generate, or the control of the functions that it incorporates.
  • these components are encapsulated within a structure of the type housing or protective cover or equivalent, which provides protection against shock, corrosion, parasitic electromagnetic radiation, etc.
  • This cover or housing may further incorporate a transparent window to electromagnetic radiation to be detected by said component, or integrate one or more concentration lenses of said radiation at the component.
  • microcomponents require, for their operation, to work under vacuum or under a controlled atmosphere (pressure, neutral gas, etc.) or in a sealed manner with respect to the ambient atmosphere.
  • a controlled atmosphere pressure, neutral gas, etc.
  • the aforesaid housing or hood is used to define a cavity above said component, containing the controlled atmosphere or a vacuum more or less advanced.
  • various technical problems are grafted during their production.
  • wafer welding on wafer (wafer being the Anglo-Saxon expression dedicated to designate a wafer of a semiconductor substrate). It thus comes to cap the wafer containing the electrical or electronic components or with another wafer in which have already machined one or more cavities specific to define the volume to be confined.
  • Fixing occurs by welding, especially anodic, melting or sintering of the glass.
  • the principle thus implemented if it gives satisfaction in terms of tightness, on the other hand presents some difficulties with regard to the connection. Indeed, the access to interconnect pads or pads to allow the welding of the son of connectors is complex, so that the topology that can be implemented is limited. Moreover, a high welding temperature is generally required, so that it limits quite drastically the number of electronic components that can be implemented within the volumes thus defined.
  • hoods by deposition of thin layers.
  • an active component cavity is formed on a wafer and then capped using thin film sealing techniques.
  • a LPCVD Low Pressure Chemical Vapor Deposition
  • the dimensions of the cover can be reduced to those of the active component.
  • a hood or housing on a wafer by implementing either chips - hood, that is to say that each active component receives a hood, or by the implementation of a larger chip that can cover several active components on a single wafer.
  • This technique is conventionally carried out in several stages: it consists of aligning the cap (s) above the components, all within a chamber capable of providing a controlled atmosphere or, on the contrary, a vacuum enclosure, then sealing the or the covers on the component (s) according to technologies known to those skilled in the art, including implementing a solder joint made for example of indium or tin / lead alloy.
  • FIGS. 1 to 3 show this particular embodiment thus described.
  • a wafer 1 made for example of silicon is reported by conventional techniques an electronic component 3.
  • a surface or wettability zone 5 intended to receive a weld bead 8 made of indium or a tin / lead alloy.
  • the balls 7 defining the caliper supporting the cover 2 are positioned outside the weld bead, the assembly being placed within an enclosure in which the desired controlled atmosphere or vacuum prevails.
  • a simple rise in temperature, sufficient to melt the material constituting the balls 7 and the weld bead 8, makes it possible to induce the lowering of the cover 2 until the latter comes into contact with said weld bead so as to to ensure the tight closure of the cavity thus defined.
  • the balls 7 are also positioned on a wettability surface 6.
  • the underside of the cover 2 also receives wettability surfaces, respectively 5 'and 6'. .
  • cowhide hood type hood rollover techniques requires the realization of the effective sealing operation of the bonnet under controlled atmosphere.
  • thermocompression In order to achieve such a weld without flux, it has been proposed to make the cowling by thermocompression. This technique consists in performing the pressing at a temperature below the melting temperature of the welding material. Said material is generally found on both sides before the welding operation.
  • the AuSn alloy is a material with a high Young's modulus, thus not satisfying this requirement in terms of mechanical properties.
  • the present invention therefore aims at a welding or sealing process, combining both a low cost of implementation, and optimized reliability of the final component.
  • This method of welding or sealing two elements between them positioned within a chamber within which the vacuum or a controlled atmosphere prevails consists of: to achieve on the surfaces facing the elements to be welded, a wettability zone, also called hooked surface; depositing on one of these areas a quantity of suitable sealing material; bringing the wettability zone of the other element into contact with said deposited material; to raise the temperature of the enclosure in which the elements to be welded or sealed are positioned, until at least the melting temperature of the sealing material is reached, in order to ensure the effective sealing of the two elements together by effect of reflow.
  • the wettability zone of the element which has not received the sealing or welding material consists of a layer of gold; the surface of the wettability zone of the element positioned in contact with the sealing material is greater than the surface of the wettability zone on which said material is deposited (so-called UBM layer for the English expression "Under Bump Metallization”"); the sealing material is indium; and the melting of said sealing material in order to effectively seal the two elements together takes place at a temperature greater than 250 ° C. under a non-oxidizing atmosphere, and advantageously greater than 300 ° C.
  • the invention consists in implementing these four cumulative conditions, which makes it possible to use a bead of indium as a sealing material, of which, in known manner, the raw material costs are very much lower those of the alloy gold / tin, and this typically by a factor of 10.
  • the invention consists in carrying out the melting of the sealing material at a temperature that is very much greater than that of the effective melting of the iridium. Indeed, even though the melting temperature of iridium is 156 ° C., the temperature recommended by the invention for sealing is 250 ° C., or even 300 ° C., ie more than 1.6 times. the melting temperature of indium.
  • iridium is a soft or relatively ductile material, and its mechanical properties make it possible: to drastically relax the post-welding stresses between the assembled elements; to develop increased reliability compared with gold-based welds, particularly in relation to the thermal cycling encountered by detectors implementing such technology, these thermal cycling being well known to generate shears and thus rapid failures because of the differences in coefficients of thermal expansion between the materials used.
  • the surface of the wettability zone, and in particular its width when it is a ribbon, of the element positioned on the sealing material is at least one and a half times greater than that of the corresponding surface or size of the underlying wettability zone UBM.
  • the reflow temperature ensuring the effective sealing of the two elements together is greater than 300 ° C.
  • FIGS. 1, 2 and 3 illustrate the prior state of the art
  • FIGS. 1 and 3 being diagrammatic representations in section of a support substrate and a cover, respectively before and after elevation. temperature causing reflow of the sealing bead
  • Figure 2 being a schematic view of the upper face of the substrate.
  • Figure 4 is also a sectional view of a detail of the prior art.
  • Figure 5 is a schematic representation in section of a detail of the general principle of the invention
  • Figure 6 is a schematic sectional view of a hood prior to its sealing on wafer.
  • Figure 4 is a sectional view to illustrate in more detail the prior art.
  • the surfaces S1 and S2 respectively of the so-called "UBM" metallization layer 5 formed on the substrate 1 and of the wettability zone 5 'made on the underside of the cap are substantially of the same dimensions.
  • the weld bead 8 or in general, the sealing material is constituted gold / tin AuSn.
  • FIG. 5, which illustrates the invention, is very clearly intended to indicate the various characteristics that are specific to it.
  • zones of wettability 10 and 11 are used.
  • these wettability zones are made of gold, to the exclusion of any other material.
  • These gold layers surmount a layer acting as a barrier and hooked, typically made of titanium alloy, such as TiNi, TiW, TiPd, etc.
  • the dimensions of the wettability zones 10 and 11, respectively receiving the weld bead 8 and made on the cover 2 are of different geometry.
  • the sealing material is made of indium to the exclusion of any other material.
  • this technology significantly reduces the costs associated with deposition of sealant or solder material by eliminating any photo-masking step while allowing the use of available full-slice solder deposition techniques.
  • the indium layer can be reformed under a deoxidizing flow. It is carried out at a temperature above the melting point of indium, and therefore greater than 156 ° C., and advantageously greater than 170 ° C.
  • This indium layer is deposited on the metallization zone 10 made of gold, platinum or another noble material, and of surface Sl, in this case of width S1.
  • the wettability zone 11, limited to gold, made on the underside of the cap 2 has a surface S2, and in this case it is a ribbon with a width S2 greater than the width.
  • Sl of the metallization zone 10 and typically more than one and a half times greater than the latter.
  • the sealing operation of the cover 2 on the substrate 1 is carried out by reflow at a temperature greater than 250 ° C. It is advantageously greater than 300 ° C. and is carried out under a non-oxidizing atmosphere, typically under vacuum or under a rare gas .
  • This high temperature allows the continuous formation of intermediate gold / indium binary compounds, capable of maintaining the materials of the contact zone between the weld bead 8 or the connecting beads or microbeads 7 in the liquid state during the process of welding, and thus promote hermeticity.
  • This technology makes it possible to achieve collective and simultaneous rollover of many components made on a single semiconductor plate. It also allows hybridization of multi-chip modules to be carried out, without the need for cleaning of any flow and without a time limit which is intimately linked to it.
  • the invention makes it possible to produce infrared detection matrices with bolometric detectors under vacuum on a CMOS plate by transferring caps that are transparent to infrared radiation, and possibly provided with getter layers.
  • caps that are transparent to infrared radiation, and possibly provided with getter layers.
  • hybrid optical components on a silicon bench and tight hoods with possibly the implementation of optical and / or intraconnections on the hood.
  • MEMS collectively covered under vacuum on a CMOS plate by carrying caps possibly provided with getter layers.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Micromachines (AREA)
  • Wire Bonding (AREA)
EP06808248A 2005-08-30 2006-08-21 Verfahren zum miteinander versiegeln oder verschweissen von zwei elementen Withdrawn EP1919822A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0552612A FR2890067B1 (fr) 2005-08-30 2005-08-30 Procede de scellement ou de soudure de deux elements entre eux
PCT/FR2006/050807 WO2007026093A1 (fr) 2005-08-30 2006-08-21 Procède de scellement ou de soudure de deux éléments entre eux.

Publications (1)

Publication Number Publication Date
EP1919822A1 true EP1919822A1 (de) 2008-05-14

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US (1) US7772041B2 (de)
EP (1) EP1919822A1 (de)
JP (1) JP2009506565A (de)
FR (1) FR2890067B1 (de)
WO (1) WO2007026093A1 (de)

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GB2473285A (en) * 2009-09-08 2011-03-09 Astron Advanced Materials Ltd Low temperature joining process
US8393526B2 (en) * 2010-10-21 2013-03-12 Raytheon Company System and method for packaging electronic devices
JP5797779B2 (ja) * 2011-02-10 2015-10-21 エプコス アクチエンゲゼルシャフトＥｐｃｏｓ Ａｇ アンダーバンプメタライゼーションを含むｍｅｍｓデバイス
CN102371410A (zh) * 2011-09-07 2012-03-14 中国航天科技集团公司第九研究院第七七一研究所 一种在晶圆上真空钎焊制作无空洞高可靠凸点的工艺
CN102923638B (zh) * 2012-11-08 2016-02-03 姜利军 气密封装组件以及封装方法
FR3008228B1 (fr) 2013-07-02 2015-07-17 Commissariat Energie Atomique Procede d'assemblage de deux composants electroniques, de type flip-chip par recuit uv, assemblage obtenu
JP6314690B2 (ja) * 2014-06-26 2018-04-25 株式会社島津製作所 真空容器の形成方法

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JPS61206245A (ja) * 1985-03-08 1986-09-12 Sumitomo Metal Mining Co Ltd ハ−メチツクシ−ルカバ−及びその製造方法
US5448014A (en) * 1993-01-27 1995-09-05 Trw Inc. Mass simultaneous sealing and electrical connection of electronic devices
FR2705832B1 (fr) * 1993-05-28 1995-06-30 Commissariat Energie Atomique Procédé de réalisation d'un cordon d'étanchéité et de tenue mécanique entre un substrat et une puce hybridée par billes sur le substrat.
US6008071A (en) * 1995-09-20 1999-12-28 Fujitsu Limited Method of forming solder bumps onto an integrated circuit device
FR2780200B1 (fr) * 1998-06-22 2003-09-05 Commissariat Energie Atomique Dispositif et procede de formation d'un dispositif presentant une cavite a atmosphere controlee
JP2000307016A (ja) * 1999-04-19 2000-11-02 Hitachi Ltd 半導体装置、半導体モジュール及びその製造方法
US6969667B2 (en) * 2002-04-01 2005-11-29 Hewlett-Packard Development Company, L.P. Electrical device and method of making
US6879035B2 (en) * 2003-05-02 2005-04-12 Athanasios J. Syllaios Vacuum package fabrication of integrated circuit components
US20050253282A1 (en) * 2004-04-27 2005-11-17 Daoqiang Lu Temperature resistant hermetic sealing formed at low temperatures for MEMS packages

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Publication number Publication date
US7772041B2 (en) 2010-08-10
FR2890067A1 (fr) 2007-03-02
FR2890067B1 (fr) 2007-09-21
WO2007026093A1 (fr) 2007-03-08
US20080110013A1 (en) 2008-05-15
JP2009506565A (ja) 2009-02-12

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