EP1844382A2 - Siebschaltung - Google Patents
SiebschaltungInfo
- Publication number
- EP1844382A2 EP1844382A2 EP06706268A EP06706268A EP1844382A2 EP 1844382 A2 EP1844382 A2 EP 1844382A2 EP 06706268 A EP06706268 A EP 06706268A EP 06706268 A EP06706268 A EP 06706268A EP 1844382 A2 EP1844382 A2 EP 1844382A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- sub
- filter circuit
- control
- output
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/59—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
- G05F1/595—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load semiconductor devices connected in series
Definitions
- the invention relates to a filter circuit for voltage stabilization of a power supply to which several consumers can be connected.
- a data transmission of a spatially separated operating unit should be able to take place via the power supply line.
- the invention has for its object to provide a filter circuit with high control dynamics.
- an RC low-pass circuit is provided such that the gain of the screening characteristics of the RC element is enhanced by the control element.
- the inventive circuit for voltage stabilization can be seen as a low-pass filtering and on the other hand as a regulation of the output voltage.
- the data signal as well as the load changes dl v and dU b , are characterized by the fact that they can have higher-frequency components which are superimposed on the data in the frequency domain.
- these higher-frequency components can be reduced and thus the supply voltage can be smoothed.
- the resistor R 1 of this circuit can be designed very high impedance.
- the FET in particular MOSFET, serves to amplify the low-pass effect and can be understood as a P-controller in the control arrangement.
- bipolar transistors still flows a small emitter base current, which must be considered in the design of the low-pass filter.
- the low base current must be compensated circuit technology by a correspondingly low parallel resistance R 1 .
- the resistor R 1 can then be designed very high impedance.
- the output voltages U 1 and U 3 in FIG. 1 result as the sum of the reference voltage U 2 or U 4 on the capacitor and the almost fixed drain-gate voltage U DG .
- U 1 or U 2 is reduced by the drain-gate voltage U 00 .
- the series connection of two such circuits allows for a further screening of the supply voltage and the gradual adjustment or Targeted reduction of the desired output voltage U 3 with the help of these drain-gate voltages.
- n U 1x the original input voltage
- n the stages of the circuit.
- an inductance can be provided which prevents feedback of the data to the filter circuit and in particular avoids a short circuit on the charging capacitor at the output of the filter circuit according to circuit ground.
- Fig. 1 is a circuit diagram of an embodiment of the inventive filter circuit.
- a first stage S 1 is connected for voltage stabilization.
- the current load of these consumers is summarized in the drawing with I v .
- This first stage S 1 consists of a control element V 1 , which is preferably formed by a transistor, more preferably by a field effect transistor (FET in particular MOSFET).
- the source-drain path forms a controlled system RS 1 .
- Its control path input RE 1 which is formed by the source of the FET, is connected via a terminal E to the battery B.
- the terminal E forms the input terminal of the screening circuit.
- a first resistor R 1 connects the control path input RE 1 with a first control terminal RG 1 of the first control element V 1 of the first stage S 1 , z. B. With the gate of the FET, and together with the capacitor C 1 forms an RC low-pass circuit. The capacitor C 1 is connected between the control terminal RG 1 and the circuit ground M.
- a reference voltage U 2 drops, which forms the voltage U 1 together with the gate-drain voltage of the FET or with the base-collector voltage in the case of using a bipolar transistor.
- the first stage S 1 of the filter circuit 1 for voltage stabilization and screening which is formed by the resistor R 1 , the capacitor C 1 and the control element V 1 , connects the input terminal E in the illustrated preferred embodiment with a second stage S 2 for further voltage stabilization and Screening.
- This second stage S 2 of the filter circuit 1 is constructed analogously to the first step S 1, a second resistance R 2 connects the second control path input RE 2 to the second control terminal RG 2, and a second capacitor C 2 to the control terminal RG 2 is connected and connects this with the circuit ground M.
- the reference voltage U 4 thereby drops across the capacitor C 2 and forms, together with the gate-drain or base-collector voltage of the FET or bipolar transistor, the voltage U 3 .
- a charging capacitor C 3 is preferably arranged, which connects the controlled system output RA 2 of the second control element RE 2 with the circuit ground M.
- an inductance L is provided, which connects the output A to one terminal of the capacitor C 3 and the second controlled system output RA 2 .
- a line X 1 is preferably connected, which serves a not shown spatially separate operating unit with a Supply voltage as well as to supply data.
- the line X 1 z. B be formed by a coaxial cable or a twisted pair cable.
- the data is coupled in at the output A of the filter circuit 1 via a suitable connection.
- the inductance L is used to prevent a feedback of the data on the filter circuit 1 and in particular to prevent a short circuit on the capacitor C 3 to ground.
- the total voltage applied to the output A on the line X 1 is shown in FIG. 1 O recept .
- this filter circuit 1 in preferably two stages, a suitable data transmission is made possible while stabilized power supply of an external device, for. B. an operating unit, which is connected via the line X 1 to a central unit.
- the invention is not limited to the illustrated and described embodiment.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Networks Using Active Elements (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102005004391A DE102005004391A1 (de) | 2005-01-31 | 2005-01-31 | Siebschaltung |
| PCT/EP2006/000373 WO2006081939A2 (de) | 2005-01-31 | 2006-01-17 | Siebschaltung |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP1844382A2 true EP1844382A2 (de) | 2007-10-17 |
| EP1844382B1 EP1844382B1 (de) | 2011-11-16 |
Family
ID=36709511
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP06706268A Expired - Lifetime EP1844382B1 (de) | 2005-01-31 | 2006-01-17 | Siebschaltung |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1844382B1 (de) |
| DE (1) | DE102005004391A1 (de) |
| IL (1) | IL184839A (de) |
| WO (1) | WO2006081939A2 (de) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102007052845B4 (de) * | 2006-11-23 | 2016-06-09 | Optis Cellular Technology, LLC (n. d. Ges. d. Staates Delaware) | Kommunikationsendgerät |
| CN107608442A (zh) * | 2017-09-29 | 2018-01-19 | 深圳怡化电脑股份有限公司 | 一种精密稳压电路 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE422989C (de) * | 1925-01-28 | 1925-12-16 | Union Trust Company | Giessform zur Herstellung von Durchschuessen und Linien |
| DE1513501B2 (de) * | 1965-07-30 | 1972-02-24 | Siemens AG, 1000 Berlin u. 8000 München | Gleichstrom siebschaltungsanordnung mit transistoren |
| GB1222751A (en) * | 1969-03-03 | 1971-02-17 | Comm Consultants Ltd | Stabilized d.c. power supply |
| JPS61173324A (ja) * | 1985-01-29 | 1986-08-05 | Matsushita Electric Ind Co Ltd | 電源装置 |
| US4870421A (en) * | 1987-12-28 | 1989-09-26 | General Electric Company | Regulating switch for transmitting modules in a phased array radar |
| SE9100595D0 (sv) * | 1991-03-01 | 1991-03-01 | Carlstedt Elektronik Ab | Energifritt kraftaggregat |
| US5548252A (en) * | 1993-12-07 | 1996-08-20 | Kabushiki Kaisha Meidensha | Digital temperature compensated crystal oscillator |
| US5559423A (en) * | 1994-03-31 | 1996-09-24 | Norhtern Telecom Limited | Voltage regulator including a linear transconductance amplifier |
| JPH0830340A (ja) * | 1994-07-14 | 1996-02-02 | New Eraa:Kk | Dc−dcコンバータ |
| EP0744836A3 (de) * | 1995-05-25 | 1998-03-25 | Kabushiki Kaisha Meidensha | Temperaturkompensierter Kristalloszillator |
| DE19922467B4 (de) * | 1999-05-18 | 2006-12-07 | Jochen Bihl | Verfahren und Vorrichtung zur Trennung von Spannungsquelle und Datenentkopplung bei AS-Interface |
| DE10149827A1 (de) * | 2001-10-09 | 2003-04-30 | Siemens Ag | Stabilisierungsschaltung |
-
2005
- 2005-01-31 DE DE102005004391A patent/DE102005004391A1/de not_active Withdrawn
-
2006
- 2006-01-17 WO PCT/EP2006/000373 patent/WO2006081939A2/de not_active Ceased
- 2006-01-17 EP EP06706268A patent/EP1844382B1/de not_active Expired - Lifetime
-
2007
- 2007-07-25 IL IL184839A patent/IL184839A/en not_active IP Right Cessation
Non-Patent Citations (1)
| Title |
|---|
| See references of WO2006081939A3 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2006081939A3 (de) | 2007-06-28 |
| DE102005004391A1 (de) | 2006-08-10 |
| IL184839A (en) | 2012-06-28 |
| IL184839A0 (en) | 2007-12-03 |
| WO2006081939A2 (de) | 2006-08-10 |
| EP1844382B1 (de) | 2011-11-16 |
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