EP1810140A1 - Verfahren, betriebssystem und rechengerät zum abarbeiten eines computerprogramms - Google Patents
Verfahren, betriebssystem und rechengerät zum abarbeiten eines computerprogrammsInfo
- Publication number
- EP1810140A1 EP1810140A1 EP05797279A EP05797279A EP1810140A1 EP 1810140 A1 EP1810140 A1 EP 1810140A1 EP 05797279 A EP05797279 A EP 05797279A EP 05797279 A EP05797279 A EP 05797279A EP 1810140 A1 EP1810140 A1 EP 1810140A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- voltage
- terminal
- value
- cursor
- resistive track
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1438—Restarting or rejuvenating
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0715—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a system implementing multitasking
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
Definitions
- the present invention relates generally to a potentiometric device, and more particularly to a continuous and closed resistive track, potentiometric device.
- the invention also concerns a continuous and closed resistive track potentiometer, and a method of managing a potentiometer of the proposed type.
- the more conventional potentiometers generally use an open resistive track, that is to say discontinuous, whose ends are connected to two terminals which are at different levels of tension with each other, isolated from each other thanks to the discontinuous section of the track.
- said resistive tracks adopt a curved shape, tending to cancel, and are applied to rotary potentiometers, which include a cursor which runs along said track.
- potentiometers that were operative for an angle of 36 °, since there were applications and devices that required such potentiometer class, such as angular position detectors, or different kinds of controllers.
- the use of a continuous track apart from covering the needs of the aforementioned applications, also provides a series of performance improvements with respect to the discontinuous tracks, especially when they are of reduced dimensions, such as the reduction of parasitic effects (parasitic capacities between both ends of the track), greater consistency, dispense with the need for isolation between the different potentials to apply on the tracks, etc.
- An example of using a discontinuous track to achieve an operating potentiometer for an angle of at least 360 ° is that proposed by the public domain patent US2959729, although the proposed structure is somewhat complex and difficult to adjust to achieve provide the desired output at 360 °.
- a more evolved proposal is that provided by the patent, also in the public domain, US4203074.
- a potentiometric circuit is proposed by which an output voltage in the form of a sawtooth is obtained for 360 °, that is, for a complete turn of the cursor.
- the proposed circuit is applicable to both discontinuous and continuous resistive tracks.
- two cursors are used that run through the entire resistive track and each offer a respective output signal, which are supplied to the circuit that through a series of comparators, among other elements, selects The appropriate signal at each moment to achieve a linear increase with respect to the distance traveled, for 360 °, by means of the superposition of both signals.
- the discontinuous section comprising each of the signals is obviated, and in the case of the continuous resistive track it is possible to avoid the descending ramps that are part of both signals, when traveling the cursors section of the resistive track that goes from the supply voltage to ground.
- a first aspect of the invention concerns a potentiometric device, of the type that integrates a continuous resistive track defining a closed circuit, preferably annular, comprising in combination:
- - a movable cursor connected to an output terminal and adapted to contact, slidingly, with any point of said resistive track, - evaluation means to at least acquire the voltage at said output terminal, and
- location means associated with said evaluation means, to determine in which area said cursor is at each moment, said location means comprising at least one control element suitable for connecting at least said third terminal to a voltage of A third value.
- the evaluation means comprise comparison means to compare at least two values of the voltage at said output terminal, one for when said control element establishes said connection and another for when it does not establish, for the same cursor position.
- a second aspect of the invention concerns a potentiometer that integrates a continuous resistive track that defines a closed circuit, comprising in combination:
- Said potentiometer proposed according to said second aspect of the invention is associated with: - evaluation means for at least acquiring the voltage at said output terminal, and
- location means associated with said evaluation means, to determine in which area said cursor is at each moment, said location means comprising at least one control element suitable for at least connecting said third terminal to a voltage of a third value.
- Said evaluation and location means can be part of any system that conforms to the application to be carried out by using the proposed potentiometer. It is also contemplated, for another embodiment, the inclusion in the proposed potentiometer, of a fourth terminal electrically connected to a fourth point of one of said two zones.
- a third aspect of the invention concerns a method of managing a potentiometer with a continuous resistive track defining a closed circuit, of the type comprising, in combination:
- Said method comprises locating in which area said cursor is at each moment by the following steps. to be performed: a) perform two readings of the voltage value of said output terminal, one when said third terminal is connected to a voltage of a third value and another when it is not, b) compare the results of said two readings, and c) determine that the cursor is in the area where said third terminal is connected, if the result of said comparison offers a difference, or c ' ) determine that the cursor is in the area where said third terminal is not connected , if the result of such comparison does not offer a difference.
- the proposed method also includes recording at least one of said two readings, preferably the two readings, as well as: f) consult a table that relates voltage values of said output terminal with cursor position values in said resistive track, of so that for each voltage value there are two of said cursor position values, one for each zone, and g) specify that position value Ie corresponds to each voltage value, after said determination made in said stage e) or e ' ) in which area is the cursor.
- Fig. 1 shows a continuous resistive track potentiometer and a single cursor, without the inclusion of the third terminal used by the present invention
- Fig. 1 b shows graphs of the voltage at the output terminal of the potentiometer of Fig. 1a, when the cursor is moved along 360 °,
- Fig. 2a shows part of the elements of the potentiometric device proposed by the present invention, which includes the potentiometer proposed by the second aspect of the invention plus a control element associated with the third terminal
- Fig. 2b shows graphs of the voltage at the output terminal of the potentiometer of Fig. 1b, when the cursor is moved along 360 °, both when the control element acts or when it does not,
- Fig. 3a shows the same elements as Fig. 2a but for another example of embodiment with a different control element
- Fig. 3b shows graphs of the voltage at the output terminal of the potentiometer of Fig. 1b, when the cursor is moved along 360 °, both when the control element acts and when it does not, observing in detail the part of it in which the voltage variation changes direction
- Fig. 4 shows the proposed device according to the first aspect of the present invention for another embodiment.
- a potentiometric device of the type that integrates a continuous resistive track 1 that defines a closed circuit, comprising in combination the following appreciable elements in Figs. 2a and 3a: - a first terminal T1 electrically connected to a first point P1 of said continuous resistive track 1 and to a voltage of a first value V1,
- a movable cursor C connected to an output terminal Ts and adapted to slidingly contact any point of said resistive track 1, and further comprising the following elements:
- said location means comprising at least one control element 2 (visible in Figs. 2a, 3a and 4 for two embodiments) suitable for connecting said third terminal T3 to a voltage of a third value V3.
- Said evaluation means comprise comparison means for comparing, for the same cursor position, at least two values of the voltage at said output terminal Ts, one for when said control element 2 establishes said connection and another for when not establishes.
- the proposed device further comprises a fourth terminal electrically connected to a fourth point of one of said two zones Z1, Z2, and the control element 2 is also suitable for connecting said fourth terminal to a voltage of a fourth value.
- the mentioned means of comparison are adapted to compare, for the same cursor position, at least three values of the tension in said output terminal Ts, one for when said control element 2 establishes said connection of said third terminal T3, another for when it establishes said connection of said fourth terminal (not shown) and another for when it does not establish any connection.
- Fig. 2a illustrates an exemplary embodiment for which said control element is a simple switch.
- said control element 2 is a transistor whose collector is connected to said third terminal T3.
- said evaluation means and / or said location means comprise at least one microprocessor 3 with at least one analog / digital input (AJD) connected to said output terminal Ts.
- said microprocessor 3 comprises said control element 2, accessing from the outside thereof through an output s of the microprocessor 3, to be connected to the third terminal T3.
- said output s can be used to activate said control element 2, if it is not integrated in the microprocessor 3.
- Said location means comprise at least one memory for storing at least one of said two values of the voltage at said output terminal Ts to be compared by said means of comparison.
- said continuous resistive track 1 defines a closed circuit with annular shape, and. said cursor C is rotatable with respect to the center of the defined ring.
- the resistive tracks 1 of the exemplary embodiments illustrated in Figs. 1st, 2nd and 3rd define said annular shape, although another (not illustrated) shape defining a closed circuit is possible, with a cursor C suitable for moving along the entire circuit.
- said resistive track 1 is deposited on a substrate that integrates at least said first T1 and second T2 terminals, and preferably also said third terminal T3.
- terminals T1, T2 and T3 are such as to produce a potential difference between the first T1 and second terminal T2, and between the third terminal T3 and at least one of the other two T1, T2.
- said first voltage value V1 is greater than zero, preferably equal to a supply voltage of said device, and said second value V2 is equal to or less than zero, said third voltage value V3 is equal to or greater than zero, preferably equal to said first value V1, although for another embodiment said third voltage value V3 may be less than zero.
- said first Z1 and second Z2 zones are the same, that is to say that terminals T1 and T2 are arranged on the resistive track 1 at 180 ° from each other, although another arrangement that causes both zones Z1 and Z2 are not equal is also possible.
- the graph of Fig. 1b reflects the behavior of the potentiometer illustrated by Fig. 1a, which is like the proposed potentiometer POT but without the third terminal T3 or the associated elements.
- the first voltage value V1 is a value that is above the second value V2, and they coincide, respectively, with the indications 100% and 0% of the graph.
- the behavior of the voltage at the output terminal Ts with respect to the displacement of the cursor C is for this case symmetrical with respect to 80 °. This implies that for the same tension value there are two different angles of displacement and offset from each other.
- An example of such a voltage value at the output terminal Ts is that indicated in Fig. 1a horn Vo, which is reached for two cursor positions C offset 190 ° between them. This means that such a potentiometer cannot be used as an absolute position detector, since there are two possible angular positions for each voltage value at the output terminal Ts.
- the potentiometer POT and the potentiometric device proposed as absolute position detectors can be used.
- the cursor C rotates freely, that is, there are no physical stops that stop it, so that it is possible to deliver an output signal it continues consisting of a succession of ups and downs of the voltage at the output terminal Ts, that is to say an endless number of first Z1 and second zones Z2.
- the evaluation means are adapted to distinguish said successive first Z1 and second Z2 zones between them, for which they integrate, preferably at least one counter that counts each complete turn of the cursor C1 along the resistive track 1.
- the present invention also concerns, in a third aspect, a method of managing a potentiometer with a continuous resistive track 1 defining a closed circuit, already explained above. Said method is particularly applicable, but not limited to, the POT potentiometer proposed by the second aspect of the invention and the potentiometric device proposed by the first aspect of the invention.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Retry When Errors Occur (AREA)
- Position Input By Displaying (AREA)
- Transmission And Conversion Of Sensor Element Output (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004051991A DE102004051991A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren, Betriebssystem und Rechengerät zum Abarbeiten eines Computerprogramms |
DE102004051966A DE102004051966A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren, Betriebssystem und Rechengerät zum Abarbeiten eines Computerprogramms |
PCT/EP2005/055437 WO2006045754A1 (de) | 2004-10-25 | 2005-10-20 | Verfahren, betriebssystem und rechengerät zum abarbeiten eines computerprogramms |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1810140A1 true EP1810140A1 (de) | 2007-07-25 |
Family
ID=35462117
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP05796981A Not-in-force EP1810139B1 (de) | 2004-10-25 | 2005-10-19 | Verfahren, betriebssystem und rechengerät zum abarbeiten eines computerprogramms |
EP05797279A Ceased EP1810140A1 (de) | 2004-10-25 | 2005-10-20 | Verfahren, betriebssystem und rechengerät zum abarbeiten eines computerprogramms |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP05796981A Not-in-force EP1810139B1 (de) | 2004-10-25 | 2005-10-19 | Verfahren, betriebssystem und rechengerät zum abarbeiten eines computerprogramms |
Country Status (6)
Country | Link |
---|---|
US (2) | US7788533B2 (de) |
EP (2) | EP1810139B1 (de) |
JP (2) | JP2008518293A (de) |
CN (2) | CN100538644C (de) |
DE (2) | DE102004051966A1 (de) |
WO (2) | WO2006045734A1 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004051966A1 (de) | 2004-10-25 | 2006-05-04 | Robert Bosch Gmbh | Verfahren, Betriebssystem und Rechengerät zum Abarbeiten eines Computerprogramms |
DE102007056218A1 (de) * | 2007-11-22 | 2009-05-28 | Robert Bosch Gmbh | Verfahren zur Behandlung von transienten Fehlern in Echtzeitsystemen, insbesondere in Steuergeräten von Kraftfahrzeugen |
EP2550599B1 (de) * | 2010-03-23 | 2020-05-06 | Continental Teves AG & Co. OHG | Kontrollrechnersystem, verfahren zur steuerung eines kontrollrechnersystems, sowie verwendung eines kontrollrechnersystems |
BR112017003478A2 (pt) * | 2014-09-25 | 2018-03-20 | Nsk Ltd. | aparelho de controle e método de controle de equipamento eletrônico em um veículo |
US10642180B2 (en) * | 2015-07-17 | 2020-05-05 | Hp Indigo B.V. | Electrostatic ink compositions |
US9734006B2 (en) * | 2015-09-18 | 2017-08-15 | Nxp Usa, Inc. | System and method for error detection in a critical system |
KR101701429B1 (ko) | 2016-04-12 | 2017-02-01 | 에이엠지 컴퍼니 리미티드 | 화장품 용기 |
CN109508260B (zh) * | 2018-10-31 | 2021-11-12 | 西北工业大学 | 一种自修复处理器对锁步系统的可靠性建模与分析方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3248697A (en) * | 1962-11-27 | 1966-04-26 | Ibm | Error classification and correction system |
US5138708A (en) * | 1989-08-03 | 1992-08-11 | Unisys Corporation | Digital processor using current state comparison for providing fault tolerance |
US5269017A (en) * | 1991-08-29 | 1993-12-07 | International Business Machines Corporation | Type 1, 2 and 3 retry and checkpointing |
US5815651A (en) * | 1991-10-17 | 1998-09-29 | Digital Equipment Corporation | Method and apparatus for CPU failure recovery in symmetric multi-processing systems |
US5530802A (en) * | 1994-06-22 | 1996-06-25 | At&T Corp. | Input sequence reordering method for software failure recovery |
JPH10214198A (ja) | 1997-01-29 | 1998-08-11 | Hitachi Ltd | 情報処理システム |
JPH10326220A (ja) * | 1997-05-27 | 1998-12-08 | Toshiba Corp | ファイルシステムおよびファイル管理方法 |
US6205542B1 (en) * | 1997-12-24 | 2001-03-20 | Intel Corporation | Processor pipeline including replay |
FR2784475B1 (fr) * | 1998-10-12 | 2000-12-29 | Centre Nat Etd Spatiales | Procede de traitement d'un systeme electronique soumis a des contraintes d'erreurs transitoires |
TW420771B (en) * | 1999-08-14 | 2001-02-01 | Ibm | Electronic control system for controlling the function of a processing system and method for managing system fault situations of the electronic control system |
JP2003263329A (ja) * | 2002-03-08 | 2003-09-19 | Oki Electric Ind Co Ltd | タスクスケジュール装置 |
JP4112319B2 (ja) * | 2002-09-06 | 2008-07-02 | 日本電信電話株式会社 | プロセス再開方法、プロセス再開装置、プロセス再開プログラム |
US20040064756A1 (en) * | 2002-09-26 | 2004-04-01 | Sudarshan Kadambi | Method and apparatus for improving reliability in computer processors by re-executing instructions |
FR2869430A1 (fr) * | 2004-04-27 | 2005-10-28 | St Microelectronics Sa | Controle de l'execution d'un algorithme par un circuit integre |
DE102004051966A1 (de) | 2004-10-25 | 2006-05-04 | Robert Bosch Gmbh | Verfahren, Betriebssystem und Rechengerät zum Abarbeiten eines Computerprogramms |
-
2004
- 2004-10-25 DE DE102004051966A patent/DE102004051966A1/de not_active Withdrawn
- 2004-10-25 DE DE102004051991A patent/DE102004051991A1/de not_active Withdrawn
-
2005
- 2005-10-19 JP JP2007537273A patent/JP2008518293A/ja active Pending
- 2005-10-19 CN CNB2005800364685A patent/CN100538644C/zh not_active Expired - Fee Related
- 2005-10-19 WO PCT/EP2005/055392 patent/WO2006045734A1/de active Application Filing
- 2005-10-19 US US11/666,408 patent/US7788533B2/en not_active Expired - Fee Related
- 2005-10-19 EP EP05796981A patent/EP1810139B1/de not_active Not-in-force
- 2005-10-20 WO PCT/EP2005/055437 patent/WO2006045754A1/de active Application Filing
- 2005-10-20 EP EP05797279A patent/EP1810140A1/de not_active Ceased
- 2005-10-20 US US11/666,097 patent/US7716524B2/en not_active Expired - Fee Related
- 2005-10-20 CN CNB2005800365207A patent/CN100538645C/zh not_active Expired - Fee Related
- 2005-10-20 JP JP2007537281A patent/JP4648396B2/ja not_active Expired - Fee Related
Non-Patent Citations (1)
Title |
---|
See references of WO2006045854A1 * |
Also Published As
Publication number | Publication date |
---|---|
US20090254773A1 (en) | 2009-10-08 |
JP4648396B2 (ja) | 2011-03-09 |
JP2008518293A (ja) | 2008-05-29 |
DE102004051966A1 (de) | 2006-05-04 |
EP1810139B1 (de) | 2010-08-18 |
WO2006045734A1 (de) | 2006-05-04 |
WO2006045754A1 (de) | 2006-05-04 |
EP1810139A1 (de) | 2007-07-25 |
CN100538644C (zh) | 2009-09-09 |
US7716524B2 (en) | 2010-05-11 |
JP2008518294A (ja) | 2008-05-29 |
US20090031161A1 (en) | 2009-01-29 |
CN101048737A (zh) | 2007-10-03 |
CN101048738A (zh) | 2007-10-03 |
DE102004051991A1 (de) | 2006-04-27 |
US7788533B2 (en) | 2010-08-31 |
CN100538645C (zh) | 2009-09-09 |
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