EP1801982A3 - Codeur, décodeur, méthode de codage et de décodage - Google Patents

Codeur, décodeur, méthode de codage et de décodage Download PDF

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Publication number
EP1801982A3
EP1801982A3 EP20070106217 EP07106217A EP1801982A3 EP 1801982 A3 EP1801982 A3 EP 1801982A3 EP 20070106217 EP20070106217 EP 20070106217 EP 07106217 A EP07106217 A EP 07106217A EP 1801982 A3 EP1801982 A3 EP 1801982A3
Authority
EP
European Patent Office
Prior art keywords
matrix
check matrix
rows
columns
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP20070106217
Other languages
German (de)
English (en)
Other versions
EP1801982A9 (fr
EP1801982A2 (fr
Inventor
Toshikazu c/o Fujitsu Ltd. Kanaoka
Toshihiko c/o Fujitsu Ltd. Morita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of EP1801982A2 publication Critical patent/EP1801982A2/fr
Publication of EP1801982A3 publication Critical patent/EP1801982A3/fr
Publication of EP1801982A9 publication Critical patent/EP1801982A9/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6343—Error control coding in combination with techniques for partial response channels, e.g. recording
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1162—Array based LDPC codes, e.g. array codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1191—Codes on graphs other than LDPC codes
    • H03M13/1194—Repeat-accumulate [RA] codes
    • H03M13/1197—Irregular repeat-accumulate [IRA] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/095—Error detection codes other than CRC and single parity bit codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Error Detection And Correction (AREA)
EP20070106217 2005-12-15 2006-03-28 Codeur, décodeur, méthode de codage et de décodage Withdrawn EP1801982A3 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005362340A JP4558638B2 (ja) 2005-12-15 2005-12-15 符号器および復号器
EP06251643A EP1801980A1 (fr) 2005-12-15 2006-03-28 Codeur, décodeur, méthode de codage et de décodage

Related Parent Applications (3)

Application Number Title Priority Date Filing Date
EP06251643.0 Division 2006-03-28
EP06251643A Division EP1801980A1 (fr) 2005-12-15 2006-03-28 Codeur, décodeur, méthode de codage et de décodage
EP06251643A Division-Into EP1801980A1 (fr) 2005-12-15 2006-03-28 Codeur, décodeur, méthode de codage et de décodage

Publications (3)

Publication Number Publication Date
EP1801982A2 EP1801982A2 (fr) 2007-06-27
EP1801982A3 true EP1801982A3 (fr) 2009-08-12
EP1801982A9 EP1801982A9 (fr) 2010-07-28

Family

ID=36463413

Family Applications (2)

Application Number Title Priority Date Filing Date
EP06251643A Withdrawn EP1801980A1 (fr) 2005-12-15 2006-03-28 Codeur, décodeur, méthode de codage et de décodage
EP20070106217 Withdrawn EP1801982A3 (fr) 2005-12-15 2006-03-28 Codeur, décodeur, méthode de codage et de décodage

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP06251643A Withdrawn EP1801980A1 (fr) 2005-12-15 2006-03-28 Codeur, décodeur, méthode de codage et de décodage

Country Status (5)

Country Link
US (1) US7620873B2 (fr)
EP (2) EP1801980A1 (fr)
JP (1) JP4558638B2 (fr)
KR (1) KR100709545B1 (fr)
CN (1) CN1983823B (fr)

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WO2007091327A1 (fr) * 2006-02-09 2007-08-16 Fujitsu Limited procédé de création de matrice de contrôle LDPC, créateur de matrice de contrôle et procédé de retransmission de code
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JP5507813B2 (ja) * 2007-02-16 2014-05-28 パナソニック株式会社 送信装置及び受信装置
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US8464126B2 (en) * 2007-08-21 2013-06-11 The Governors Of The University Of Alberta Hybrid message decoders for LDPC codes
TWI390856B (zh) * 2007-11-26 2013-03-21 Sony Corp Data processing device and data processing method
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JP2009224820A (ja) * 2008-02-22 2009-10-01 Sony Corp 符号化装置、及び符号化方法
US20090252146A1 (en) * 2008-04-03 2009-10-08 Microsoft Corporation Continuous network coding in wireless relay networks
WO2009150707A1 (fr) * 2008-06-09 2009-12-17 パイオニア株式会社 Procédé de génération de matrice d’inspection, matrice d’inspection, dispositif de décodage et procédé de décodage
KR20100004470A (ko) * 2008-07-04 2010-01-13 삼성전자주식회사 광대역 무선통신 시스템에서 순열 시퀀스 생성 장치 및방법
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JP4898858B2 (ja) * 2009-03-02 2012-03-21 パナソニック株式会社 符号化器、復号化器及び符号化方法
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Also Published As

Publication number Publication date
JP2007166425A (ja) 2007-06-28
JP4558638B2 (ja) 2010-10-06
EP1801982A9 (fr) 2010-07-28
US7620873B2 (en) 2009-11-17
EP1801980A1 (fr) 2007-06-27
EP1801982A2 (fr) 2007-06-27
CN1983823A (zh) 2007-06-20
KR100709545B1 (ko) 2007-04-20
US20070143657A1 (en) 2007-06-21
CN1983823B (zh) 2010-05-12

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