EP1795013A1 - Modification matricielle lors de l'utilisation d'un codeur mpeg - Google Patents

Modification matricielle lors de l'utilisation d'un codeur mpeg

Info

Publication number
EP1795013A1
EP1795013A1 EP05774323A EP05774323A EP1795013A1 EP 1795013 A1 EP1795013 A1 EP 1795013A1 EP 05774323 A EP05774323 A EP 05774323A EP 05774323 A EP05774323 A EP 05774323A EP 1795013 A1 EP1795013 A1 EP 1795013A1
Authority
EP
European Patent Office
Prior art keywords
mpeg encoder
video signals
memory unit
data
quantization matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP05774323A
Other languages
German (de)
English (en)
Inventor
Markus Lausterer
Thomas Adam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hirschmann Electronics GmbH and Co KG
Hirschmann Electronics GmbH
Original Assignee
Hirschmann Electronics GmbH and Co KG
Hirschmann Electronics GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hirschmann Electronics GmbH and Co KG, Hirschmann Electronics GmbH filed Critical Hirschmann Electronics GmbH and Co KG
Publication of EP1795013A1 publication Critical patent/EP1795013A1/fr
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding

Definitions

  • the invention relates to a device for receiving and editing video signals with an MPEG encoder according to the features of the preamble of Patentanspru ⁇ Ches first
  • the invention is therefore based on the object to provide a device for receiving and editing video signals with an MPEG encoder, with the above-described disadvantages are avoided, so that the image reproduction can be improved and the processing speed for optimal data processing can be kept variable.
  • At least one memory unit controllable by the MPEG encoder is provided in which the received video signals are stored, processed and supplied to the further device after the processing.
  • caching video signals it is possible to make changes in the data processing within the MPEG encoder in order to be able to correctly encode the received signals. If a correct encoding is carried out, no negative image changes occur, so that the entire image can be reproduced without error. It is also avoided by the intermediate storage that the continuous image display in the further device must be stopped in the MPEG encoder due to the data processing.
  • the memory unit consists of two Partsseneinhei ⁇ th, a partial storage unit is provided at the entrance and a partial storage unit at the output of the MPEG encoder.
  • a continuous data flow is advantageously generated, wherein in the partial storage unit at the output of the MPEG encoder, the data is buffered as long as the data processing (for example, by switching from one to at least another quantization matrix) in the MPEG encoder itself takes. If data processing is required, the MPEG encoder is stopped. In order to maintain the data stream, the data previously stored in the sub memory unit at the output of the MPEG encoder is read out. The data is then cached in the sub memory unit before the MPEG encoder.
  • the MPEG encoder works at an increased speed until the Part storage unit at the input has passed its data to the MPEG encoder. This is a synchronization of the two partial storage units, the z.
  • the size of the sub memory units (memory depth, especially of the sub memory unit at the output) is determined by the time required by the MPEG encoder for internal data processing. When this process is completed, the MPEG encoder can return to normal speed.
  • a further memory unit is provided for the MPEG encoder, in which data is stored, by means of which the control of the memory unit or the Teii Mrsritten (synchronization) and / or the processing of Videosig ⁇ signals in the MPEG encoder.
  • This further memory unit which may be, for example, a ROM and which is provided within the MPEG encoder or also outside, contains all those data which are used for the data processing within the MPEG encoder or for the control and synchronization the storage unit or the sub-storage units is required.
  • the processing of the video signals by means of an alterable quantization matrix, which is variable in dependence on the data stored in the further memory unit.
  • the quantization matrix which is stored within the MPEG encoder or can also be stored in the further memory unit, is required for the encoding of the received video signals, ie their processing. If, when encoding at low data rates and / or very noisy video signals, difficulties arise, it is necessary to change the quantization matrix in order to be able to also encode very noisy video signals with a low data rate. However, changing the quantization matrix, which is most advantageously done by multiplying the entire matrix by a predeterminable factor, causes the operation of the MPEG encoder to be paused during this change in order to change (update) the quantization matrix.
  • the memory unit (or the two partial memory units) is used in accordance with the invention, so that the received video signals can be buffered during a change of the quantization matrix until the change has been made is and with the changed quantization matrix the Data processing within the MPEG encoder (encoding) can be performed.
  • the manner in which the quantization matrix is changed is advantageously stored in a control unit implemented in the MPEG encoder.
  • the purely numerical data for changing the quantization matrix (such as a
  • the sub-storage units are designed as FIFO memory.
  • FIFO memory has the advantage that only at least just those data are temporarily stored, which must not be lost during a data processing (change of the quantization matrix) within the MPEG encoder in order to avoid stagnation or impairment of the image.
  • the MPEG encoder, the memory units, the control unit and the quantization matrix are integrated in the further device.
  • a module is available in which the video signals are fed to the input, edited in accordance with the invention and then can be reproduced error-free by the other device.
  • Such a summary of said units within a module has the advantage that such a module, especially when used in vehicles, is very well integrated and space-saving.
  • FIG. 1 shows a device according to the invention with an MPEG encoder with integrated
  • Figure 2 is an MPEG encoder, which is connected to external memory units. Ways to carry out the invention
  • FIG. 1 shows a device 1 for receiving and processing video signals, this device 1 comprising at least one MPEG encoder 2.
  • the MPEG encoder 2 has an input 3, via which the received video signals VSE are fed.
  • the output of the video signals VSA to an additional device 5 via an output 4 of the MPEG encoder 2, in which the output video signals VSA further processed, in particular represented.
  • the further device 5 also contains a screen for displaying the received video signals.
  • a memory unit 6 in which the video signals VSE can be stored.
  • a control unit 7 is present, in which an algorithm for data processing is stored.
  • the MPEG encoder has a quantization matrix 9 for encoding the video input signals VSE, wherein the quantization matrix 9 is generated by means of the control unit 7 and based on the data stored in the further memory unit 8 can be changed. During the change of this quantization matrix 9, it is necessary to stop the MPEG encoder 2, wherein at least for this period the further received video input signals VSE are buffered in the memory unit 6. Once the change of the quantization matrix 9 has been completed, these temporarily stored video signals can be read from the memory unit 6, processed with the modified quantization matrix 9 and made available at the output 4 of the MPEG encoder 2 for further processing.
  • FIG. 2 shows an exemplary embodiment similar to the exemplary embodiment illustrated in FIG. 1, wherein the memory unit 6 and the further memory unit 8 are assigned to the MPEG encoder 2 as external memory units. Furthermore, the storage unit 6 are formed as partial storage units 61, 62. With regard to the mode of operation of this exemplary embodiment reference is made to claim 2 together with the associated description. LIST OF REFERENCE NUMBERS

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

L'invention concerne un dispositif (1) de réception et de traitement de signaux vidéo comportant un codeur MPEG présentant une entrée (3) par l'intermédiaire de laquelle le codeur MPEG (2) peut recevoir les signaux vidéo, et une sortie (4) par l'intermédiaire de laquelle les signaux vidéo reçus et traités peuvent être transmis à un autre dispositif (5) pour le traitement ultérieur, notamment pour la représentation d'images. Le dispositif selon l'invention comporte au moins une unité mémoire (6) commandée par le codeur MPEG (2), dans laquelle les signaux vidéo reçus sont enregistrés, traités et transmis au dispositif (5) après traitement.
EP05774323A 2004-09-29 2005-08-12 Modification matricielle lors de l'utilisation d'un codeur mpeg Ceased EP1795013A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE200410047194 DE102004047194A1 (de) 2004-09-29 2004-09-29 Matrixänderung beim Betrieb eines MPEG-Encoders
PCT/EP2005/008772 WO2006034753A1 (fr) 2004-09-29 2005-08-12 Modification matricielle lors de l'utilisation d'un codeur mpeg

Publications (1)

Publication Number Publication Date
EP1795013A1 true EP1795013A1 (fr) 2007-06-13

Family

ID=35058954

Family Applications (1)

Application Number Title Priority Date Filing Date
EP05774323A Ceased EP1795013A1 (fr) 2004-09-29 2005-08-12 Modification matricielle lors de l'utilisation d'un codeur mpeg

Country Status (4)

Country Link
EP (1) EP1795013A1 (fr)
CN (1) CN101019434A (fr)
DE (1) DE102004047194A1 (fr)
WO (1) WO2006034753A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104092968A (zh) * 2014-06-13 2014-10-08 清华大学 超高清视频的视频数据存储控制装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06165151A (ja) * 1992-11-25 1994-06-10 Matsushita Electric Ind Co Ltd 映像符号量制御装置
US20030123540A1 (en) * 2001-12-27 2003-07-03 Koninklijke Philips Electronics N.V. Dynamic control in complexity-constrained data compression

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ACKLAND B.D. ET AL: "A video-codec chip set for multimedia applications", AT&T TECHNICAL JOURNAL, vol. 72, no. 1, January 1993 (1993-01-01), pages 50 - 66, XP000367735 *
See also references of WO2006034753A1 *

Also Published As

Publication number Publication date
WO2006034753A1 (fr) 2006-04-06
CN101019434A (zh) 2007-08-15
DE102004047194A1 (de) 2006-03-30

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