EP1676303A2 - Reparieren von geschädigten low-k dielektrischen materialen mit silylierungsmittel - Google Patents

Reparieren von geschädigten low-k dielektrischen materialen mit silylierungsmittel

Info

Publication number
EP1676303A2
EP1676303A2 EP04817126A EP04817126A EP1676303A2 EP 1676303 A2 EP1676303 A2 EP 1676303A2 EP 04817126 A EP04817126 A EP 04817126A EP 04817126 A EP04817126 A EP 04817126A EP 1676303 A2 EP1676303 A2 EP 1676303A2
Authority
EP
European Patent Office
Prior art keywords
dielectric film
organosilicate glass
glass dielectric
treatment
toughening agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04817126A
Other languages
English (en)
French (fr)
Inventor
Anil S. Bhanap
Teresa A. Ramos
Nancy Iwamoto
Roger Y. Leung
Ananth Naman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell International Inc
Original Assignee
Honeywell International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/940,682 external-priority patent/US7709371B2/en
Application filed by Honeywell International Inc filed Critical Honeywell International Inc
Priority claimed from PCT/US2004/031995 external-priority patent/WO2005034194A2/en
Publication of EP1676303A2 publication Critical patent/EP1676303A2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31058—After-treatment of organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02343—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
EP04817126A 2003-10-08 2004-09-24 Reparieren von geschädigten low-k dielektrischen materialen mit silylierungsmittel Withdrawn EP1676303A2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US51002403P 2003-10-08 2003-10-08
US10/940,682 US7709371B2 (en) 2003-01-25 2004-09-15 Repairing damage to low-k dielectric materials using silylating agents
PCT/US2004/031995 WO2005034194A2 (en) 2003-10-08 2004-09-24 Repairing damage to low-k dielectric materials using silylating agents

Publications (1)

Publication Number Publication Date
EP1676303A2 true EP1676303A2 (de) 2006-07-05

Family

ID=34555813

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04817126A Withdrawn EP1676303A2 (de) 2003-10-08 2004-09-24 Reparieren von geschädigten low-k dielektrischen materialen mit silylierungsmittel

Country Status (3)

Country Link
EP (1) EP1676303A2 (de)
KR (1) KR101064336B1 (de)
TW (1) TWI358093B (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10619261B2 (en) * 2017-03-27 2020-04-14 Ulvac, Inc. Manufacturing method for electronic component

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US557624A (en) * 1896-04-07 And charles w
AU3055599A (en) * 1998-04-01 1999-10-25 Asahi Kasei Kogyo Kabushiki Kaisha Method of manufacturing interconnection structural body
US6395651B1 (en) * 1998-07-07 2002-05-28 Alliedsignal Simplified process for producing nanoporous silica

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2005034194A2 *

Also Published As

Publication number Publication date
TWI358093B (en) 2012-02-11
KR20070037562A (ko) 2007-04-05
TW200531183A (en) 2005-09-16
KR101064336B1 (ko) 2011-09-16

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

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Effective date: 20060428

AK Designated contracting states

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Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PL PT RO SE SI SK TR

RIN1 Information on inventor provided before grant (corrected)

Inventor name: RAMOS, TERESA, A.

Inventor name: LEUNG, ROGER, Y.

Inventor name: IWAMOTO, NANCY

Inventor name: BHANAP, ANIL, S.

Inventor name: NAMAN, ANANTH

DAX Request for extension of the european patent (deleted)
STAA Information on the status of an ep patent application or granted ep patent

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Effective date: 20130403