EP1634268A1 - Adressierungsverfahren einer dynamischen folienanzeige - Google Patents

Adressierungsverfahren einer dynamischen folienanzeige

Info

Publication number
EP1634268A1
EP1634268A1 EP04735079A EP04735079A EP1634268A1 EP 1634268 A1 EP1634268 A1 EP 1634268A1 EP 04735079 A EP04735079 A EP 04735079A EP 04735079 A EP04735079 A EP 04735079A EP 1634268 A1 EP1634268 A1 EP 1634268A1
Authority
EP
European Patent Office
Prior art keywords
row
electrodes
voltage
select
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04735079A
Other languages
English (en)
French (fr)
Inventor
Roel Van Woudenberg
Peter A. Duine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Priority to EP04735079A priority Critical patent/EP1634268A1/de
Publication of EP1634268A1 publication Critical patent/EP1634268A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3433Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
    • G09G3/3473Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on light coupled out of a light guide, e.g. due to scattering, by contracting the light guide with external means
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406Control of illumination source
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0237Switching ON and OFF the backlight within one frame
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/061Details of flat display driving waveforms for resetting or blanking
    • G09G2310/062Waveforms for resetting a plurality of scan lines at a time
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0626Adjustment of display parameters for control of overall brightness
    • G09G2320/0633Adjustment of display parameters for control of overall brightness by amplitude modulation of the brightness of the illumination source
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2037Display of intermediate tones by time modulation using two or more time intervals using sub-frames with specific control of sub-frames corresponding to the least significant bits

Definitions

  • the present invention relates to method for addressing a display device having a set of row electrodes and a set of column electrodes for addressing a plurality of pixels defined by intersections of said electrodes, where, in a first time slot, an ON-select voltage is applied to one row electrode so that pixels connected to this row electrode can be switched ON by a data signal applied to the column electrodes, and an unselect voltage is applied to all other row electrodes so that the pixels connected to these row electrodes remain in their present state (ON or OFF) regardless of the voltage applied on the column electrodes.
  • the invention also relates to a display driver for implementing such a method, and a display device comprising such a driver.
  • Such displays are normally referred to as “bi-stable” displays, and are typically addressed with passive matrix addressing.
  • the dynamic foil display as described in e.g. WOOO/38163 is an example of such a display.
  • the switching curves of a pixel element of the display in WOOO/38163 is shown in Fig. 1 , where the x- and y-axis represent the row and column voltages respectively.
  • V r ow.unsei the state of the pixel cannot be switched (neither ON nor OFF) by changing the column voltage level between V co ⁇ ,sei ⁇ N and V co ⁇ ,sei ⁇ FF, but maintains its present state.
  • This memory effect makes it possible to use a passive matrix addressing method to drive the display.
  • addressing is performed in the following way.
  • the addressing sequence for a frame starts with all pixel in the OFF state. Then, all but one row is put at the unselect voltage, V r0W ⁇ Un se b and remains in its current state (hence OFF) when the data voltages (V co i,seiON or V co ⁇ ,sei ⁇ FF) are applied on the column voltage.
  • One row is put at the ON-select voltage, V ro w,sei O N- At this voltage, a pixel will switch ON and emit light when the column voltage is at V co ⁇ , S eioN 5 while it will remain in its current position (hence OFF) when the column voltage is V co i, S eioFF-
  • the rows are addressed sequentially during a first scan, to allow switching all pixels ON, and then a second scan is performed during which the selective row voltage is V r0 w,seioFF, and all column voltages are put to V co ⁇ ,sei ⁇ FF, i-e. all pixels are switched to the OFF state.
  • the frame period is divided into several pairs of such ON- and OFF-scans, each such pair being referred to as a sub-field.
  • Grey scales can be accomplished by switching a pixel ON during appropriate sub-fields, which preferably are weighted, for example in a binary fashion (binary weighted sub-fields, B WS).
  • the sub-fields of a frame period are organized in an addressing scheme, which describes in what order the rows are being addressed with ON and OFF addressing actions.
  • An important parameter of an addressing scheme is the number of "time slots" which are needed for a full scheme within a frame period, since that determines the available row selection (addressing) time. Roughly stated, the larger the addressing time, the easier it is to address correctly.
  • An object of the present invention is to provide an improved addressing scheme, increasing the available row selection time.
  • this object is achieved by a method of the kind mentioned by way of introduction, further comprising, during a second time slot, applying to at least two row electrodes an OFF-select voltage such that pixels connected to this row electrode can be switched OFF by a data signal applied to the column electrodes, and applying the second voltage to all other row electrodes in the set.
  • the "set" of electrodes not necessarily includes all electrodes of the display.
  • the electrodes of the display may advantageously be divided into several sets, in order to provide a more efficient addressing.
  • the unselect voltage applied in the second time slot not necessarily is identical with the unselect voltage applied in the first time slot. It is essential, however, that these voltages have the same function, i.e. to allow a pixel to maintain its present state regardless off the data signal applied to the columns.
  • the inventive method results in that at least two rows are OFF- addressed simultaneously.
  • This introduces no problems since the OFF action is not data- dependent and thus not pixel-selective. Therefore, an OFF data signal can be applied to all columns independent of the data that was displayed, in order to cause an OFF switching for any rows that are OFF-addressed.
  • This is in contrast with the ON-addressing action, where the voltages applied at the columns only correspond to data for the row being addressed. In that case, the data for individual pixels in the column is not necessarily the same, and thus this ON-addressing needs to be done row-at-a-time.
  • the method according to the invention provides for an addressing scheme which can be significantly more compact than conventional addressesing schemes, at least for sub-fields which comprise less time slots than the number of rows.
  • the method according to the invention can be implemented in an addressing scheme of the type where a frame period is divided into a plurality of sub-fields, and a sub- field is then defined as the time between the ON-select and the OFF-select voltages are applied to the same row electrode.
  • the voltages are preferably applied in such a way that the successive order of the two shortest sub-fields for a first groups of rows is reversed compared to that of a second group of rows.
  • this reversal accomplishes a compactification of the addressing scheme, as it reduces the dead-time in between the first two sub fields.
  • the method does not automaticaly save time, but may lead to other advantages. For example, such reversal may reduce motion artefacts, like "dynamic false contours".
  • the sub-fields are preferably binary weighted, as known per se, offering an efficient generation of gray scales.
  • the first time slot may form part of a first period during which the ON-select voltage is applied to one row electrode at a time
  • the second time slot may form part of a second period, during which the OFF-select voltage is applied to at least two row electrodes at a time.
  • Such an addressing scheme will include separated ON and OFF scanning periods, where the OFF scans are only half as long as the ON scans.
  • the ON-select voltage is applied successively to all row electrodes in the set. Consequently, each sub-field will only comprise one ON scanning period and one OFF scanning period.
  • An addressing scheme according to the invention can be implemented in combination with a modulated light source coupled to the pixels.
  • this is advantageous in case of an addressing scheme including a repeated sequence of sub-fields, where the order of these sub-fields is reversed for different groups of rows.
  • sub-fields with weights one and two are repeated four times, and the light source is modulated with weights 1, 4, 16 and 64. Compared to conventional "flashing" of a modulated light source, this improves efficiency considerably.
  • FIG. 1 illustrates the switching curves of a pixel element having a bi-stable region.
  • Fig. 2 is a side view of a dynamic foil display.
  • Figs. 3 a and 3b illustrate two conventional addressing schemes for a display having bi-stable pixel elements.
  • Figs. 4a and b illustrate two addressing schemes according to a first embodiment of the invention.
  • Fig. 5 illustrates an addressing scheme according to a second embodiment of the invention.
  • Fig. 6 illustrates a prior art addressing scheme used in combination with modulation of the light source.
  • Fig. 7 illustrates an addressing scheme according to a third embodiment of the invention, used in combination with modulation of the light source.
  • a dynamic foil display described in e.g. WOOO/38163.
  • a dynamic foil display is illustrated in Fig. 2, and comprises a light guide 5 in the form of an edge lit glass plate and a non-lit back plate 6, with a scattering foil 7 clamped in between.
  • Light from a light source 4 is coupled into the light guide 5.
  • the electrodes 9 on the light guide are referred to as column electrodes, while the electrodes 8 in the back plate are row electrodes.
  • the voltages applied to the electrodes are controlled by a row driver and a column driver. Pixels are defined by the intersections of rows and columns.
  • Figs. 3a and 3b Examples of addressing schemes are illustrated in Figs. 3a and 3b.
  • checked boxes 11 indicate time slots in which pixels in the row can be activated (turned ON), while the following white boxes 12 indicate time slots during which they will stay on if activated.
  • Black boxes 13 indicate time slots in which the pixels may be turned OFF (and always are turned OFF), while dotted boxes 14 indicate time slots during which the pixels stay OFF.
  • the pixels are always in the bi-stable region 1 shown in Fig. 1.
  • the pixels are further always in the OFF state, while in the white periods 12, they may be in different states (ON or OFF), depending on the switching performed in the preceding checked box 11.
  • Fig. 3 a the ON- and OFF-scans are performed and completed one at a time, resulting in the striped pattern.
  • a voltage V row ,seioN is applied to one row at a time, while other rows are connected to the voltage V r0WjUnse ⁇ .
  • all columns are provided with image information in the form of column data signals, applying one of the voltages V ⁇ ⁇ ,sei ⁇ N or V ⁇ ⁇ ,sei ⁇ FF to the columns.
  • V row ,seioN is applied to a row, the pixels in columns provided with V co ⁇ ,sei ⁇ N are switched ON.
  • the same procedure is repeated for row voltage V r o ,seioFF, and pixels in columns provided with V co ⁇ ,sei ⁇ FF are switched OFF.
  • the dead time which is at least equal to the number of lines minus one.
  • the length of the shortest sub-field (LSB) 10 has to include a number of time slots at least equal to the number of lines minus one, in order to allow completion of the first ON scan before the first OFF scan starts. (It is noted that the length of the sub-field 10 here is defined as the number of white boxes 12 plus 1, as a part of the ON-switching time slot and/or the OFF-switching time slot normally contributes to the total light emitted.)
  • a shorter LSB 10 is accomplished by breaking the first pair of ON- and OFF-scans into two sections.
  • the drawback of this scheme is that the dead time for the LSB is increased by 50%.
  • Figs. 4a and 4b show a first embodiment of an addressing scheme in which the addressing method according to the invention has been implemented. Compared to Fig. 3b, the order of the first two sub-fields 18a and 18b has been reversed for the first four lines 19a, so that the OFF-scan is performed for two rows at a time. As a consequence, the addressing scheme is more compressed, and includes less dead time.
  • Fig. 4a the reversed order is accomplished by performing each of the two first OFF-scans 15 by scanning the first and second halves 19a, 19b of the display simultaneously, and at the same time performing the first half of the second ON-scan 16a for the lower half of the rows 19b, and the second half of the ON-scan 16b for the upper half 19a.
  • Fig. 4b the OFF-scans 15 are performed in the same way as in Fig. 4a, but the second ON-scan 16 is simply reversed compared to the first ON-scan 17.
  • the drawback of this second alternative is that the two halves of the display 19a, 19b have different separation of the sub-fields 18a, 18b.
  • the two addressing schemes in Figs. 4a and 4b are only two examples, and several other solutions are possible for reversing the order of sub-fields.
  • the number of different groups 19a, 19b with different order of sub-fields can be larger than two.
  • the display could be divided into four segments with different order of sub-fields.
  • the number of slots is thus reduced by L.
  • a "flashing" addressing scheme can be used in combination with light amplitude modulation.
  • a "flashing" addressing scheme can be used in combination with light amplitude modulation.
  • Such a scheme is illustrated in Fig. 6.
  • an ON-scan 21 is performed first, then during a specified period 22 the light source 4 is activated with a modulated intensity 23a, 23b, 23c, and finally the display is robustly switched OFF 24.
  • the addressing scheme is repeated for each sub-field, but the intensity 23a, 23b, 23c is modulated, e.g. with weights 1, 2, 4, 8, 16, 32 and 64.
  • eight weighted sub-fields are provided. In Fig. 6, only sub-fields with weights 1, 2 and 4 are illustrated.
  • a suitable addressing scheme is given in Fig. 7, where a sequence of two sub-fields, here the two shortest sub-fields 18a and 18b in Fig. 4a, is repeated.
  • a sequence of two sub-fields here the two shortest sub-fields 18a and 18b in Fig. 4a
  • a light source intensity 25 a, 25b having weights 1, 4, 16 and 64 eight different combined weights can be provided, and a total of 256 gray levels.
  • Fig. 7 only four of the eight sub-fields are illustrated.
  • the number of lines, number of sub- fields and frequency of the display may be different compared to the given examples, thereby altering the given numeric values.
  • the terms "row electrodes” and “column electrodes” are used in the description and claims generally to indicate a system of electrodes capable of addressing each pixel independently. This is normally accomplished by two orthogonal sets of parallel electrodes (hence the names), but may equally well be accomplished by two arbitrary sets of electrodes, as long as each pixel is connected to one electrode in each set.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
EP04735079A 2003-06-05 2004-05-27 Adressierungsverfahren einer dynamischen folienanzeige Withdrawn EP1634268A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP04735079A EP1634268A1 (de) 2003-06-05 2004-05-27 Adressierungsverfahren einer dynamischen folienanzeige

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP03101637 2003-06-05
PCT/IB2004/050791 WO2004109643A1 (en) 2003-06-05 2004-05-27 Display device addressing method
EP04735079A EP1634268A1 (de) 2003-06-05 2004-05-27 Adressierungsverfahren einer dynamischen folienanzeige

Publications (1)

Publication Number Publication Date
EP1634268A1 true EP1634268A1 (de) 2006-03-15

Family

ID=33495621

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04735079A Withdrawn EP1634268A1 (de) 2003-06-05 2004-05-27 Adressierungsverfahren einer dynamischen folienanzeige

Country Status (3)

Country Link
EP (1) EP1634268A1 (de)
TW (1) TW200509050A (de)
WO (1) WO2004109643A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005050608A1 (en) * 2003-11-20 2005-06-02 Koninklijke Philips Electronics N.V. Improved addressing of a foil display device
TWI398764B (zh) * 2009-07-21 2013-06-11 Richpower Microelectronics 降低顯示器待機時之功率消耗的裝置及方法,以及低待機功率消耗之顯示器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8728433D0 (en) * 1987-12-04 1988-01-13 Emi Plc Thorn Display device
US5233447A (en) * 1988-10-26 1993-08-03 Canon Kabushiki Kaisha Liquid crystal apparatus and display system
US5490000A (en) * 1992-12-07 1996-02-06 Casio Computer Co., Ltd. Deformed helix ferroelectric liquid crystal display device and method of driving
EP0685830A1 (de) * 1994-06-02 1995-12-06 Texas Instruments Incorporated Verbesserungen für räumliche Lichtmodulatoren
KR100611240B1 (ko) * 1998-12-22 2006-08-10 코닌클리케 필립스 일렉트로닉스 엔.브이. 이전에 인가된 전극 전압에 의존하는 전극 전압을 갖는 광 유도부를 포함하는 디스플레이 장치
EP1512134A2 (de) * 2002-03-20 2005-03-09 Koninklijke Philips Electronics N.V. Verfahren zur steuerung eines eine folie enthaltenden bildschirms und gerät mit solch einem bildschirm

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2004109643A1 *

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TW200509050A (en) 2005-03-01
WO2004109643A1 (en) 2004-12-16

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