EP1634268A1

EP1634268A1 - Dynamic foil display device addressing method

Info

Publication number: EP1634268A1
Application number: EP04735079A
Authority: EP
Inventors: Roel Van Woudenberg; Peter A. Duine
Original assignee: Koninklijke Philips Electronics NV
Current assignee: Koninklijke Philips NV
Priority date: 2003-06-05
Filing date: 2004-05-27
Publication date: 2006-03-15
Also published as: TW200509050A; WO2004109643A1

Abstract

A method for addressing a display device comprising first, applying to one row electrode an ON-select voltage such that pixels connected to this row electrode can be switched ON by a data signal applied to the column electrodes, and to all other row electrodes an unselect voltage such that the pixels connected to these row electrodes remain in their present state regardless of the voltage applied on the column electrodes, and then applying to at least two row electrodes an OFF-select voltage (15) such that pixels connected to this row electrode can be switched OFF by a data signal applied to the column electrodes, and applying to all other row electrodes an unselect voltage By OFF-addressing two lines simultaneously (15), the method according to the invention provides for an addressing scheme which can be significantly more compact than conventional addressing schemes.

Description

DYNAMIC FOL DISPLAY DEVICE ADDRESSING METHOD

The present invention relates to method for addressing a display device having a set of row electrodes and a set of column electrodes for addressing a plurality of pixels defined by intersections of said electrodes, where, in a first time slot, an ON-select voltage is applied to one row electrode so that pixels connected to this row electrode can be switched ON by a data signal applied to the column electrodes, and an unselect voltage is applied to all other row electrodes so that the pixels connected to these row electrodes remain in their present state (ON or OFF) regardless of the voltage applied on the column electrodes.

The invention also relates to a display driver for implementing such a method, and a display device comprising such a driver.

Such displays are normally referred to as "bi-stable" displays, and are typically addressed with passive matrix addressing. The dynamic foil display as described in e.g. WOOO/38163 is an example of such a display. The switching curves of a pixel element of the display in WOOO/38163 is shown in Fig. 1 , where the x- and y-axis represent the row and column voltages respectively. The bi-stable region 1, between the ON-curve 2 and the OFF- curve 3, creates a memory effect in the pixel element. For a suitable row voltage level (V_row.unsei the state of the pixel cannot be switched (neither ON nor OFF) by changing the column voltage level between V_coι,seiθN and V_coι,seiθFF, but maintains its present state. This memory effect makes it possible to use a passive matrix addressing method to drive the display.

According to WO00/38163, addressing is performed in the following way. The addressing sequence for a frame starts with all pixel in the OFF state. Then, all but one row is put at the unselect voltage, V_r0WιUnse_b and remains in its current state (hence OFF) when the data voltages (V_coi,seiON or V_coι,seiθFF) are applied on the column voltage. One row is put at the ON-select voltage, V_row,sei_ON- At this voltage, a pixel will switch ON and emit light when the column voltage is at V_coι,_SeioN₅ while it will remain in its current position (hence OFF) when the column voltage is V_coi,_SeioFF- The rows are addressed sequentially during a first scan, to allow switching all pixels ON, and then a second scan is performed during which the selective row voltage is V_r0w,seioFF, and all column voltages are put to V_coι,seiθFF, i-e. all pixels are switched to the OFF state. The frame period is divided into several pairs of such ON- and OFF-scans, each such pair being referred to as a sub-field. Grey scales can be accomplished by switching a pixel ON during appropriate sub-fields, which preferably are weighted, for example in a binary fashion (binary weighted sub-fields, B WS). The sub-fields of a frame period are organized in an addressing scheme, which describes in what order the rows are being addressed with ON and OFF addressing actions.

An important parameter of an addressing scheme is the number of "time slots" which are needed for a full scheme within a frame period, since that determines the available row selection (addressing) time. Roughly stated, the larger the addressing time, the easier it is to address correctly.

An object of the present invention is to provide an improved addressing scheme, increasing the available row selection time.

According to the invention, this object is achieved by a method of the kind mentioned by way of introduction, further comprising, during a second time slot, applying to at least two row electrodes an OFF-select voltage such that pixels connected to this row electrode can be switched OFF by a data signal applied to the column electrodes, and applying the second voltage to all other row electrodes in the set.

It should be noted that the "set" of electrodes not necessarily includes all electrodes of the display. On the contrary, the electrodes of the display may advantageously be divided into several sets, in order to provide a more efficient addressing.

It should also be noted that the unselect voltage applied in the second time slot not necessarily is identical with the unselect voltage applied in the first time slot. It is essential, however, that these voltages have the same function, i.e. to allow a pixel to maintain its present state regardless off the data signal applied to the columns.

In short, the inventive method results in that at least two rows are OFF- addressed simultaneously. This introduces no problems since the OFF action is not data- dependent and thus not pixel-selective. Therefore, an OFF data signal can be applied to all columns independent of the data that was displayed, in order to cause an OFF switching for any rows that are OFF-addressed. This is in contrast with the ON-addressing action, where the voltages applied at the columns only correspond to data for the row being addressed. In that case, the data for individual pixels in the column is not necessarily the same, and thus this ON-addressing needs to be done row-at-a-time. The method according to the invention provides for an addressing scheme which can be significantly more compact than conventional adressing schemes, at least for sub-fields which comprise less time slots than the number of rows.

The method according to the invention can be implemented in an addressing scheme of the type where a frame period is divided into a plurality of sub-fields, and a sub- field is then defined as the time between the ON-select and the OFF-select voltages are applied to the same row electrode.

The voltages are preferably applied in such a way that the successive order of the two shortest sub-fields for a first groups of rows is reversed compared to that of a second group of rows. When these sub-fields are shorter than the number of lines, this reversal accomplishes a compactification of the addressing scheme, as it reduces the dead-time in between the first two sub fields.

For subsequent, longer sub-fields, the method does not automaticaly save time, but may lead to other advantages. For example, such reversal may reduce motion artefacts, like "dynamic false contours". The sub-fields are preferably binary weighted, as known per se, offering an efficient generation of gray scales.

The first time slot may form part of a first period during which the ON-select voltage is applied to one row electrode at a time, and the second time slot may form part of a second period, during which the OFF-select voltage is applied to at least two row electrodes at a time.

Such an addressing scheme will include separated ON and OFF scanning periods, where the OFF scans are only half as long as the ON scans.

Preferably, during the first period, the ON-select voltage is applied successively to all row electrodes in the set. Consequently, each sub-field will only comprise one ON scanning period and one OFF scanning period.

An addressing scheme according to the invention can be implemented in combination with a modulated light source coupled to the pixels. In particular this is advantageous in case of an addressing scheme including a repeated sequence of sub-fields, where the order of these sub-fields is reversed for different groups of rows. According to one embodiment, sub-fields with weights one and two are repeated four times, and the light source is modulated with weights 1, 4, 16 and 64. Compared to conventional "flashing" of a modulated light source, this improves efficiency considerably.

These and other aspects of the present invention will now be described in more detail, with reference to the appended drawings showing currently preferred embodiments of the invention. Fig. 1 illustrates the switching curves of a pixel element having a bi-stable region.

Fig. 2 is a side view of a dynamic foil display.

Figs. 3 a and 3b illustrate two conventional addressing schemes for a display having bi-stable pixel elements. Figs. 4a and b illustrate two addressing schemes according to a first embodiment of the invention.

Fig. 5 illustrates an addressing scheme according to a second embodiment of the invention.

Fig. 6 illustrates a prior art addressing scheme used in combination with modulation of the light source.

Fig. 7 illustrates an addressing scheme according to a third embodiment of the invention, used in combination with modulation of the light source.

In the following, the method according to the invention will be described in relation to a dynamic foil display, described in e.g. WOOO/38163. Such a display is illustrated in Fig. 2, and comprises a light guide 5 in the form of an edge lit glass plate and a non-lit back plate 6, with a scattering foil 7 clamped in between. Light from a light source 4 is coupled into the light guide 5. On both plates there are respective sets of parallel electrodes 8, 9 which are arranged perpendicularly with respect to each other. The electrodes 9 on the light guide are referred to as column electrodes, while the electrodes 8 in the back plate are row electrodes. The voltages applied to the electrodes are controlled by a row driver and a column driver. Pixels are defined by the intersections of rows and columns. By applying suitable voltages to a row and a column electrode, an area of the foil 7 can be brought into contact with the light guide 5, to thereby disturb the total internal reflection and extract light from the light guide 5.

Conventionally, the dynamic foil display is addressed in the way which was described above, with reference to Fig. 1. Examples of addressing schemes are illustrated in Figs. 3a and 3b. In these Figures (and in the following Figures 4a, 4b and 5), checked boxes 11 indicate time slots in which pixels in the row can be activated (turned ON), while the following white boxes 12 indicate time slots during which they will stay on if activated. Black boxes 13 indicate time slots in which the pixels may be turned OFF (and always are turned OFF), while dotted boxes 14 indicate time slots during which the pixels stay OFF. During the white periods 12 and the dotted periods 14 the pixels are always in the bi-stable region 1 shown in Fig. 1. In the dotted periods 14, the pixels are further always in the OFF state, while in the white periods 12, they may be in different states (ON or OFF), depending on the switching performed in the preceding checked box 11.

In Fig. 3 a, the ON- and OFF-scans are performed and completed one at a time, resulting in the striped pattern. During an ON-scan, a voltage V_row,seioN is applied to one row at a time, while other rows are connected to the voltage V_r0WjUnseι. At the same time, all columns are provided with image information in the form of column data signals, applying one of the voltages V_∞ι,seiθN or V_∞ι,seiθFF to the columns. When V_row,seioN is applied to a row, the pixels in columns provided with V_coι,seiθN are switched ON. During the OFF scan, the same procedure is repeated for row voltage V_ro ,seioFF, and pixels in columns provided with V_coι,seiθFF are switched OFF.

After a pixel has been switched OFF there is a time period 14 during which the pixel is idle, referred to as the dead time, which is at least equal to the number of lines minus one. Further, the length of the shortest sub-field (LSB) 10 has to include a number of time slots at least equal to the number of lines minus one, in order to allow completion of the first ON scan before the first OFF scan starts. (It is noted that the length of the sub-field 10 here is defined as the number of white boxes 12 plus 1, as a part of the ON-switching time slot and/or the OFF-switching time slot normally contributes to the total light emitted.)

In Fig. 3b, a shorter LSB 10 is accomplished by breaking the first pair of ON- and OFF-scans into two sections. However, the drawback of this scheme is that the dead time for the LSB is increased by 50%.

Figs. 4a and 4b show a first embodiment of an addressing scheme in which the addressing method according to the invention has been implemented. Compared to Fig. 3b, the order of the first two sub-fields 18a and 18b has been reversed for the first four lines 19a, so that the OFF-scan is performed for two rows at a time. As a consequence, the addressing scheme is more compressed, and includes less dead time.

In Fig. 4a, the reversed order is accomplished by performing each of the two first OFF-scans 15 by scanning the first and second halves 19a, 19b of the display simultaneously, and at the same time performing the first half of the second ON-scan 16a for the lower half of the rows 19b, and the second half of the ON-scan 16b for the upper half 19a.

As OFF-addressing is not pixel selective, this presents no problems. In practice, as soon as the ON-scan is completed, all columns can be provided with V_coι,seiθ_FF during the entire OFF-addressing period 15. As long as the rows are provided with the unselect voltage V_row,u_nsei the pixels will remain in their present state, and will only be switched OFF when the row voltage V_ro ,seiOFF is applied.

In Fig. 4b, the OFF-scans 15 are performed in the same way as in Fig. 4a, but the second ON-scan 16 is simply reversed compared to the first ON-scan 17. The drawback of this second alternative is that the two halves of the display 19a, 19b have different separation of the sub-fields 18a, 18b.

Of course, the two addressing schemes in Figs. 4a and 4b are only two examples, and several other solutions are possible for reversing the order of sub-fields. For example, the number of different groups 19a, 19b with different order of sub-fields can be larger than two. For example, the display could be divided into four segments with different order of sub-fields.When comparing Fig. 4a or 4b with Fig. 3b, the total number of time slots for the lowest two subfields is reduced from 32 to 24. More generally, for a display with L lines and lowest sub-field weights of L/2 and L, the number of slots needed to address these two subfields with the scheme in Fig. 3b is Ntot = 2*L/2 + 2*L/2 + 2*L = 4*L for the scheme in Fig. 3b, and

Ntot = L + L/2 + L + L/2 = 3*L for the scheme in Fig. 4. The number of slots is thus reduced by L.

The reversal of the order of the first two subfields between the top half of the display and the lower half may result in artefacts for moving images at the boundary of the two halves. To reduce this effect, the assignment of the addressing slots to the lines could be changed so that the first line is addressed with the sequence of the first line of Fig. 4a, the second line is addressed with the sequence of the first line of the second half of Fig. 4a, the third line is address with that of the second line of the first half, etc. This is shown schematically in Fig. 5. A corresponding change of assignments can of course be performed for Fig. 4b, or for any other addressign scheme according to the invention.

As can be noted from Figs. 4a, 4b and 5, the compacting effect of the invention is greatest for the shorter sub-fields, more correctly stated, for sub-fields shorter than the number of lines. This makes the inventive method especially advantageous in combination with modulation of the light source, which is possible in for example a foil display according to Fig. 2.

When modulation of the light source 4 is used, nonnally only a few different weights are used for the sub-fields, typically only one. For example, a "flashing" addressing scheme can be used in combination with light amplitude modulation. Such a scheme is illustrated in Fig. 6. According to this scheme, in each sub-field, an ON-scan 21 is performed first, then during a specified period 22 the light source 4 is activated with a modulated intensity 23a, 23b, 23c, and finally the display is robustly switched OFF 24. The addressing scheme is repeated for each sub-field, but the intensity 23a, 23b, 23c is modulated, e.g. with weights 1, 2, 4, 8, 16, 32 and 64. Thereby eight weighted sub-fields are provided. In Fig. 6, only sub-fields with weights 1, 2 and 4 are illustrated.

When combining light amplitude modulation with the present invention, significant advantages can be achieved. One example of a suitable addressing scheme is given in Fig. 7, where a sequence of two sub-fields, here the two shortest sub-fields 18a and 18b in Fig. 4a, is repeated. By combining these two weights (1 and 2) with a light source intensity 25 a, 25b having weights 1, 4, 16 and 64, eight different combined weights can be provided, and a total of 256 gray levels. In Fig. 7, only four of the eight sub-fields are illustrated.

Compared to the conventional addressing scheme in Fig. 6, the above described scheme is significantly (order of 50%) more efficient.

Several modifications of the above described embodiments are possible within the scope of the appended claims. For example, the number of lines, number of sub- fields and frequency of the display may be different compared to the given examples, thereby altering the given numeric values. Further, it should be noted that the terms "row electrodes" and "column electrodes" are used in the description and claims generally to indicate a system of electrodes capable of addressing each pixel independently. This is normally accomplished by two orthogonal sets of parallel electrodes (hence the names), but may equally well be accomplished by two arbitrary sets of electrodes, as long as each pixel is connected to one electrode in each set.

Claims

CLAIMS:

1. A method for addressing a display device having a set of row electrodes (8) and a set of column electrodes (9) for addressing a plurality of pixels defined by intersections of said electrodes, comprising: in a first time slot, applying to one row electrode an ON-select voltage (V_row._seio_N) such that pixels connected to this row electrode can be switched ON by a data signal applied to the column electrodes, and applying to all other row electrodes in the set an unselect voltage such that the pixels connected to these row electrodes remain in their present state (ON or OFF) regardless of the voltage (V_coi,_Seio_N or V_∞ι,_sei_θFF) applied on the column electrodes, and in a second time slot, applying to at least two row electrodes an OFF-select voltage (V_row,seiθFF) such that pixels connected to this row electrode can be switched OFF by a data signal (V_coι,seiθFF) applied to the column electrodes, and applying to all other row electrodes in the set an unselect voltage (V_row,unsei)-

2. A method according to claim 1, implemented in an addressing scheme of the type where a frame period is divided into a plurality of sub-fields (18a, 18b, 18c), wherein a sub-field is defined as the time between said ON-select and said OFF-select voltages are applied to the same row electrode (8), and wherein said ON-select and OFF-select voltages are applied in such a way that the successive order of the two shortest sub-fields (18a, 18b) for a first groups of rows (19a) is reversed compared to that of a second group of rows (19b).

3. A method according to claim 2, wherein the sub-fields (18a, 18b, 18c) are binary weighted.

4. A method according to any of the preceding claims, wherein said first time slot forms part of a first period (16, 16a, 16b, 17) during which said ON-select voltage (Vr_ow._seio_N) is applied to one row electrode at a time, and wherein said second time slot forms part of a second period (15), during which said OFF-select voltage (V_rθw,sei_θFF) is applied to at least two row electrodes at a time.

5. A method according to claim 4, wherein, during said first period (16, 17), said ON-select voltage (V_{ro ,se}io_N) is applied successively to all row electrodes in the set.

6. A method according to any one of claims 2-5, wherein the addressing scheme comprises a repeated sequence of two sub-fields of different weight, and wherein the pixels are coupled to a modulated light source (4).

7. A method according to claim 6, wherein the sequence comprises sub-fields with weights 1 and 2 and is repeated four times, and wherein the light source (4) is modulated with weights 1, 4, 16 and 64.

8. A method according to any one of the preceding claims, wherein said display device comprises a light guide (5) and a flexible element (7), and wherein said row and column electrodes (8, 9) are arranged to bring selected portions of the flexible element (7) into contact with the light guide (5) in order to extract light from the light guide.

9. A display driver intended for use in a display device having a set of row electrodes (8) and a set of column electrodes (9) for addressing a plurality of pixels defined by intersections of said electrodes, said driver comprising: means for applying, in a first time slot, to one row electrode an ON-select voltage (V_row,seioN) such that pixels connected to this row electrode can be switched ON by a data signal applied to the column electrodes, and applying to all other row electrodes in the set an unselect voltage (V_r0w,_unsei) such that the pixels connected to these row electrodes remain in their present state (ON or OFF) regardless of the voltage (V_coι,seiθN or V_coi,seioFF) applied on the column electrodes, and means for applying, in a second time slot, to at least two row electrodes an OFF-select voltage (V_rθw,_sei_θFF) such that pixels connected to this row electrode can be switched OFF by a data signal (V_coι,_Sei_θFF) applied to the column electrodes, and applying to all other row electrodes in the set an unselect voltage (V_r0w,unsei)-

10. A display driver according to claim 9, further comprising means for implementing an addressing scheme of the type where a frame period is divided into a plurality of sub-fields (18a, 18b, 18c), wherein a sub-field is defined as the time between said ON-select and said OFF-select voltages are applied to the same row electrode (8), and wherein said means for applying said ON-select and OFF-select voltages are arranged to apply the voltages in such a way that the successive order of the two shortest subfields (18a, 18b) for a first groups of rows (19a) is reversed compared to that of a second group of rows (19b).

11. A display driver according to claim 11 , wherein the sub-fields (18a, 18b, 18c) are binary weighted.

12. A display driver according to one of claims 9-11 , wherein said means for applying an ON-select voltage are arranged to apply the voltage successively to all row electrodes in the set.

13. A display device comprising a display driver according to one of claims 9-12.

14. A display device according to claim 13, further comprising a modulated light source (4).

15. A display device according to claim 14, wherein the light source (4) is modulated with weights 1, 4, 16 and 64.

16. A display device according to one of claims 13-15, further comprises a light guide (5) and a flexible element (7), and wherein said row and column electrodes (8, 9) are arranged to bring selected portions of the flexible element (7) into contact with the light guide (5) in order to extract light from the light guide.