EP1597758A1 - Relaxation d'une couche mince apres son transfert - Google Patents
Relaxation d'une couche mince apres son transfertInfo
- Publication number
- EP1597758A1 EP1597758A1 EP04715981A EP04715981A EP1597758A1 EP 1597758 A1 EP1597758 A1 EP 1597758A1 EP 04715981 A EP04715981 A EP 04715981A EP 04715981 A EP04715981 A EP 04715981A EP 1597758 A1 EP1597758 A1 EP 1597758A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- strained
- vitreous
- substrate
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
Definitions
- the present invention relates to the formation of a relaxed or pseudo-relaxed layer on a substrate, the relaxed layer being made of a material selected from semiconductor materials, in order to form a final structure for electronics, optics or optoelectronics, such as for example a semiconductor-on-insulator structure.
- the present invention comprises in particular the formation of a strained layer on and through the relaxed layer.
- a layer of Si strained by a relaxed or pseudo-relaxed SiGe layer may in this respect achieve interesting properties such as a charge carrier mobility of the order of 100%, larger than that present within a relaxed Si layer.
- a layer is said to be "relaxed" herein if the crystalline material of which it consists, has a lattice parameter substantially identical with its nominal lattice parameter, i.e. with the lattice parameter of the material in its bulk equilibrium form.
- a layer is said to be "strained” herein if the crystalline material of which it consists is elastically strained in tension or in compression during crystal growth, such as epitaxy, which forces its lattice parameter to be substantially different from the nominal lattice parameter of this material.
- a semiconductor-on-insulator structure may thereby be made, in which the semiconductor part comprises or consists of said relaxed thin layer at least partly and the insulator part is usually formed in an intermediate step between step (1 ) and step (2).
- the manufacture of the thin layer may be achieved:
- the donor substrate does not comprise any buffer layer and step (1 ) then consists of growing the thin layer to be strained by the donor substrate.
- a SiGe layer will be grown directly on a Si substrate, on such a thickness that the SiGe layer is globally strained.
- a first technique for relaxing the SiGe layer notably as described in the document of B. Hollander et al. entitled "Strain relaxation of pseudomorphic Si ⁇ -x G ⁇ x /Si(100) heterostructures after hydrogen or helium ion implantation for virtual substrate fabrication" (in Nuclear and Instruments and Methods in Physics Research B 175-177 (2001 ) 357- 367) consists of relaxing, before applying step (2), , the SiGe layer by implanting hydrogen or helium ions in the Si substrate at a determined depth.
- a heat treatment is applied for relaxing or pseudo-relaxing a layer of strained SiGe, bonded to a BPSG glass during step (2).
- the strained layer thus seems to relax via the layer of glass which has become viscous at the treatment's temperature.
- Such a SiGe layer is on the surface and may therefore have to undergo treatments such as finishing treatments (polishing, smoothening, oxidization, cleanings, etc.).
- the present invention attempts to overcome these difficulties by providing a method of forming a relaxed or pseudo-relaxed layer on a substrate, the relaxed layer being in a material selected from semiconductor materials, the method comprising the following steps:
- step (e) heat treating the structure at a temperature close to or higher than the viscosity temperature.
- step (b) and step (c) are operated before any substantial diffusion of a least one species of the material of the strained layer, before contamination of the stressed layer, and before the surface of the stressed layer becomes uncontrollably reactive.
- step (d) a controlled treatment is applied so as to transform at least a portion of the surface layer into a material viscous from the second viscosity temperature, thereby forming a second vitreous layer;
- step (e) is operated during or in continuity after the formation of the second vitreous layer; after step (e), a step is applied for removing the second vitreous layer; the method further comprises a last step of crystal growth is applied on the structure of a material selected among semiconductor materials; the vitreous layer is formed on the receiving substrate, and the method further comprises before step (c), a step of forming on the strained layer a thin layer with a thickness less than the thickness of the strained layer;- step (b) comprises the following two successive operations: (b1) growing a semiconducting layer on the strained layer; (b2) completing a controlled treatment for transforming at least a portion of the layer formed in step (b1) into a viscous material, as from the viscosity temperature, thereby forming the vitreous layer; -
- step (d) comprises selective chemical etching; the vitreous layer formed in step (b) is electrically insulating; the vitreous layer formed in step (b) is in Si0 2 ; the donor substrate is in Si, and the strained layer is in S - x Ge x ; the donor substrate comprises a Si bulk holding substrate and a buffer structure adapting the lattice parameter of Si to Si ⁇ - x Ge X) and the strained layer comprises a Si strained layer and a Si ⁇ _ z Ge z strained layer with z > x; - the layer grown at step (b1) is in Si, and the controlled treatment applied during step (b2) is a controlled thermal oxidization treatment for transforming at least a portion of the Si of the layer formed during step (b1) into Si0 2 ,
- Figures 1a-1 i illustrate the different steps of a first method according to the invention.
- Figures 2a-2i illustrate the different steps of a second method according to the invention.
- Figures 3a-3i illustrate the different steps of a third method according to the invention.
- Figures 4a-4i illustrate the different steps of a fourth method according to the invention.
- Figures 5a-5i illustrate the different steps of a fifth method according to the invention.
- Figures 6a-6i illustrate the different steps of a sixth method according to the invention.
- Figure 7 illustrates an example of a source wafer, with layers to be transferred grown on a buffer structure in SiGe.
- a first object of the present invention consists of forming a relaxed or pseudo-relaxed useful layer on a substrate.
- a second object of the present invention consists of forming on the relaxed or pseudo-relaxed layer, a useful layer of strained material.
- a "useful layer” according to the invention is a layer intended to receive components for electronics, optics, or optoelectronics during treatments subsequent to the application of the method according to the invention.
- a third object of the invention is to protect, throughout the application of the method according to the invention and notably during heat treatments, the layer to be relaxed or pseudo-relaxed from the atmosphere surrounding the structure in which it is contained, in order to prevent at least one of the atomic species of the material of which it is made up, from being able to diffuse.
- a fourth object of the invention is to be able to apply different surface finishing techniques onto the desired structure during its making without damaging the quality of the layer to be relaxed or pseudo-relaxed.
- This fourth object should notably be achieved in the particular case when the layer to be relaxed or pseudo-relaxed is in Si ⁇ -x Ge x , and when the use of different processing techniques on the structure, usually applied on Si structures or layers, is desired.
- the method according to the invention comprises the three aforementioned main steps (1 ), (2) and (3).
- a source wafer 10 according to the invention is illustrated with reference to Figure 1a.
- the wafer 10 consists of a donor substrate 1 and a strained Si- ⁇ _ x Ge x layer 2.
- the donor substrate 1 In a first configuration of the donor substrate 1 , the latter consists entirely of monocrystalline Si with the first lattice parameter.
- this donor substrate 1 is now made by Czochralski growth.
- the latter is a pseudo-substrate comprising an upper Si layer (not illustrated in Figure 1 ), exhibiting an interface with the strained layer 2 and having a first lattice parameter at its interface with the strained layer 2.
- the first lattice parameter of the upper layer is the nominal lattice parameter of Si, so that the latter is in a relaxed state.
- the upper layer further has a sufficiently large thickness so as to be able to impose its lattice parameter to the overlying strained layer 2, without the latter substantially influencing the crystalline structure of the upper layer of the donor substrate 1.
- the strained layer 2 only consists of a single thickness of
- the Ge concentration in this strained layer 2 is preferably higher than 10%, i.e. an x value greater than 0.10.
- the selected material for forming this strained layer 2 thus has a second nominal lattice parameter which is substantially larger than the first lattice parameter.
- the formed strained layer 2 is then elastically strained in compression by the donor substrate 1 , i.e. it is strained so as to have a lattice parameter substantially less than the second lattice parameter of the material of which it is made, and therefore have a lattice parameter close to the first lattice parameter.
- the strained layer 2 further has a substantially constant composition of atomic elements.
- the strained layer 2 is formed on the donor substrate 1 by crystal growth, such as an epitaxy by using known techniques such as for example, LPD, CVD and MBE (respective abbreviations of Liquid Phase Deposition, Chemical Vapor Deposition, and Molecular Beam Epitaxy) techniques.
- a strained layer 2 without too many crystallographic defects, such as for example point defects, or extended defects such as dislocations, it is advantageous to select the crystalline materials forming the donor substrate 1 and the strained layer (in the vicinity of its interface with the holding substrate 1) so that they have a sufficiently small difference between their first and their second respective nominal lattice parameters.
- this lattice parameter difference is typically between about 0.5% and about 1.5%, but may also have larger values.
- the strained layer 2 it is preferable that the strained layer 2 have a substantially constant thickness, so that it has substantially constant intrinsic properties and/or for facilitating the future bonding with the receiver substrate 5 (as illustrated in Figure 1 i).
- the thickness of the latter should further be less than a critical thickness for elastic strain.
- This critical elastic strain thickness mainly depends on the material selected for the strain layer 2 and on said lattice parameter difference with the donor substrate.
- a Si ⁇ _ x G ⁇ x layer with x between 0.10 and 0.30 has a typical thickness between 200 A and 2,000 A, preferably between 200 A and 500 A by notably adapting the growth parameters.
- the strained layer 2 therefore has a lattice parameter substantially close to that of its growth substrate 1 and exhibits internal elastic straines in compression.
- a vitreous layer 4 is formed on the strained layer 2 according to a first embodiment of the vitreous layer 4.
- the material making up the vitreous layer 4 is such that it becomes viscous as from a viscosity temperature
- the material of the vitreous layer 4 is one of the following materials: BPSG, Si0 2 , SiON.
- the value of y may advantageously be varied in order to change the viscosity temperature TQ which is substantially a function of the nitrogen composition for this material.
- T G of the vitreous layer 4 typically between a T G of the order of that of Si0 2 (which may vary around 1 ,150°C) and a Tc of the order of that of Si 3 N 4 (which is higher than 1 ,500°C).
- TQ range may thereby be covered by varying y.
- the T G values of the vitreous layer 4 if they essentially depend on the material of the vitreous layer, may also fluctuate according to the conditions under which it was formed.
- the conditions for forming the vitreous layer 4 may thereby be adapted in a controllable in order to select a T G "a la carte".
- the deposition parameters may thus be varied such as temperature, duration, dosage and potential of the gas atmosphere, etc.
- Doping elements may thereby be added to the main gaseous elements contained in the vitrification atmosphere, such as boron and phosphorus which may have the property of reducing TQ.
- the strained layer 2 be covered with the vitreous layer 4 before: germanium contained in the strained layer 2 is able to diffuse into the atmosphere; and before - the strained layer 2 is contaminated significantly; and before the surface of the strained layer 2 becomes reactive in an uncontrollable way; notably when the whole undergoes a heat treatment at high temperature, such as an RTA type annealing treatment or a sacrificial oxidization treatment.
- a heat treatment at high temperature such as an RTA type annealing treatment or a sacrificial oxidization treatment.
- the following steps are applied onto the strained layer 2:
- step (b1) with reference to Figure 1b, growing a semiconductor material layer 3 on the strained layer 2; and then (b2) with reference to Figure 1c, applying a controlled treatment for transforming at least a portion of the layer formed in step (b1), into a viscous material as from the viscosity temperature, thereby forming the vitreous layer 4.
- the material selected for layer 3 is Si in order not to change the strain in the strained layer 2.
- the thickness of the formed layer 3 is typically between about 5 A and about 5,000 A, more particularly between about 100 A and about 1 ,000 A.
- step (b1 ) of the layer 3 is preferably applied before diffusion of Ge, i.e. shortly after:
- the preferred method for growing layer 3 is in situ growth directly in continuation of the growth of the strained layer 2.
- the growth technique used during step (b1) may be an epitaxy
- the vitreous layer 4 may be made by heat treatment under an atmosphere with a determined composition.
- a Si layer 3 may undergo during step (b2) a controlled heat oxidization treatment in order to transform this layer 3 into a Si0 2 vitreous layer 4.
- a controlled heat oxidization treatment in order to transform this layer 3 into a Si0 2 vitreous layer 4.
- the parameters of the oxidization treatment such as temperature, duration, oxygen concentration, the other gases of the oxidizing atmosphere, etc.
- a dry oxygen or steam atmosphere will preferably be used at a pressure equal to or larger than 1 atm.
- the oxidization duration will then be varied in order to control the oxidization of layer 3.
- control may be made by varying one or several other parameters, either combined or not with the time parameter.
- a deposition of atomic species is applied by means for depositing atomic species on the strained layer 2.
- atomic species consisting of the vitreous material will be deposited directly.
- Si0 2 molecules may be deposited in order to form the Si0 2 vitreous layer 4.
- the deposition of the atomic species should be made before diffusion of Ge, contamination and uncontrolled surface reactivation of the strained layer 2, and notably if the strained layer 2 remains at a high temperature in the meantime.
- steps are illustrated for taking up the strained layer 2 and the vitreous layer 4 from the donor substrate 1 in order to transfer them onto a receiving substrate 7.
- the method according to the invention applies a technique consisting of two successive main steps:
- an optional step for forming a bonding layer on at least one of the two surfaces to be bonded may be applied, this bonding layer having binding properties, at room temperature or at higher temperatures.
- forming a Si0 2 layer may improve the quality of the bond, notably if the other surface to be bonded is in Si0 2 or in Si.
- This Si0 2 bonding layer is then advantageously made by depositing Si0 2 atomic species or by thermal oxidization of the surface to be bonded if the surface of the latter is in Si.
- a step for preparing the surfaces to be bonded is advantageously applied before the bonding in order to make the surfaces as smooth and as clean as possible.
- Suitable chemical treatments for cleaning the surfaces to be bonded may be applied, such as weak chemical etchings, an RCA treatment, ozoned baths, rinses, etc.
- Mechanical or mechanochemical treatments may also be applied such as polishing, abrasion, CMP (Chemical Mechanical Planarization) or atomic species bombardment.
- the bonding operation as such is carried out by bringing the surfaces to be bonded into contact with one another.
- the bonding linkages are preferably of a molecular nature by using the hydrophilic properties of the surfaces to be bonded.
- preliminary dippings of both structures to be bonded in baths may be applied, such as for example rinsing with deionized water.
- An anneal of the bonded whole may further be applied by reinforcing the bonding linkages, for example by changing the nature of the bonding linkages, such as covalent linkages or other linkages.
- vitreous layer 4 is in Si0 2
- an anneal may enhance the bonding linkages, notably if a Si0 2 bonding layer has been formed prior to the bonding to the receiving substrate 7.
- removal of material as preferred according to the invention is applied and it consists of separating a portion of the donor substrate 1 at an embrittlement area 6 present in the donor substrate 1 , by supplying energy.
- this embrittlement area 6 is an area substantially parallel to the bonding surface, and exhibits linkage brittleness between the lower portion 1a of the donor substrate 1 and the upper portion 1 b of the donor substrate 1 , whereby these brittle linkages may be broken when energy is supplied, such as thermal or mechanical energy.
- a technique called Smart-Cut ® is applied and firstly comprises implantation of atomic species into the donor substrate 1 , at the embrittlement area 6.
- the implanted species may be hydrogen, helium, a mixture of both of these species or other lightweight species.
- Implantation preferably occurs just before bonding.
- Implantation energy is selected so that the species implanted through the surface of the vitreous layer 4, cross the thickness of the vitreous layer 4, the thickness of the strained layer 2, and a determined thickness of the upper portion 1 b of the receiving substrate 1.
- Implantation into the donor substrate 1 is preferably sufficiently deep so that the strained layer 2 does not undergo any damages during the detaching step from the donor substrate.
- the implant depth in the donor substrate is thus typically about
- the brittleness of the linkages in the embrittlement area 6 is mainly found by the selection of the dosage of the implanted species, the dosage being thus typically between 10 16 cm “2 and 10 17 cm “2 and more specifically between about 2.10 16 cm “2 and about 7.10 16 cm “2 .
- the detaching at the embrittlement area 6 is then usually carried out by supplying mechanical and/or thermal energy.
- the embrittlement layer 6 is made here before forming the strained layer 2 and during the formation of the donor substrate 1.
- the making of the embrittlement layer comprises the following main operations:
- Finishing techniques such as polishing, abrasion, CMP planarization, RTA thermal annealing, sacrificial oxidization, chemical etching, taken alone or in combination, may be applied for removing this portion 1 B and for perfecting the stacking (strengthening of the bonding interface, removal of bumps, curing defects, etc.).
- the removal of finishing material applies selective chemical etching, either combined or not with mechanical means.
- optional selective etchings for the material(s) to be removed from the donor substrate 1 may be applied according an etch- back type method.
- This technique consists in etching the donor substrate 1 from the back, i.e. from the free face of the donor substrate 1.
- Dry etchings may also be applied for removing material, such as plasma or spray etchings.
- Etching(s) may further only be chemical or electrochemical or photochemical.
- Etching(s) may be preceded or followed by mechanical abrasion of the donor substrate 1 , such as a grinding, a polishing, a mechanical etching or spraying of atomic species.
- the etching(s) may be accompanied by mechanical abrasion, such as polishing optionally combined with action of mechanical abrasives in a CMP method.
- a portion 1 B of the donor substrate 1 is preserved after removal.
- a surface finishing step for the remaining portion 1 B of the donor substrate 1 is advantageously applied, such as optionally selective chemical etching, CMP polishing, heat treatment, a bombardment with atomic species or any other smoothening technique.
- a smoothening treatment is preferably used such as one of the following treatments:
- Ar/H 2 RTA fast annealing followed by polishing in order to obtain a thickness between about 200 A to about 800 A;
- finishing treatments are particularly performing within the framework of the invention as they are applied onto a Si surface (of the remaining portion 1 B of the donor substrate 1 ).
- a structure comprising the receiving substrate 7, the vitreous layer 4, the strained layer 2 and a Si surface layer 1 B (which represents the remaining portion of the donor substrate 1).
- the strained layer 2 is thus protected substantially from the outside by the overlying surface layer 1 B and the underlying vitreous layer 4.
- the surface layer 1 B is preserved as is.
- a second vitreous layer 8 at the surface of the structure consisting of a viscous material as from a second viscosity temperature is applied advantageously, thereby forming it.
- the selected material for the second vitreous layer 8 may for example be one of the following materials: Si0 2 , BPSG, SiO x N y .
- This second vitreous layer 8 is preferably formed by transforming the surface layer 1B into a vitreous layer 4, by means of a suitable controlled treatment.
- the second vitreous layer 8 may be made by heat treatment under an atmosphere with a determined composition.
- the Si surface layer 8 may undergo a controlled thermal oxidization treatment in order to transform this surface layer 8 into a Si0 2 vitreous layer 8.
- the parameters of the oxidizing treatment such as the temperature, duration, oxygen concentration, the other gases of the oxidizing atmosphere, etc.
- a dry oxygen or steam atmosphere will preferably be used at a pressure equal to or larger than 1 atm, at a temperature between about 500°C and about 1 ,050°C.
- the oxidization duration will then preferably be varied for controlling the oxidization of the surface layer 8.
- this control may be made by varying one or several other parameters, either combined or not with the time parameter.
- a heat treatment is then applied at a temperature close to or higher than the viscosity temperature.
- This heat treatment has the main purpose of relaxing the strains in the strained layer 2.
- the vitreous layer 4 is in Si0 2 made by thermal oxidization
- heat treatment at a minimum of about 1 ,050°C, preferably at about a minimum of 1 ,200°C for a determined duration, will cause relaxation or pseudo-relaxation of the strained layer 2.
- the heat treatment typically lasts between a few seconds and several hours.
- This relaxation of the strained layer 2 is achieved without the strained layer 2 being in contact with the outside world, unlike the state of the art, notably by preventing diffusion of Ge.
- the strained layer 2 therefore becomes a relaxed layer 2'.
- a second sought purpose when the heat treatment is applied may further be the achievement of an anneal for strengthening the bonding between the receiving substrate 7 and the vitreous layer 4.
- the temperature selected for the heat treatment is higher than or around the viscosity temperature of the vitreous layer 4, the latter having temporarily become viscous, may generate particular and stronger adhesion linkages with the receiving substrate 7.
- a third sought purpose is to apply said heat treatment in order to form the second Si0 2 vitreous layer 8 by thermal oxidization.
- this vitreous layer 8 be formed during or in continuity of the same heat treatment than the one which relaxes the strained layer 2, by simultaneously injecting oxygen into the oven, or else one just follows the other or during a heat cycle.
- a structure 20 is obtained, consisting of the whole /vitreous layer 8/relaxed Si ⁇ -x Ge x 27vitreous layer 4/receiving substrate 71.
- the relaxed Si 1-x Ge x of layer 2' is thereby protected from the outside by both adjacent vitreous layers 4 and 8.
- the structure 20 will advantageously be treated with hydrofluoric acid HF in order to remove Si0 2 from the vitreous layer 8.
- a structure 30 consisting of /relaxed
- This structure 30 is a SGOI structure (Silicon Germanium On Insulator) if the vitreous layer 4 is electrically insulating, such as for example a Si0 2 vitreous layer 4.
- the relaxed Si ⁇ -x Ge x layer 2' of this structure then has a surface with a surface roughness compatible with growth of another crystalline material.
- a slight surface treatment such as polishing, suitable for Si ⁇ -x Ge x may optionally be applied in order to improve surface properties.
- a growing Si layer 11 on the relaxed Si ⁇ -x Ge x layer 2' is then applied with a thickness substantially less than the strain critical thickness of the material of which it consists, and it is therefore strained by the relaxed Si ⁇ -x Ge x layer 2'.
- This structure 40 is a Si/SGOI structure if the vitreous layer 4 is electrically insulating, such as for example a Si0 2 vitreous layer 4.
- Figures 1 a-1 i except for the step for transforming the surface layer 1 B into a second vitreous layer 8 which is applied here so that the whole surface layer 1B is not transformed.
- this intermediate layer 9 is preserved after the heat treatment for relaxing the strained layer 2.
- This intermediate layer 9 is advantageously preserved with a thickness less than the strain critical thickness so that it is strained subsequently by the relaxed layer 2'.
- growing a Si layer may be resumed on the intermediate layer 9 in order to form a strained Si layer 11 substantially identical with that of Figure 2i.
- a smoothening step for the growth surface by means of one of the techniques already discussed in this document may be applied beforehand to the growth of silicon, in order to improve the quality of the crystal growing to be applied.
- the heat treatment for relaxing the strains of the strained layer 2 is carried out at a temperature and for a duration, respectively higher than a standard temperature and longer than a standard duration, as from which Ge diffuses into Si, Ge contained in the strained layer 2 may diffuse into the intermediate layer 9. This is why it is preferable to apply the relaxation of the strained
- this diffusion effect may be sought if it is suitably controlled.
- diffusion may be controlled in such a way that the Ge species are uniformly distributed throughout both layers 2 and 9, forming a unique Si- ⁇ -x Ge x layer with a substantially uniformized Ge concentration.
- This inserted layer 5 is made so as to have a typical thickness around 10 nm, in any case much less than that of the strained layer 2.
- the strained layer 2 will want to reduce its internal elastic strain energy by utilizing the viscosity properties of the vitreous layer 4 which has become viscous, and, because the inserted layer 5 has a small thickness relatively to the overlying strained layer 2, the strained layer 2 will impose its relaxation requirement to the inserted layer 5.
- the strained layer 2 thereby forces the inserted layer 5 to be under strain at least partially.
- the strained layer 2 then becomes a relaxed layer 2' at least partially.
- the relaxed inserted layer 5 then becomes a strained inserted layer 8'.
- the formed structure is then a structure consisting of /relaxed Si ⁇ _ x Ge x /strain Si/vitreous layer 4/ receiving substrate 71.
- This structure 30 is a SG/SOI structure if the vitreous layer 4 is electrically insulating, such as for example a Si0 2 vitreous layer 4.
- the formed structure is then a structure 40 consisting of /strained Si/relaxed Si ⁇ - x Ge x /strained Si/ vitreous layer 4/receiving substrate 71.
- This structure 40 is a Si/SG/SOI structure, if the vitreous layer 4 is electrically insulating, such as for example a Si0 2 vitreous layer 4.
- the heat treatment for relaxing the strains of the strained layer 2 is carried out at a temperature and for a duration, respectively higher than a standard temperature and longer than a standard duration, as from which Ge diffuses into Si, Ge contained in the strained layer 2 may diffuse into the strained inserted layer 5'.
- diffusion may be controlled in such a way that the Ge species are distributed uniformly throughout both layers 2 and 5 forming a unique Si ⁇ -x Ge x layer with a substantially uniformized Ge concentration.
- the method is globally the same as the one described with reference to Figures 1a-1 i, except for: • the step of transforming the layer 3 into a vitreous layer 4, which is applied here so that the whole layer 3 is not transformed;
- this method comprises a step identical with the one described with reference to Figure 3c, forming an inserted layer 5 (see Figure 3c) and a step identical with the one described with reference to Figure 2g, forming an intermediate layer 9 (see Figure 2g).
- the method is globally the same as the one described with reference to Figures 1 a-1 i, except that: - with reference to step 5b, the epitaxied Si layer 3 on the strained layer 2 is a very thin layer, the thickness of which is much less than that of the strained layer 2, typically from 100 to 300 A; with reference to Figure 5d, the vitreous layer 4 is formed on the receiving substrate 7.
- the Si layer 3 will thus enable: the overlying SiGe strained layer 2 to be protected from Ge diffusion, external contamination and uncontrolled potential reactivation of its surface; perfectly mastered surface finishing means to be applied for Si, whereas they are much less well mastered for SiGe, these finishing techniques (already detailed above in this document) notably providing good bonding with the receiving substrate 7.
- a vitreous layer 4 is formed on the receiving substrate 7 according to a first embodiment of the vitreous layer 4.
- the material forming the vitreous layer 4 is such that it becomes viscous as from a viscosity temperature TQ.
- the material of the vitreous layer 4 is one of the following materials: BPSG, Si0 2 , SiON.
- This first embodiment for forming the vitreous layer 4 on the receiving substrate is applied similarly to the first embodiment for forming the vitreous layer 4 on the strained layer 2 as described above in this document (with reference to Figure 1 c).
- oxidization of the Si surface of the receiving substrate 7 forms a Si0 2 vitreous layer 4. It is important that the formation of the vitreous layer 4 and the bonding of the vitreous layer 4 with the strained layer 2 be completed before Ge diffusion, contamination and uncontrolled reactivation of the surface of the strained layer 2, and notably if the strained layer 2 remains at a high temperature in the meantime.
- deposition of atomic species is applied by means for depositing atomic species on the receiving substrate 7.
- the atomic species consisting of vitreous material such as Si0 2 will be deposited directly.
- the following operations will be applied:
- deposition of amorphous Si atomic species in order to form an amorphous Si layer • deposition of amorphous Si atomic species in order to form an amorphous Si layer; and then: o thermal oxidization of this amorphous Si layer and thereby making a Si0 2 vitreous layer 4.
- deposition of the atomic species should be achieved before Ge diffusion, contamination and uncontrolled reactivation of the surface of the strained layer 2, and notably if the strained layer 2 remains at a high temperature in the meantime.
- the strained layer 2 then becomes at least a partially relaxed layer 2'; the inserted layer 3 then becomes a strained inserted layer 3'.
- the formed structure is then a structure consisting of /relaxed Si ⁇ _ x Ge x /strained Si/vitreous layer 4/receiving substrate 71.
- This structure 30 is a SG/SOI structure, if the vitreous layer 4 is electrically insulating, such as for example a Si0 2 vitreous layer 4.
- the relaxed Si-i- x Ge x layer 2' may then be optionally removed, for example by selective chemical etching based on HF:H 2 0 2 :CHsCOOH (selectivity of about 1 :1 ,000) in order to finally have a structure consisting of /strained Si/vitreous layer 4/receiving substrate II.
- This structure is a strained SOI structure, if the vitreous layer 4 is electrically insulating, such as for example a Si0 2 vitreous layer 4.
- This structure 40 is a Si/SG/SOI structure, if the vitreous layer 4 is electrically insulating, such as for example a Si0 2 vitreous layer 4.
- the heat treatment for relaxing the strains of the strained layer 2 is carried out at a temperature and for a duration respectively higher than a standard temperature and longer than a standard duration as from which Ge diffuses into Si, Ge contained in the strained layer 2 may diffuse into the strained inserted layer 3'.
- this diffusion effect if it is suitably controlled, may be sought.
- diffusion may be controlled in such a way that the Ge species are uniformly distributed throughout both layers 2 and 5, forming a unique Si 1-x Ge x layer with a substantially uniformized Ge concentration.
- this intermediate layer 9 is preserved after the heat treatment for relaxing the strained layer 2.
- this intermediate layer 9 is preserved with a thickness less than the strain critical thickness, so that it is strained subsequently by the relaxed layer 2'.
- the heat treatment for relaxing the straines of the strained layer 2 is carried out at a temperature and for a duration respectively higher than a standard temperature and longer than a standard duration, as from which Ge diffuses into Si, Ge contained in the strained layer 2 may diffuse into the intermediate layer 9 or into the inserted layer 3. This is why it is preferable to apply the relaxation of the strained layer 2
- this diffusion effect if it is suitably controlled, may be sought.
- diffusion may be controlled so that the Ge species are uniformly distributed throughout both layers 2, 3 and 9, forming a unique Si ⁇ - x Ge x layer with a substantially uniformized Ge concentration.
- steps for making components may be integrated or may follow this method according to the invention.
- preparation steps for the making of components may be applied during the method at the strained SiGe layer 2 of the structure with reference to Figures 1g, 2g, 3g, 4g, 5f or 6f, at the relaxed or pseudo- relaxed SiGe layer 2' of the SGOI structure with reference to Figures 1h, 2h, 3h, 4h, 5g or 6g, or in the strained Si layer 11 of the Si/SGOI structure with reference to Figures 1i, 2i, 3i, 4i, 5h or 6h.
- these preparation steps will be achieved with the vitreous layer 8 always present in the structure, the latter protecting the underlying layers, and notably the strained layer 2 or the relaxed layer 2', both in SiGe.
- local treatments may be undertaken for etching through the vitreous layer 8, patterns in the layers, for example by lithography, photolithography, reactive ion etching, or any other etching technique with pattern masking.
- patterns such as islands are thus etched into the SiGe strained layer 2 in order to contribute to proper relaxation of the strained layer 2 during the subsequent application of the relaxation heat treatment.
- One or several steps for making the components, such as transistors, in the strained Si layer 11 (or in the relaxed SiGe layer 2' if the latter is not covered with a strained Si layer 11 ) may notably be applied, preferably at a temperature less than TG (SO as not to change the strain ratio of the relaxed layer 2' and the strained layer 11).
- steps for making the components are applied during or in continuity of the heat treatment for relaxing the strained SiGe layer 2.
- the step for epitaxy of the strained Si layer is applied during or in continuity of the steps for making the components.
- FIG 7 which represents a source wafer 10 before the formation of the embrittlement zone 6 and the formation of the vitreous layer 4
- an embodiment of the invention is now presented, different from the various examples previously detailed referring to figure 1a to 1 i, 2a to 2i, 3a to 3i, 4a to 4i, 5a to 5h and 6a to 6h, by the way of choosing the materials constituting the donor substrate 1 and the strained layer 2.
- the donor substrate 1 here is composed of a holding substrate 1-1 of Si and a buffer structure composed of a buffer layer 1-2 in SiGe and an upper layer 1-3 in Si ⁇ -2 Ge z .
- the holding substrate 1-1 is preferably in a bulk structure of single- crystal.
- the buffer layer 1-2 can for example be constituted of a stacking of layers so that the whole composition of Ge inside the buffer layer 1-2 gradually evoluates from 0% at the interface with the holding substrate 1-2 to 100z% of Ge at the interface with the upper layer 1-3 of Si ⁇ -z Ge z .
- the upper layer 1-3 has a Ge composition constant in its thickness.
- the upper layer 1-3 has a thickness sufficiently important to assign its lattice parameter to the overlied layer. Furthermore, the upper layer 1-3 of Si ⁇ -2 Ge z has a relaxed structure. Thus, the buffer structure (composed of the buffer layer 1-2 and the upper layer 1-3) allows:
- the strained layer 2 is grown by epitaxy techniques, such as CVD techniques (PECVD, MOCVD). Firstly, a strained Si layer 2-1 is formed on the donor substrate 1 with a thickness no more than the critical thickness beyond which a such Si layer 2-1 starts to relax its elastic strains.
- CVD chemical vapor deposition
- a Si ⁇ -x Ge x strained layer 2-2 is then formed on the last Si strained layer 2-1 , so as to have a thickness less than the critical thickness of Si ⁇ _ x Ge x beyond which the elastic strains start to relax.
- the strained layer 2 includes the Si strained layer 2-1 and the S _ x Ge x layer 2-2, and that the donor substrate 1 comprises the holding substrate 1-1 , the buffer layer 1-2, and the upper layer 1-3 of Si ⁇ _ z Ge z
- the previous examples, (presented referring to the previous figures) of various embodiments of manufacturing a semiconductor-on-insulator structure 30 or 40 can then be easily transposed from the source wafer 10 of the figure 7, the embrittlement zone 6 being formed in the upper layer 1-3 or in the buffer layer 1-2.
- the semiconductor-on-insulator structure then obtained comprises successively a receiving substrate 7, a vitreous layer 4, the Si ⁇ -x Ge x strained layer 2-2, the Si strained layer 2-1 and the remaining part of the Si 1-z Ge z upper layer 1-3.
- This thermal treatment then relaxes at least partly the Si ⁇ -x Ge x layer 2-2.
- the relaxed Si ⁇ _ x Ge x layer 2-2 imposes then elastic constraint to the top Si strained layer 2-1 and to the remaining part of the upper layer 1-3 of Si ⁇ _ z Ge z .
- An optional additional step of removal of the remaining part of the upper layer 1-3 of Si ⁇ -z Ge z is processed, by means for example of a selective chemical etching employing for instance etch agent as HF:H 2 0 2 :CH 3 COOH (selectivity about 1 :1000 between SiGe and Si).
- this semiconductor-on-insulator structure is not obtained from a source wafer comprising a buffer structure adapting the parameter to a Si ⁇ .-x Ge x , but from a buffer structure adapting the parameter to a Si- ⁇ -z Ge z with z ⁇ x.
- a buffer structure which adapts a lattice parameter to a Si-i. x Ge x is thicker, comprises more stacking layers, and so is longer and more expansive to manufacture, than a buffer structure which adapts a lattice parameter to a S ⁇ ' ⁇ _ z Ge z .
- This method according to the embodiment of the invention offers then technical and economical improvements comparing with the latter prior art.
- One or any epitaxies may be applied onto the final structure (structure 30 or 40 taken with reference to Figure 1h, 1i, 2h, 2i, 3h, 3i, 4h, 4i, 5g, 5h, 6g, 6h), such as an epitaxy of a SiGe or SiGeC layer, or an epitaxy of a strained Si or SiC layer, or successive epitaxies of SiGe or SiGeC layers and of alternately strained Si or SiC layers in order to form a multilayer structure.
- finishing treatments may optionally be applied, comprising an anneal for example.
- the present invention is not limited either to a SiGe strained layer 2, but also extends to form ing the strained layer 2 in other types of materials of the lll-V or ll-VI type, or other semiconductor materials.
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Abstract
L'invention porte sur un procédé de formation d'une couche exempte de tensions ou d'une couche pseudo-détendue sur un substrat, la couche exempte de tensions (2') étant faite d'un matériau choisi parmi des matériaux semiconducteurs. L'invention comprend les étapes suivantes : a) croissance sur un substrat donneur (1) d'une couche à contrainte élastique (2) constituée d'au moins un matériau choisi parmi les matériaux semiconducteurs ; b) formation sur la couche contrainte (2), ou sur un substrat receveur (7) d'une couche vitreuse (4) faite d'un matériau visqueux obtenu à une température de viscosité ; c) liaison du substrat receveur (7) à la couche contrainte (2) par la couche vitreuse (4) ; d) extraction d'une partie du substrat donneur (1) de manière à pouvoir obtenir une structure (20) comprenant le substrat receveur (2), la couche vitreuse (4) et la couche contrainte (2), ainsi que la partie non-retirée du substrat donneur (1) qui forme ainsi une couche de surface ; e) application d'un traitement thermique à la structure à une température proche ou supérieure à la température de viscosité. L'invention porte également sur des structures obtenues pendant le procédé de formation d'une couche exempte de tensions ou d'une couche pseudo-détendue sur un substrat.
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FR0302518 | 2003-02-28 | ||
FR0302518A FR2851847B1 (fr) | 2003-02-28 | 2003-02-28 | Relaxation d'une couche mince apres transfert |
PCT/IB2004/000927 WO2004077552A1 (fr) | 2003-02-28 | 2004-03-01 | Relaxation d'une couche mince apres son transfert |
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EP (1) | EP1597758A1 (fr) |
JP (1) | JP4980049B2 (fr) |
FR (1) | FR2851847B1 (fr) |
WO (1) | WO2004077552A1 (fr) |
Families Citing this family (9)
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US7235812B2 (en) * | 2004-09-13 | 2007-06-26 | International Business Machines Corporation | Method of creating defect free high Ge content (>25%) SiGe-on-insulator (SGOI) substrates using wafer bonding techniques |
CN100481345C (zh) * | 2005-02-24 | 2009-04-22 | 硅绝缘体技术有限公司 | SiGe层的热氧化及其应用 |
TWI457984B (zh) * | 2008-08-06 | 2014-10-21 | Soitec Silicon On Insulator | 應變層的鬆弛方法 |
EP2151856A1 (fr) | 2008-08-06 | 2010-02-10 | S.O.I. TEC Silicon | Relâchement de couches tendues |
EP2151852B1 (fr) | 2008-08-06 | 2020-01-15 | Soitec | Relâchement et transfert de couches tendues |
EP2159836B1 (fr) * | 2008-08-25 | 2017-05-31 | Soitec | Couches de durcissement pour le relâchement de couches contraintes |
CN102239538A (zh) * | 2008-09-24 | 2011-11-09 | S.O.I.探测硅绝缘技术公司 | 形成经松弛半导体材料层、半导体结构、装置的方法及包含经松弛半导体材料层、半导体结构、装置的工程衬底 |
FR2936903B1 (fr) * | 2008-10-07 | 2011-01-14 | Soitec Silicon On Insulator | Relaxation d'une couche de materiau contraint avec application d'un raidisseur |
EP2221853B1 (fr) * | 2009-02-19 | 2012-04-25 | S.O.I. TEC Silicon | Relaxation et transfert de couches de matériaux sous contrainte |
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US5906951A (en) * | 1997-04-30 | 1999-05-25 | International Business Machines Corporation | Strained Si/SiGe layers on insulator |
US5882987A (en) * | 1997-08-26 | 1999-03-16 | International Business Machines Corporation | Smart-cut process for the production of thin semiconductor material films |
US20020089032A1 (en) * | 1999-08-23 | 2002-07-11 | Feng-Yi Huang | Processing method for forming dislocation-free silicon-on-insulator substrate prepared by implantation of oxygen |
JP4226175B2 (ja) * | 1999-12-10 | 2009-02-18 | 富士通株式会社 | 半導体装置およびその製造方法 |
KR100429869B1 (ko) * | 2000-01-07 | 2004-05-03 | 삼성전자주식회사 | 매몰 실리콘 저머늄층을 갖는 cmos 집적회로 소자 및기판과 그의 제조방법 |
JP2002164520A (ja) * | 2000-11-27 | 2002-06-07 | Shin Etsu Handotai Co Ltd | 半導体ウェーハの製造方法 |
US6940089B2 (en) * | 2001-04-04 | 2005-09-06 | Massachusetts Institute Of Technology | Semiconductor device structure |
JP2002305293A (ja) * | 2001-04-06 | 2002-10-18 | Canon Inc | 半導体部材の製造方法及び半導体装置の製造方法 |
JP3648466B2 (ja) * | 2001-06-29 | 2005-05-18 | 株式会社東芝 | 電界効果トランジスタ、半導体基板、電界効果トランジスタの製造方法及び半導体基板の製造方法 |
JP2003031495A (ja) * | 2001-07-12 | 2003-01-31 | Hitachi Ltd | 半導体装置用基板の製造方法および半導体装置の製造方法 |
-
2003
- 2003-02-28 FR FR0302518A patent/FR2851847B1/fr not_active Expired - Lifetime
-
2004
- 2004-03-01 WO PCT/IB2004/000927 patent/WO2004077552A1/fr active Application Filing
- 2004-03-01 JP JP2006502498A patent/JP4980049B2/ja not_active Expired - Lifetime
- 2004-03-01 EP EP04715981A patent/EP1597758A1/fr not_active Withdrawn
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JP4980049B2 (ja) | 2012-07-18 |
FR2851847B1 (fr) | 2005-10-14 |
JP2006519488A (ja) | 2006-08-24 |
WO2004077552A1 (fr) | 2004-09-10 |
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