EP1552558A1 - Support device for monolithically integrated circuits - Google Patents
Support device for monolithically integrated circuitsInfo
- Publication number
- EP1552558A1 EP1552558A1 EP03775171A EP03775171A EP1552558A1 EP 1552558 A1 EP1552558 A1 EP 1552558A1 EP 03775171 A EP03775171 A EP 03775171A EP 03775171 A EP03775171 A EP 03775171A EP 1552558 A1 EP1552558 A1 EP 1552558A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- carrier device
- platforms
- pedestals
- height
- platform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000463 material Substances 0.000 claims description 13
- 239000013078 crystal Substances 0.000 claims description 6
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 6
- 230000032798 delamination Effects 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 238000005452 bending Methods 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- 239000004033 plastic Substances 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- 241001310793 Podium Species 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000012876 carrier material Substances 0.000 description 1
- 238000005352 clarification Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H01L23/495—Lead-frames or other flat leads
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- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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Definitions
- the invention relates to a carrier device for a monolithically integrated circuit, the carrier device being encapsulated with the monolithically integrated circuit, the chip, by means of a thermoplastic.
- the plastic casing serves as the housing and the connecting legs which are coupled to the metallic carrier device and which are guided via bonding connections to the bonding contacts of the monolithically integrated circuit form the electrical housing connections.
- the reference potential of the monolithically integrated circuit which is generally the ground potential or a supply potential, is as homogeneous and undisturbed as possible so that this is achieved as well as possible in all operating states, most monolithically integrated circuits are not only connected to the reference potential via its back via the support platform, but the circuit itself is connected to the support platform via a large number of additional connections. This is usually done via bond connections from
- Bond contacts of the chip surface on the carrier platform To ensure that the bonding connections, which usually consist of gold wire, adhere well to the carrier platform made of copper, it is finished with a thin coating of silver, gold or another suitable material.
- Circuits with a high power consumption can reach crystal temperatures of up to 150 degrees Celsius and more during operation, while in the de-energized state the circuit assumes its ambient temperature, which can go down to -40 degrees Celsius in the automotive field, for example.
- the result is mechanical stresses between the individual materials because they have different coefficients of thermal expansion. This effect is exacerbated by the size of the monolithically integrated circuits. So shear forces occur between the individual layers of the housing, the chip and the carrier device. The shear forces that occur between the molding compound and the metallization layer of the carrier device are particularly dangerous because the adhesive forces there are relatively low and the thermal expansion of the metallic coating on the platform is very different
- Support platform no longer be led directly, but instead on platforms connected to the support platform.
- the platforms are elevated compared to the platform level and, due to their relatively steep flanks, form a mechanical fixed point in the area of the respective bond contacts with respect to lateral movements.
- the required height results from the elastic and plastic properties of the plastic and can be optimized in the experiment.
- a height that is approximately in the range of 1/10 of the chip height to the chip height itself is sensible.
- the pedestal is formed by a drawing or pressing process with a stamp-like tool in the frame production, then the height corresponds to approximately 1/10 of the material thickness of the carrier up to a maximum of its material thickness itself.
- flanks can be produced at an angle of more than 90 degrees, for example by undercut, a suitable crimping or a subsequent upsetting.
- the transitions at the upper and lower edge of the flank are also important, as they should have only minimal rounding radii, because otherwise a vertical component is added to the shear component, which promotes the lifting of the bond contacts on the pedestals again.
- the optimal flank height and its steepness which should be at least 45 degrees, are related.
- it is better for the Fixpun function if there are a large number of pedestals on the carrier device, even if not all pedestals are used for contacting.
- the podiums by themselves, i.e. without contacting them, are a suitable measure against others Disadvantages of delamination, for example, through which moisture can penetrate capillary into the housing.
- the platforms are on the edge of the support platform, it is possible to manufacture them by a kind of bending or folding device, for example by flanging special carrier areas at the edge of the platform.
- the presence of the platforms also facilitates selective finishing of the carrier device, e.g. by silvering or gilding.
- the finishing can more easily be restricted to the platforms due to the shape deviation of the platforms from the rest of the support platform, which means the rest
- Carrier device is spared from the finishing. In addition to saving material, this improves the overall adhesion of the plastic, because the copper oxide on the carrier surface has significantly better adhesion than the conventional finishing materials compared to the plastic.
- pedestals Another advantage of the pedestals is the reduction in the different heights when bonding the semiconductor crystal to the connection legs and the support platform.
- Fig. 2 shows in supervision a pedestal with multiple bonds
- FIG. 3 shows a top view of a carrier device with a chip and a plurality of pedestals.
- 1 schematically shows a detail of a cross section through a carrier device 1 with a platform 2.
- the cutting line runs through the platform 2, which is formed by means of a stamping tool during the frame production.
- the height hp of the platform with 120 micrometers is in the example shown about 1/3 of the carrier height h, which here has about 250 micrometers.
- the optimum of the platform height hp compared to the material thickness h of the carrier device 1 is approximately in a range from 1/5 to twice the material thickness h. Compared to the current crystal height of approximately 300 micrometers, this corresponds to a range of 1/10 of this crystal height up to 1.5 times the value.
- the platform In order for the platform to be suitable for multiple bonding, it must have a sufficient length and width, since about 35 micrometers plus a required bond spacing is required for each bond diameter.
- Bond wires 5 and 6 point in opposite directions. With this pedestal 2, two different chips can thus be connected to it on the support platform 1 shown in sections by means of multiple bonds.
- FIG. 3 finally shows a top view of a carrier device 1 designed as a platform with a single chip 7, which schematically represents a monolithically integrated circuit.
- the contacts from the chip 7 to the pedestals 2 are designed as multiple bonds. If the same carrier device 1 is used for different circuits, then it does no harm if some of the platforms 2, 2 'are not contacted. On the contrary, they represent additional fixed points that are even advantageous in the sense of the invention.
- the platform 2 ' is an example of a non-contact. it pedestal.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The invention relates to a support device (1) for a monolithically integrated circuit with connecting areas, which are provided in the form of platforms (2, 2'), for bondable contacts (5, 6). Said platforms (2, 2') are elevated with regard to a chip contacting area on the support device (1) and have steep flanks (3).
Description
Trägereinrichtung für monolithisch integrierte Schaltungen Carrier device for monolithically integrated circuits
Die Erfindung betrifft eine Trägereinrichtung für eine monolithisch integrierte Schaltung, wobei die Trägereinrichtung mit der monolithisch integrierten Schaltung, dem Chip, mittels eines thermoplastischen Kunststoffes umspritzt wird. Die Kunststofrumhüllung dient dabei als Gehäuse und die mit der metallischen Trägereinrichtung verkoppelten Anschlußbeine, die über Bondverbindungen mit den Bondkontakten der monolithisch integrierten Schaltung geführt sind, bilden die elektrischen Gehäuseanschlüsse. Bei vielen Schaltungen ist es erforderlich, daß das Bezugspotential der monolithisch integrierten Schaltung, das in der Regel das Massepotential oder eine Versorg ungspotential ist, möglichst homogen und nicht gestört ist Damit dies bei allen Betriebszuständen möglichst gut erreicht wird, sind die meisten monolithisch integrierten Schaltungen nicht nur über ihre Rückseite über die Trägeφlattform an das Bezugspotential angeschlossen, sondern die Schaltung selbst ist über eine Vielzahl von Zusatzverbindungen an die Trägeφlattform angeschlossen. Dies erfolgt in der Regel über Bondverbindungen vonThe invention relates to a carrier device for a monolithically integrated circuit, the carrier device being encapsulated with the monolithically integrated circuit, the chip, by means of a thermoplastic. The plastic casing serves as the housing and the connecting legs which are coupled to the metallic carrier device and which are guided via bonding connections to the bonding contacts of the monolithically integrated circuit form the electrical housing connections. In many circuits, it is necessary that the reference potential of the monolithically integrated circuit, which is generally the ground potential or a supply potential, is as homogeneous and undisturbed as possible so that this is achieved as well as possible in all operating states, most monolithically integrated circuits are not only connected to the reference potential via its back via the support platform, but the circuit itself is connected to the support platform via a large number of additional connections. This is usually done via bond connections from
Bondkontakten der Chipoberfläche auf die Trägerplattform. Damit eine gute Haftung der meist aus Golddraht bestehenden Bondverbindungen auf der aus Kupfer bestehenden Trägerplattform erreicht wird, ist diese mit einem dünnen Belag aus Silber, Gold oder einem anderen geeigneten Material veredelt.Bond contacts of the chip surface on the carrier platform. To ensure that the bonding connections, which usually consist of gold wire, adhere well to the carrier platform made of copper, it is finished with a thin coating of silver, gold or another suitable material.
Schaltungen mit einer hohen Leistungsaufnahme können im Betrieb Kristalltemperaturen bis 150 Grad Celsius und mehr erreichen, während im stromlosen Zustand die Schaltung ihre Umgebungstemperatur annimmt, die beispielsweise im Kraftfahrzeugbereich bis -40 Grad Celsius herunter gehen kann. Die Folge sind mechanische Spannungen zwischen den einzelnen Materialien, weil diese unterschiedliche Wärmeausdehnungskoeffizienten aufweisen. Dieser Effekt verschärft sich mit der Größe der monolithisch integrierten Schaltungen. So treten Scherkräfte zwischen den einzelnen Schichten des Gehäuses, des Chips und der Trägereinrichtung auf. Besonders gefährlich sind dabei die Scherkräfte, die zwischen der Preßmasse und der Metallisierungsschicht der Trägereinrichtung auftreten, weil dort die Haftungskräfte relativ gering sind und die thermische Ausdehnung des metallischen Belags auf der Plattform sehr unterschiedlich zumCircuits with a high power consumption can reach crystal temperatures of up to 150 degrees Celsius and more during operation, while in the de-energized state the circuit assumes its ambient temperature, which can go down to -40 degrees Celsius in the automotive field, for example. The result is mechanical stresses between the individual materials because they have different coefficients of thermal expansion. This effect is exacerbated by the size of the monolithically integrated circuits. So shear forces occur between the individual layers of the housing, the chip and the carrier device. The shear forces that occur between the molding compound and the metallization layer of the carrier device are particularly dangerous because the adhesive forces there are relatively low and the thermal expansion of the metallic coating on the platform is very different
Ausdehnungskoeffizient des darüberliegenden Kunststoffes ist. Dies wirkt sich insbesondere auf die Bondkontakte auf der Trägerplattform aus. Die Folge bei vielen thermischen Zyklen ist, daß schließlich eine Trennung (=Delamination) des Kunststoffes von der Belagoberfläche erfolgt und
damit eine Relativbewegung ermöglicht wird. Die einzigen mechanischen Fixpunkte stellen nun die, Bondkontakte auf der Plattform dar, die damit natürlich überfordert sind und sich schließlich ebenfalls lösen, wodurch die dortige Verbindung unterbrochen wird. Damit kann aber das geforderte gleichförmige Bezugspotential nicht mehr eingehalten werden, so daß sich die Funktion der Schaltung zunehmend verschlechtert bis sie schließlich sogar ganz ausfallen kann.Expansion coefficient of the overlying plastic is. This particularly affects the bond contacts on the carrier platform. The consequence of many thermal cycles is that there is finally a separation (= delamination) of the plastic from the surface of the covering and so that a relative movement is made possible. The only mechanical fixed points are now the bond contacts on the platform, which are of course overwhelmed and eventually also come loose, which breaks the connection there. However, this means that the required uniform reference potential can no longer be maintained, so that the function of the circuit deteriorates until it can even fail completely.
Es ist daher Aufgabe der Erfindung, hier auf möglichst einfache und kostengünstige Weise Abhilfe zu schaffen.It is therefore an object of the invention to remedy this in the simplest and cheapest possible way.
Die Lösung der Aufgabe erfolgt dadurch, daß die Bondverbindungen vom Chip auf dieThe problem is solved in that the bond connections from the chip to the
Trägeφlattform nicht mehr direkt geführt werden, sondern statt dessen auf mit der Trägeφlattform verbundenen Podeste. Die Podeste sind die gegenüber der Plattformebene erhöht und bilden durch ihre relativ steilen Flanken gegenüber lateralen Bewegungen einen mechanischen Fixpunkt im Bereich der jeweiligen Bondkontakte. Die erforderliche Höhe ergibt sich aus den elastischen und plastischen Eigenschaften des Kunststoffes und kann im Versuch optimiert werden. Sinnvoll ist dabei eine Höhe, die etwa im Bereich von 1/10 der Chip-Höhe bis zur Chip-Höhe selbst liegt. Oder wenn das Podest durch einen Zieh- oder Preßvorgang mit einem stempelartigen Werkzeug bei der Frame- Herstellung gebildet wird, dann entspricht die Höhe etwa 1/10 der Materialdicke des Trägers bis maximal zu dessen Materialdicke selbst. Diese Grenzen ergeben sich dadurch, daß bei einer zu geringen Höhe der Podeste sich deren Übergang nicht mehr steilflankig genug ausbilden läßt und andererseits bei einer zu großen Höhe das Material in der Flanke zu dünn wird oder gar reißt. Je steiler die Flanken sind, desto besser ist natürlich die Wirkung des Podestes als Fixpunkt, aber das hängt natürlich auch von den Materialeigenschaften des verwendeten Kunststoffes ab. Es ist sogar möglich, daß Flanken mit einem Winkel von mehr als 90 Grad herstellbar sind, beispielsweise durch Unterätzung, ein geeignetes Abbördeln oder ein nachfolgendes Stauchen. Wichtig sind auch die Übergänge an der oberen und unteren Kante der Flanke, die möglichst nur geringer Verrundungsradien aufweisen sollen, weil ansonsten zur Scherkomponente noch eine vertikale Komponente hinzukommt, die das Abheben der Bondkontakte auf den Podesten wieder begünstigt. Die optimale Flankenhöhe und ihre Steilheit, die mindestens 45 Grad betragen sollte, hängen somit zusammen. Selbstverständlich ist es für die Fixpun funktion besser, wenn auf der Trägereinrichtung eine Vielzahl von Podesten vorhanden ist, auch wenn nicht alle Podeste der Kontaktierung dienen. Die Podeste für sich, also auch ohne Kontaktierung, sind eine geeignete Maßnahme gegen andere
Nachteile der Delaminierung, durch die beispielsweise Feuchtigkeit kapillar in das Gehäuse eindringen kann.Support platform no longer be led directly, but instead on platforms connected to the support platform. The platforms are elevated compared to the platform level and, due to their relatively steep flanks, form a mechanical fixed point in the area of the respective bond contacts with respect to lateral movements. The required height results from the elastic and plastic properties of the plastic and can be optimized in the experiment. A height that is approximately in the range of 1/10 of the chip height to the chip height itself is sensible. Or if the pedestal is formed by a drawing or pressing process with a stamp-like tool in the frame production, then the height corresponds to approximately 1/10 of the material thickness of the carrier up to a maximum of its material thickness itself. These limits result from the fact that with a too low a height of the platforms, their transition can no longer be formed with steep sides and, on the other hand, if the height is too high, the material in the flank becomes too thin or even tears. The steeper the flanks, the better the effect of the platform as a fixed point, of course, but that of course also depends on the material properties of the plastic used. It is even possible that flanks can be produced at an angle of more than 90 degrees, for example by undercut, a suitable crimping or a subsequent upsetting. The transitions at the upper and lower edge of the flank are also important, as they should have only minimal rounding radii, because otherwise a vertical component is added to the shear component, which promotes the lifting of the bond contacts on the pedestals again. The optimal flank height and its steepness, which should be at least 45 degrees, are related. Of course, it is better for the Fixpun function if there are a large number of pedestals on the carrier device, even if not all pedestals are used for contacting. The podiums by themselves, i.e. without contacting them, are a suitable measure against others Disadvantages of delamination, for example, through which moisture can penetrate capillary into the housing.
Die Podeste bilden kleine Ebenen, die parallel zur Trägeφlattform ausgerichtet sind und gegebenenfalls auch mehrere Bondkontakte, zum Beispiel solche mit einer „Kugelbondung" (=Stand Off Stitch Bond) zulassen. Daß mehrere Kontakte auf einem Podest möglich sind, ist kein Widerspruch zu der eben genannten Forderung nach einer Vielzahl von Podesten. Denn häufig ist es so, daß die Niederohmigkeit nur durch Parallelbondungen zu dem jeweiligen Chip-Anschluß erreichbar ist und dann sollen die zugehörigen Bonddrähte auch möglichst kurz und induktivitätsarm sein.The platforms form small levels, which are aligned parallel to the support platform and possibly also allow several bond contacts, for example those with a "ball bond" (= Stand Off Stitch Bond). That multiple contacts are possible on one platform is not a contradiction to the level mentioned requirement for a large number of pedestals, because it is often the case that the low resistance can only be achieved by means of parallel bonds to the respective chip connection, and then the associated bond wires should also be as short and low-inductance as possible.
Wenn die Podeste am Rand der Trägeφlattform liegen, ist es möglich, sie durch eine Art Abbiegeoder Abkantvorrichtung herzustellen, beispielsweise durch Umbördeln spezieller Trägerbereiche am Rand der Plattform. Eine andere Möglichkeit, die auf die Stärke des Trägermaterials keine Rücksicht nehmen muß, ist die Herstellung der Podeste durch Materialauftrag, beispielsweise durch Auflöten, Aufschweißen oder Aufkleben von separaten Podesten.If the platforms are on the edge of the support platform, it is possible to manufacture them by a kind of bending or folding device, for example by flanging special carrier areas at the edge of the platform. Another possibility, which does not have to take the thickness of the carrier material into account, is the manufacture of the platforms by applying material, for example by soldering, welding or gluing on separate platforms.
Das Vorhandensein der Podeste erleichtert auch eine selektive Veredelung der Trägereinrichtung, z.B. durch Versilbern oder Vergolden. Die Veredelung kann durch die Formabweichung der Podeste von der übrigen Trägeφlattform leichter auf die Podeste beschränkt werden, wodurch die übrigeThe presence of the platforms also facilitates selective finishing of the carrier device, e.g. by silvering or gilding. The finishing can more easily be restricted to the platforms due to the shape deviation of the platforms from the rest of the support platform, which means the rest
Trägereinrichtung von der Veredelung ausgespart wird. Neben der Materialeinsparung wird dadurch insgesamt eine bessere Haftung des Kunststoffes erreicht, denn das auf der Trägeroberfläche vorhandene Kupfer-Oxyd weist gegenüber dem Kunststoff eine deutlich bessere Haftung auf als die gängigen Veredelungsmaterialien.Carrier device is spared from the finishing. In addition to saving material, this improves the overall adhesion of the plastic, because the copper oxide on the carrier surface has significantly better adhesion than the conventional finishing materials compared to the plastic.
Ein weiterer Vorteil der Podeste ist die Verringerung der unterschiedlichen Höhen bei der Bondung vom Halbleiterkristall auf die Anschlußbeine und die Trägeφlattform.Another advantage of the pedestals is the reduction in the different heights when bonding the semiconductor crystal to the connection legs and the support platform.
Die Erfindung und vorteilhafte Weiterbildungen werden nun anhand der in den Figuren der Zeichnung dargestellten Ausführungsbeispiele näher erläutert:The invention and advantageous developments will now be explained in more detail with reference to the exemplary embodiments shown in the figures of the drawing:
Fig. 1 zeigt als Ausschnitt einen Querschnitt durch ein Podest,1 shows a detail of a cross section through a pedestal,
Fig. 2 zeigt in Aufsicht ein Podest mit Mehrfachbondung undFig. 2 shows in supervision a pedestal with multiple bonds and
Fig. 3 zeigt in Aufsicht eine Trägereinrichtung mit einem Chip und mehreren Podesten.
Fig. 1 zeigt als Ausschnitt schematisch einen Querschnitt durch eine Trägereinrichtung 1 mit einem Podest 2. Die Schnittlinie läuft dabei durch das Podest 2, das mittels eines Stempelwerkzeuges bei der Frame-Herstellung ausgeformt ist. Die Höhe hp des Podestes mit 120 Mikrometer ist im dargestellten Beispiel etwa 1/3 der Trägerhöhe h, die hier etwa 250 Mikrometer aufweist. Das Optimum der Podesthöhe hp im Vergleich zur Materialstärke h der Trägereinrichtung 1 liegt etwa in einem Bereich von 1/5 bis zur doppelten Materialstärke h. Im Vergleich zur derzeit üblichen Kristall- Höhe von etwa 300 Mikrometer entspricht das etwa einem Bereich von 1/10 dieser Kristallhöhe bis zu derem 1,5-fachen Wert. Damit sich das Podest zur Mehrfachbondung eignet, muß es eine ausreichende Länge und Breite haben, da für jeden Bonddurchmesser etwa 35 Mikrometer zuzüglich einem erforderlichen Bondabstand benötigt wird.3 shows a top view of a carrier device with a chip and a plurality of pedestals. 1 schematically shows a detail of a cross section through a carrier device 1 with a platform 2. The cutting line runs through the platform 2, which is formed by means of a stamping tool during the frame production. The height hp of the platform with 120 micrometers is in the example shown about 1/3 of the carrier height h, which here has about 250 micrometers. The optimum of the platform height hp compared to the material thickness h of the carrier device 1 is approximately in a range from 1/5 to twice the material thickness h. Compared to the current crystal height of approximately 300 micrometers, this corresponds to a range of 1/10 of this crystal height up to 1.5 times the value. In order for the platform to be suitable for multiple bonding, it must have a sufficient length and width, since about 35 micrometers plus a required bond spacing is required for each bond diameter.
Fig. 2 zeigt in Aufsicht ein Podest 2 mit acht Bondungen 4. Die zu den Bondungen 4 gehörenden2 shows in supervision a platform 2 with eight bonds 4. Those belonging to the bonds 4
Bonddrähte 5 bzw. 6 zeigen in entgegengesetzte Richtungen. Mit diesem Podest 2 können somit zwei unterschiedliche Chips auf der ausschnittsweise dargestellten Trägeφlattform 1 über Mehrfachbondungen mit ihr verbunden werden.Bond wires 5 and 6 point in opposite directions. With this pedestal 2, two different chips can thus be connected to it on the support platform 1 shown in sections by means of multiple bonds.
Fig. 3 zeigt schließlich in Aufsicht eine als Plattform ausgebildete Trägereinrichtung 1 mit einem einzigen Chip 7, das schematisch eine monolithisch integrierten Schaltung darstellt. Die zehn Podeste 2 bzw. 2' befinden sich am Rande der Plattform, wobei sich die Anordnung der Podeste 2, 2' an die Gegebenheiten der monolithisch integrierten Schaltung anpaßt. Die Kontaktierungen vom Chip 7 zu den Podesten 2 sind als Mehrfachbondungen ausgeführt. Wird die gleiche Trägereinrichtung 1 für verschiedene Schaltungen verwendet, dann schadet es nichts, wenn einige der Podeste 2, 2' nicht kontaktiert werden. Sie stellen im Gegenteil zusätzliche Fixpunkte dar, die im Sinne der Erfindung sogar von Vorteil sind. Das Podest 2' ist ein Beispiel für ein nicht kontaktier. es Podest. Wie bereits erwähnt ist die Verwendung von nichtkontaktierten Podesten 2' auch dort von Vorteil, wo lediglich eine Abhilfe gegen die Delarnination benötigt wird. Von den unterschiedlichsten Bondverbindungen die über die Anschlußbeine (=Leadfinger) 8, 9 oder 10 zu den Signalein- oder Signalausgängen des Chips 7 und die Trägeφlattform 1 gehen können, sind zur Verdeutlichung lediglich einige Beispiele dargestellt.
3 finally shows a top view of a carrier device 1 designed as a platform with a single chip 7, which schematically represents a monolithically integrated circuit. The ten platforms 2 and 2 'are located on the edge of the platform, the arrangement of the platforms 2, 2' being adapted to the conditions of the monolithically integrated circuit. The contacts from the chip 7 to the pedestals 2 are designed as multiple bonds. If the same carrier device 1 is used for different circuits, then it does no harm if some of the platforms 2, 2 'are not contacted. On the contrary, they represent additional fixed points that are even advantageous in the sense of the invention. The platform 2 'is an example of a non-contact. it pedestal. As already mentioned, the use of non-contacted pedestals 2 'is also advantageous where only a remedy for the delarnination is required. Of the most varied bond connections that can go via the connection legs (= lead fingers) 8, 9 or 10 to the signal inputs or signal outputs of the chip 7 and the carrier platform 1, only a few examples are shown for clarification.
Claims
1. Trägereinrichtung (1) für eine monolithisch integrierte Schaltung (7) mit als Podeste (2, 2') ausgebildeten Anschlußbereichen für Kontakte (5, 6), wobei die Podeste gegenüber einem Chip- Kontaktierungsbereich auf der Trägereinrichtung (1) erhöht sind.1. Carrier device (1) for a monolithically integrated circuit (7) with connecting areas for contacts (5, 6) designed as pedestals (2, 2 '), the pedestals being raised relative to a chip contacting area on the carrier device (1).
2. Trägereinrichtung (1) nach Anspruch 1, dadurch gekennzeichnet, daß die Podeste (2, 2') Flanken (3) mit einem Winkel (α) von mehr als 45 Grad gegenüber der Ebene der Trägereinrichtung (1) aufweisen.2. Carrier device (1) according to claim 1, characterized in that the platforms (2, 2 ') have flanks (3) with an angle (α) of more than 45 degrees with respect to the plane of the carrier device (1).
3. Trägereinrichtung (1) nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die Podeste (2, 2') jeweils eine ebene Oberfläche aufweisen, die parallel zur Ebene des Chip-Kontaktierungsbereiches ausgerichtet ist und mindestens die Aufhalimefläche für einen einzigen Kontakt (5, 6) aufweist.3. Carrier device (1) according to claim 1 or 2, characterized in that the platforms (2, 2 ') each have a flat surface which is aligned parallel to the plane of the chip contacting area and at least the Aufhalimefläche for a single contact (5th , 6).
4. Trägereinrichtung (1) nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß die Höhe (hp) der Podeste (2, 2') zwischen einem 1/10 der Kristall-Höhe und dem 1,5-fachen der Kristall- Höhe liegt.4. Carrier device (1) according to one of claims 1 to 3, characterized in that the height (hp) of the pedestals (2, 2 ') between 1/10 of the crystal height and 1.5 times the crystal Height.
5. Trägereinrichtung (1) nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß die Höhe (hp) der Podeste (2, 2') im Bereich von 1/5 bis zur doppelten Materialstärke (h) der5. Carrier device (1) according to one of claims 1 to 3, characterized in that the height (hp) of the pedestals (2, 2 ') in the range of 1/5 to twice the material thickness (h)
Trägereinrichtung (1) liegt.Carrier device (1).
6. Trägereinrichtung (1) nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß die Podeste (2, 2') eine mittels eines Stempels oder einer Abbiegevorrichtung gebildete lokale Verformung der Trägereinrichtung (1) darstellen.6. Carrier device (1) according to one of claims 1 to 5, characterized in that the platforms (2, 2 ') represent a local deformation of the carrier device (1) formed by means of a stamp or a bending device.
7. Trägereinrichtung (1) nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß die Podeste (2, 2') mittels eines Materialauftrags auf die Trägereinrichtung (1) gebildet sind.7. carrier device (1) according to one of claims 1 to 5, characterized in that the platforms (2, 2 ') are formed by means of a material application to the carrier device (1).
8. Trägereinrichtung (1) nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, daß die8. carrier device (1) according to one of claims 1 to 7, characterized in that the
Trägereinrichtung (1) nur im Bereich der Podeste (2, 2') eine für die Bondbarkeit vorgesehene Veredelung, insbesondere Silber oder Gold, aufweist. Carrier device (1) only in the area of the platforms (2, 2 ') has a finish intended for bondability, in particular silver or gold.
9. Trägereinrichtui g (1) nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet daß auf der Trägereinrichtung (1) mindestens ein nichtkontaktiertes Podest (2') vorhanden ist.9. Trägereinrichtui g (1) according to one of claims 1 to 8, characterized in that on the carrier device (1) at least one non-contacted pedestal (2 ') is present.
10. Trägereinrichtung (1) nach Anspruch 9, dadurch gekennzeichnet, daß die Trägereinrichtung (1) nur nichtkontaktierte Podeste (2') enthält, die insbesondere als Fixpunkte gegenüber einer Delarninierung dienen. 10. Carrier device (1) according to claim 9, characterized in that the carrier device (1) contains only non-contacted pedestals (2 '), which serve in particular as fixed points against a delamination.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10247075A DE10247075A1 (en) | 2002-10-09 | 2002-10-09 | Mounting device for monolithic integrated circuits for use in motor vehicles which are subject to wide fluctuations in operating temperature have platform raised above substrate for connection area for bondable contacts |
DE10247075 | 2002-10-09 | ||
PCT/EP2003/011006 WO2004036646A1 (en) | 2002-10-09 | 2003-10-06 | Support device for monolithically integrated circuits |
Publications (1)
Publication Number | Publication Date |
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EP1552558A1 true EP1552558A1 (en) | 2005-07-13 |
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ID=32038391
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EP03775171A Withdrawn EP1552558A1 (en) | 2002-10-09 | 2003-10-06 | Support device for monolithically integrated circuits |
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US (1) | US20060151772A1 (en) |
EP (1) | EP1552558A1 (en) |
JP (1) | JP4550580B2 (en) |
KR (1) | KR101003061B1 (en) |
DE (1) | DE10247075A1 (en) |
WO (1) | WO2004036646A1 (en) |
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US7602050B2 (en) * | 2005-07-18 | 2009-10-13 | Qualcomm Incorporated | Integrated circuit packaging |
JP2010073830A (en) * | 2008-09-17 | 2010-04-02 | Sumitomo Metal Mining Co Ltd | Lead frame and method of manufacturing same |
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JPS647626A (en) * | 1987-06-30 | 1989-01-11 | Nec Corp | Semiconductor device |
JPH02285665A (en) * | 1989-04-26 | 1990-11-22 | Nec Corp | Lead frame |
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JPS59104148A (en) * | 1982-12-06 | 1984-06-15 | Nec Corp | Semiconductor device |
JPS63202948A (en) * | 1987-02-18 | 1988-08-22 | Mitsubishi Electric Corp | Lead frame |
JPH04107961A (en) * | 1990-08-29 | 1992-04-09 | Sumitomo Metal Mining Co Ltd | Multilayer lead frame |
JPH04280664A (en) * | 1990-10-18 | 1992-10-06 | Texas Instr Inc <Ti> | Lead fram for semiconductor device |
IT1252197B (en) * | 1991-12-12 | 1995-06-05 | Sgs Thomson Microelectronics | INTEGRATED CIRCUIT PROTECTION DEVICE ASSOCIATED WITH RELATED SUPPORTS. |
JPH0621132A (en) * | 1992-07-06 | 1994-01-28 | Seiko Epson Corp | Semiconductor device and manufacture thereof |
US5365409A (en) * | 1993-02-20 | 1994-11-15 | Vlsi Technology, Inc. | Integrated circuit package design having an intermediate die-attach substrate bonded to a leadframe |
JPH0778926A (en) * | 1993-09-07 | 1995-03-20 | Nec Kyushu Ltd | Resin-sealed semiconductor device |
US5859387A (en) * | 1996-11-29 | 1999-01-12 | Allegro Microsystems, Inc. | Semiconductor device leadframe die attach pad having a raised bond pad |
JPH10247701A (en) * | 1997-03-05 | 1998-09-14 | Hitachi Ltd | Semiconductor device and lead frame for manufacturing the same |
JPH11163024A (en) * | 1997-11-28 | 1999-06-18 | Sumitomo Metal Mining Co Ltd | Semiconductor device and lead frame for assembling the same, and manufacture of the device |
US6365976B1 (en) * | 1999-02-25 | 2002-04-02 | Texas Instruments Incorporated | Integrated circuit device with depressions for receiving solder balls and method of fabrication |
WO2001009953A1 (en) * | 1999-07-30 | 2001-02-08 | Amkor Technology, Inc. | Lead frame with downset die pad |
JP2002076228A (en) * | 2000-09-04 | 2002-03-15 | Dainippon Printing Co Ltd | Resin-sealed semiconductor device |
-
2002
- 2002-10-09 DE DE10247075A patent/DE10247075A1/en not_active Withdrawn
-
2003
- 2003-10-06 US US10/531,141 patent/US20060151772A1/en not_active Abandoned
- 2003-10-06 KR KR1020057006068A patent/KR101003061B1/en active IP Right Grant
- 2003-10-06 WO PCT/EP2003/011006 patent/WO2004036646A1/en active Application Filing
- 2003-10-06 EP EP03775171A patent/EP1552558A1/en not_active Withdrawn
- 2003-10-06 JP JP2004544075A patent/JP4550580B2/en not_active Expired - Lifetime
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JPS647626A (en) * | 1987-06-30 | 1989-01-11 | Nec Corp | Semiconductor device |
JPH02285665A (en) * | 1989-04-26 | 1990-11-22 | Nec Corp | Lead frame |
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KR20050053747A (en) | 2005-06-08 |
KR101003061B1 (en) | 2010-12-22 |
DE10247075A1 (en) | 2004-04-22 |
JP2006503427A (en) | 2006-01-26 |
US20060151772A1 (en) | 2006-07-13 |
WO2004036646A1 (en) | 2004-04-29 |
JP4550580B2 (en) | 2010-09-22 |
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