EP1527012A2 - Procede pour fa onner au moins une petite ouverture dans une couche d'un substrat et elements de construction fabriques selon ce procede - Google Patents

Procede pour fa onner au moins une petite ouverture dans une couche d'un substrat et elements de construction fabriques selon ce procede

Info

Publication number
EP1527012A2
EP1527012A2 EP03783954A EP03783954A EP1527012A2 EP 1527012 A2 EP1527012 A2 EP 1527012A2 EP 03783954 A EP03783954 A EP 03783954A EP 03783954 A EP03783954 A EP 03783954A EP 1527012 A2 EP1527012 A2 EP 1527012A2
Authority
EP
European Patent Office
Prior art keywords
substrate
layer
etching
opening
openings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03783954A
Other languages
German (de)
English (en)
Inventor
Egbert ÖSTERSCHULZE
Rainer Kassing
Georgi Georgiev
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universitaet Kassel
Original Assignee
Universitaet Kassel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Universitaet Kassel filed Critical Universitaet Kassel
Publication of EP1527012A2 publication Critical patent/EP1527012A2/fr
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01Q—SCANNING-PROBE TECHNIQUES OR APPARATUS; APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBE MICROSCOPY [SPM]
    • G01Q70/00—General aspects of SPM probes, their manufacture or their related instrumentation, insofar as they are not specially adapted to a single SPM technique covered by group G01Q60/00
    • G01Q70/16—Probe manufacture
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00087—Holes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01Q—SCANNING-PROBE TECHNIQUES OR APPARATUS; APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBE MICROSCOPY [SPM]
    • G01Q40/00—Calibration, e.g. of probes
    • G01Q40/02—Calibration standards and methods of fabrication thereof
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01Q—SCANNING-PROBE TECHNIQUES OR APPARATUS; APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBE MICROSCOPY [SPM]
    • G01Q60/00—Particular types of SPM [Scanning Probe Microscopy] or microscopes; Essential components thereof
    • G01Q60/18—SNOM [Scanning Near-Field Optical Microscopy] or apparatus therefor, e.g. SNOM probes
    • G01Q60/22—Probes, their manufacture, or their related instrumentation, e.g. holders
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/04—Optical MEMS
    • B81B2201/047—Optical MEMS not provided for in B81B2201/042 - B81B2201/045
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0128—Processes for removing material
    • B81C2201/013—Etching
    • B81C2201/0132—Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness

Definitions

  • the invention relates to a method for producing at least one small opening in a layer on a substrate, in particular a semiconductor substrate, the substrate being provided on the upper side with at least one tapered depression having a tip section and side walls, the upper side of the substrate at least in the region of the Indentation is covered with a layer of an etchable material and the opening is then produced in the region of the tip section by etching the layer.
  • the openings of interest in the context of the present invention are in particular punctiform or linear openings (apertures) which have diameters or widths in the nanometer range.
  • the achievable resolution is limited here by the geometry and dimensions of the probe, in particular the probe opening, and the distance from the probe to the surface.
  • openings with such dimensions can also, for. B. with particle filters, sieves, permeable membranes, optical spatial filters, ultra-small contacts and layered components and numerous other devices can be used advantageously, for. B. in certain for the production of semiconductor devices etching masks.
  • a silicon substrate is assumed which is provided on its upper side with tapered depressions and a thermally applied silicon dioxide layer.
  • the fact that the silicon dioxide layer has inhomogeneities in the region of the tips of the depressions is exploited for the production of the openings and can be exposed from the back by selective etching of the substrate and then selectively opened by a further etching step.
  • a resulting disadvantage is that the exposed tips having the openings project beyond the underside of the substrate and are therefore unsuitable for applications which essentially require plane-parallel substrates.
  • only opening widths or opening diameters of approximately 150 nm to 200 nm and more have been achievable with this method and only with specific material systems such as B. silicon substrates applicable, which have thermally produced silicon dioxide layers.
  • the invention is based on the technical problem of creating a method of the type described in the introduction with which reproducibly small openings with diameters or widths of approximately 100 nm or less can also be produced in plane-parallel substrates and which can also be used with different material systems ,
  • the method of the type described at the outset is characterized according to the invention in that the opening is produced from the top by means of an anisotropic plasma etching process which is matched to the material of the layer, by selective opening of the layer by the material, the etching gases and the etching parameters are selected so that there is a larger etching rate in the region of the tip section of the depression than on the side walls of the depression.
  • a calibration standard for scanning probe microscopy and a bending beam are also proposed, both of which are provided with openings produced by the method according to the invention.
  • the bending beam is particularly suitable for the production of a micromechanical sensor.
  • the invention is based on the knowledge that, in the case of numerous coatings for substrates of the type of interest here, a pronounced etching rate angular distribution results when the layers are subjected to a plasma etching process from the top.
  • This etching rate angle distribution can not only be a result of the selected coating, but can also be formed locally, for example by B. in the etching process, passivating layers are deposited less strongly on surfaces perpendicular to the plasma than on obliquely standing surfaces. The layer thicknesses of these deposits can depend on the orientation of the surfaces.
  • the electrical potential distribution in the plasma etching process can have the effect that a different etching rate in the region of the tip section than in the region of the Side walls is obtained.
  • etching rate angular distribution All these and other effects and causes for different etching rates are summarized in the context of the present invention under the name "etching rate angular distribution".
  • the invention therefore provides to cover the top of a structured substrate with a layer of suitable composition, morphology and thickness and then to subject it with suitable etching gases and parameters (in particular pressure, temperature etc.) to a plasma etching process which takes advantage of the respective etching rate angle distribution leads to significantly lower etching rates in the area of the side walls than in the area of the tip sections of the depressions. So far, openings with diameters or widths of approximately 90 nm have been obtained.
  • Fig. La to lf schematically different process steps in the application of a first embodiment of the method according to the invention using plan views of a substrate (Fig. La, le) and cross sections through the substrate (Fig. Lb to Id and if);
  • FIG. 2 and 3 are schematic vertical sections through devices for carrying out etching steps when using the method according to FIG. 1;
  • 4a and 4b each show an image of a substrate cross section produced with a scanning electron milcroscope before and after the production of an opening in a layer applied to the substrate when using the method according to FIG. 1;
  • 5a to 5c are images corresponding to FIGS. 4a and 4b, but after deep etching of the substrate using the layer containing the openings as an etching mask on different scales; 6 shows an image obtained with a scanning electron microscope analogous to FIGS. 4 and 5, but with an additional etching edge obtained during deep etching;
  • FIG. 8a and 8b plan views obtained with a scanning electron microscope on a structured substrate provided with an etchable layer before and after the formation of an opening;
  • FIGS. 12a, 12b in views corresponding to FIGS. La to lf show two further exemplary embodiments of the method according to the invention:
  • FIGS. 1 a and 1 b A first exemplary embodiment of the method according to the invention is shown schematically in FIGS.
  • a substrate 1 is structured.
  • the substrate 1 is here in the form of a thin, essentially plane-parallel, single-crystalline silicon wafer which has an upper side 2 oriented as a (001) crystal surface and an underside 3.
  • the structuring produced on the top 2 in the first method step contains at least one tapered depression 6, which has a tip section 4 (apex) and two side walls 5.
  • the depression 6 is produced in that the top 2 is initially masked in a manner known per se is provided, which has a rectangular opening, and then anisotropically etched through this masking opening, for example with an aqueous potassium hydroxide solution (KOH). During this etching process, the side walls 5 are given a (111) orientation, and a depression 6 is formed in the form of a straight, V-shaped one Trench with an opening angle between the side walls 5 of approximately 70.5 °. According to FIGS. 1 a and 1 b, the depression 6 extends over the entire length, but preferably only over part of the width of the substrate 1. B. from a previously applied silicon dioxide (SiO 2 -) or silicon nitride (SiN x -) layer.
  • SiO 2 - silicon dioxide
  • SiN x - silicon nitride
  • the SiO 2 layer 7 can be provided with characteristic inhomogeneities in the region of the convex or concave edges of the trench structure (for example DE 199 26 601 AI) by using oxidation temperatures between approximately 800 ° C.
  • the shape of the recess 6 according to FIGS. 1a and 1b is essentially retained in the coating process described, so that corresponding V-shaped side walls 8 and a tip section 9 are formed on the top of the layer 7.
  • the masking layer used in the previous method step can be removed before the SiO 2 layer 7 is applied, but can also be left to stand.
  • the substrate 1 is now treated from its upper side 2 with a suitable plasma etching process in order to provide the layer 7 in the region of the tip section 9 with a continuous opening 10 (FIGS. 1d and 1e).
  • the plasma etching process is carried out with the aid of a known, capacitively coupled parallel plate reactor, shown schematically in FIG. 2, which has a housing 11 with an upper electrode 12 and a lower electrode 14, on which the substrate 1 is placed becomes.
  • Argon (Ar) with 5 sccm and trifluoromethane (CHF 3 ) with 4.5 sccm are fed to the gas inlet 15.
  • a pressure of approximately 75 mTorr is maintained in the housing 11 via the gas outlet.
  • the plasma 18 which arises during operation of the device according to FIG. 2 leads to a direct bias of the substrate 1 of 250 V.
  • the etching time is 7 min with a thickness of the SiO 2 layer 7 of 300 nm. This results in a slit-shaped opening 10 in the region of the tip section 9 of the layer 7 (FIG. 1c) (up to the tip section 4 of the substrate 1). Fig. Ld and le) with a substantially constant width b (Fig. Le) of approximately 90 nm over the entire length of the recess 6.
  • the SiO 2 layer 7 provided with it is used as an etching mask in a subsequent deep etching step, which serves the purpose of continuing and closing the opening 10 formed in the SiO 2 layer 7 through the substrate 1 extend.
  • a groove-shaped gap or channel 19 in the substrate 1 that is open toward the opening 10 and that has essentially the same width as the opening 10 is obtained.
  • Deep etching is carried out, for example, using an inductively coupled plasma etching device suitable for deep etching of silicon, which is shown schematically in FIG. 3. It contains a housing 20 with a vertically arranged quartz tube 21, which is closed at its upper end, but has a gas inlet 22. The quartz tube 21 is also wrapped with a water-cooled HF winding 23. The lower, open end of the quartz tube 21 is directed towards an electrode 24 on which the substrate 1 to be treated rests. The space enclosed by the quartz tube 21 and the space surrounding the substrate 1 are connected to a high-performance pump via a gas outlet 25 connected. The electrode 24 is also assigned a cooling device (not shown in more detail) in order to keep the substrate 1 at a temperature of, for example, 10 ° C. when the device is operating.
  • a cooling device not shown in more detail
  • argon with approximately 24 sccm, sulfur hexafluoride (SF 6 ) with approximately 18 sccm and oxygen (O 2 ) with approximately 30 sccm are fed in to carry out the etching steps.
  • a pressure of 10 mTorr is set in the housing 21 via the gas outlet 25.
  • the winding 23 is operated at a frequency of 13.56 MHz at 600 W, a direct bias of 127 V being set or being established by the plasma formed.
  • the substrate temperature is kept at 10 ° C. The etching times are approx. 2 minutes.
  • a largely anisotropic deep etching can also be obtained by using a deep etching method known per se, in which successive etching and polymerization steps are carried out alternately.
  • the etching steps serve for section-wise etching of zones of the substrate 1 lying below the opening 10.
  • a polymer is applied to the lateral boundaries of the structure formed in the substrate 1 defined by the opening 10, in order to thereby undercut, as is the case with isotropic Etching would occur to a large extent to avoid.
  • This also results in the method step (FIGS. Le, lf) of the groove-shaped gap or channel 19 in the substrate 1 which is open towards the opening and has essentially the same width as the opening 10.
  • argon with approximately 17.1 sccm, sulfur hexafluoride (SF 6 ) with approximately 35 sccm and oxygen (O 2 ) with approximately 5 sccm are supplied.
  • the winding 23 is operated at a frequency of 13.56 MHz at 550 W, with a DC bias of 96 V being established by the plasma formed.
  • the etching times are approx. 18 s.
  • the other parameters are the same as in the first example.
  • Deep etchings of this type are e.g. B. from German Patent DE 42 41 045 Cl known, which is hereby made to avoid further explanations by reference to them the subject of the present disclosure.
  • the openings 10 or channels 19 obtained with the described method are shown in FIGS. 4, 5 and 6 on the basis of scanning electron microscope images.
  • FIG. 4a shows the opening 10 already formed with a width of 90 nm.
  • FIG. 5 shows, on different scales, two groove-shaped channels 27 produced by the deep-etching step.
  • the SiO 2 layer 7 was in each case completely removed before the scanning electron microscope images were taken, so that only the depression 6 in the substrate 1 is visible. 5c, a channel width of only about 200 nm is obtained even with a considerable channel depth of, for example, 1.5 ⁇ m.
  • FIG. 6 shows that the deep etching step also allows steep steps 28 to be obtained in the silicon substrate 1, which pass along the longitudinal sharp edges 29 into the side walls 5, 8 of the substrate 1 or into the SiO 2 layer 7.
  • the layer 7 located on the upper side of the substrate 1 is also removed by etching, since the etching rate here is similar due to the same orientation Size as the etching rate on the apex.
  • the steps 28 are therefore formed on the sides of the substrate 1.
  • stages 28 can be used to form etching troughs in the silicon wafer and thus, for example, in semiconductor technology for producing three-dimensional field-effect transistors. If steps 28 of this type are to be avoided or are to be formed only at preselected locations, the top of the SiO 2 layer 7 outside the trench structure and before the opening 10 is made must be covered in whole or in part with suitable masks which rule out an etching attack on the silicon substrate 1.
  • the exemplary embodiment according to FIGS. 7 and 8 differs from that according to FIGS. 1 to 6 only in the different shape of the opening and the structures thus produced in the substrate 1.
  • the substrate 1 is initially pointed at its top tapered depression, and then coated with a SiO 2 layer 7, which has a corresponding depression 30 with a tip portion 31 and is delimited by side walls 32 (Fig. 7b).
  • the depression 30 has the shape of an inverse pyramid standing on the tip 31 with a square base, as can be seen from the top view in FIG. 7a.
  • the surface of the silicon substrate 1 is a (001) crystal surface, then all four side walls 32 are oriented after the first etching step (111) has been carried out. Instead of only two sides, the structure produced is therefore limited on four sides.
  • FIG. 7c An opening 33 (FIG. 7c) is formed in the tip section 31 of the depression 30 in the same way as described above with reference to FIG. 1, which completely penetrates the layer 7 or its tip section 31. 7d, the cross section of this opening 33 is essentially square with an edge length of approximately 150 nm. If the SiO 2 layer 7 having the opening 33 is therefore used analogously to FIG. 1 as an etching mask for a final deep etching process, then only a shaft-like pit 34 with a cross section substantially corresponding to the cross section of the opening 33 is formed in the underlying substrate 1 according to FIG. 7e.
  • FIG. 8 shows images of substrates treated according to FIG. 7 made with a scanning electron microscope. In particular, FIG.
  • 8a shows a top view of the thermally applied SiO 2 layer 7 with its depression 30 (FIGS. 7a and 7b), the central tip section 31, the side walls 32 and cut lines 35 appearing shaded by them being recognizable which the side walls 32 adjoin in pairs.
  • 8b shows an illustration in which the SiO 2 layer 7 has already been treated with the aid of the etching step described with reference to FIG. 1, which is anisotropic because of the existing etching rate angle distribution and therefore leads to the opening 34 in the apex region.
  • FIG. 9. 1 and 7 A third embodiment of the invention, which is currently felt to be the best, is shown in FIG. 9. 1 and 7, a silicon substrate 41 is provided on its (001) upper side with a plurality of, for example, matrix-shaped depressions which, depending on requirements, are pyramids or apex trenches which, however, deviate from FIG. 1 are closed at their longitudinal ends by side walls.
  • the silicon substrate 41 was thermally coated with a thin SiO 2 layer 42 (FIG. 9b), so that depressions 43, 44 and 45 covered with SiO 2 and described on the top of the substrate 41 with reference to FIGS. 1 and 7 are available, which have square or rectangular contours depending on the desired structure.
  • the depressions or trenches 44, 45 provided with rectangular cross sections can be arranged with longitudinal axes perpendicular to one another, as clearly shown in FIG. 9a.
  • the side walls (for example 46 in FIG. 9a) which form at the longitudinal ends of the depressions 44, 45 lie, depending on the case, parallel to (111) surfaces of the substrate 41 or not.
  • the upper side of the substrate is subjected to a plasma etching step analogous to FIG. 1b, so that an opening 47 is formed in the tip sections of all the depressions 43, 44 and 45 present, all openings 47 can be generated with the same etching step.
  • the SiO 2 layer 42 produced in this way and provided with the openings 47 is provided in a subsequent deep-etching step with shaft-like pits or channels 48 (FIG. 9d), the 1 to 7 described procedure is applied analogously and therefore analog results are achieved.
  • the substrate 41 is provided with flat upper and lower sides 49, 50 (FIG. 9e), by plasma etching or the like, if appropriate after prior removal of the SiO 2 layer 42 with KOH. z. B. be polished with a chemical mechanical process.
  • the surfaces thus obtained are smooth (flat) and have essentially identical structures.
  • This method step can be carried out regardless of whether the substrate 41 is provided with deep-etching pits or groove-like channels 48 which have closed bottoms 51 (FIG. 9e) or whether the substrate 41 has column-like passages or Slits or gaps 52 are provided which completely penetrate the substrate 41 (Fig. Lf).
  • a particular advantage of the exemplary embodiment according to FIG. 9 is that because of the described etching rate angular distribution, all openings 47 formed in the same substrate 41 and pits / channels 48 or passages / slots 52 produced therewith essentially the same widths b in the nanometer range (Fig. 9d) and are reproducible with small fluctuations in width.
  • the substrate 41 according to FIG. 9f can be used excellently as a calibration standard since, in contrast to known devices (DE 199 26 601 AI), it can be easily provided with flat, smooth upper and lower sides.
  • the principle of such a calibration standard is to provide hole-like or line-like structures with reproducible geometries and an optically opaque but as small as possible substrate.
  • the planarity of the surface must be required so that no topography-related artifacts are obtained in the near-field optical imaging (APL).
  • APL near-field optical imaging
  • FIG. 10a is a substrate 54 with a typical thickness variation TTV (total thickness variation) of approx. 1 to 10 ⁇ m and a plurality of openings 55 in a thermally applied SiO 2 - Layer 56 shown.
  • TTV total thickness variation
  • FIG. 10b an end product according to FIG. 10b would be obtained in which not all openings 56 were exposed at the same time are. Rather, for example, the opening 55a in the middle of FIG. 10b is just exposed, while the left opening 55b is exposed, but forms an undesired tip contour.
  • the opening 55c on the right is finally buried in the substrate 54 and can therefore only be exposed with the aid of a significantly longer etching time compared to the opening 55b, which can result in opening cross sections of different sizes.
  • an end product according to FIG. 10c with passages or slots 58 is obtained, which not only have essentially the same geometries and sizes, but also have no further structures in addition to the passages or slots 58.
  • the substrate 41 according to FIG. 9f is particularly well suited as a calibration standard.
  • it is also advantageous that in FIG. 10c the structures do not protrude differently from the underside of the substrate 54, which would not be acceptable for use as a calibration standard.
  • the opening sizes are largely independent of a thickness variation of the substrate and / or the applied layer 56.
  • a structured substrate which could also consist of a layer system containing several layers, is covered on at least one broad side and at least in the area of the structures with a layer which consists of a suitable, ie a usable etching rate - Angular distribution material or a material composition and is applied in a suitable thickness
  • the word "layer” also includes layer systems which are composed of several individual layers and / or material compositions.
  • the invention assumes that a suitable plasma etching method, in particular a reactive ion etching method, is used to produce the openings 10, 33, in which chemical and physical etching mechanisms are combined.
  • a suitable plasma etching method in particular a reactive ion etching method
  • suitable plasma etching parameters pressure, temperature, coupled power, frequency of the generator, bias voltage, etc.
  • the respective proportion can be strengthened or weakened.
  • the achievable etching rate of the masking layer depends in particular on the orientation of the surface structures and can be adapted by varying the plasma etching parameters mentioned above. It can thus be achieved by adapting the plasma etching process or by varying the surface structure that the etching rate for the masking layer on the side walls (for example 8 in FIG.
  • the apex area according to the invention is selected to be tapered, which also includes depressions in the form of a cone standing on the tip or the like, the openings obtained (for example 10 in FIG. 1) are extremely small and easily reproducible. It is also advantageous that the openings 10, 33, 47 of a large structure (for example Fig. La, Fig. 7a, Fig. 9b) are positively guided, ie self-adjusting at the tapered bottom (line or point) of the respective structure, whereby also the production of arcuate openings would be conceivable.
  • the openings 10, 33, 47 are still produced in the presence of the substrate 1, 41 and the layer 7, 42 therefore with the already existing openings 10, 33, 47 for defining smaller structures in the substrate 1, 41 can be used.
  • pits 34 or slots 52 described, e.g. a further functional layer can be applied to the uppermost layer in order to make extremely small contact with the substrate or with a layer in the layer system that has not yet been etched through through the opening or the deeper etched structure.
  • additional material for reducing the channel, slot or pit cross section could be introduced through a wide variety of deposition processes.
  • this is advantageously done by thermal oxidation, since when a silicon atom is oxidized to form the silicon dioxide molecule, its volume increases by a factor of 2.25 and the clear cross section of the opening can thus be reduced or completely closed. This generally enables the implementation of optical waveguides and other structures in the depth of the silicon structure.
  • FIG. 11a to 1le show such a possibility, starting from the state reached in FIG. 9d.
  • a layer 59 is applied, which also partially fills the pits or channels 52.
  • the substrate 41 is at least partially removed from its rear side by etching (FIG. 1 ld), and in the last step the part of the layer 59 located at the bottom of the pit or the channel 48 is then etched from the rear side, opened (Fig. lle), whereby on the underside of the remaining structure a pipe socket-like approach 60 with an extreme small diameter remains.
  • any other layer e.g. a semiconductor layer, metal layer (in particular aluminum), dielectric layer or superconducting layer, furthermore a conductive or non-conductive polymer layer or a layer system composed of a combination of these layers.
  • the invention also particularly advantageously relates to the use of an opening, which is characterized in that the layer material is integrated with the opening, in particular in the front part of a bending beam clamped on one side, in particular a so-called cantilever (for example US 5 116 462 A, US 5 399 232 A).
  • An advantageous embodiment of the use consists in the fact that a single bending beam or a plurality of bending beams are used as sensor elements in a matrix arrangement, in particular in scanning probe microscopy.
  • the deposition of a thin, optically less transparent layer allows the bending beam or beams to be used for simultaneous atomic force microscopy (AFM, SFM) and optical scanning near-field microscopy (SNOM), with the opening being illuminated by the surface of the layer from the opening can be used as a miniaturized source (Illumination mode) or through the opening itself the light output is recorded by an illuminated sample (collection mode).
  • AFM atomic force microscopy
  • SFM simultaneous atomic force microscopy
  • SNOM optical scanning near-field microscopy
  • a further advantageous embodiment consists in the fact that a matrix-like arrangement of one or more openings on flat substrates or on structured surfaces (eg cantilevers) is used for metering and / or injecting exact, very small amounts of liquid or gas.
  • FIG. 12 An example of such a structure is shown in FIG. 12.
  • first one Structure 61 is produced with a tip section 31 having an opening 33, which is arranged at one end of a bending beam 62, which can be clamped into a holder or the like at the other end in accordance with the customary cantilever construction (FIG. 12a).
  • the thickness of the bending beam can be reduced to the desired extent and the tip section 31 can be exposed analogously to FIG.
  • the exemplary embodiment according to FIG. 11 enables a large number of further applications.
  • the pits or channels 48 52 produced by etching are wholly or partly extended through the substrate 41 and then coated with a transparent and / or dielectric material such as. B. SiO 2 , a polymer.
  • a transparent and / or dielectric material such as. B. SiO 2 , a polymer.
  • optical waveguide structures usable analogous to optical fiber cables are obtained, which enable optical and optoelectronic components to be connected in the dimension perpendicular to the substrate.
  • the channels can also be filled with conductive materials (metals, conductive polymers, semiconducting materials, etc.) in order to produce vias. If these are only partially filled, hollow waveguides result which are interesting for electrical and optical applications. Finally, a combination of these materials is also conceivable. If the trenches or channels are coated with conductive material and then with a dielectric material and then the remaining volumes are filled with conductive material, a coaxial line is obtained which is well known in electrical engineering and which is of particular interest for high-frequency applications. The invention thus in particular also enables the creation of components which are suitable for the electronic and / or optical transmission of signals.
  • conductive materials metal, conductive polymers, semiconducting materials, etc.
  • the method according to the invention can also be applied to depressions which have a V-shaped trench with a plateau-shaped bottom or are designed in the manner of an inverse truncated pyramid, for example, instead of depressions which end in an ideal tip, for example by the one carried out for producing the structures Etching process is stopped before reaching the actual tip.
  • the term "tapering" used above and in the claims is intended to include such plateaus.
  • tip structures with extremely small openings on their apex can be obtained in very thin layers 7, 42. If larger openings are desired, the openings obtained can be enlarged in a targeted manner either before or after the removal of the substrate by a further etching process.
  • This method therefore enables miniaturized openings of a defined size to be produced on the entire substrate.
  • the trench or pyramid-shaped structures can also be produced by methods other than those described, for example with the aid of chemical or electrochemical etching processes, ion beam etching processes or also by mechanical indentation.
  • z. B. NaOH, LiOH or the like. Or organic solutions can be used.

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  • Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
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  • Manufacturing & Machinery (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Nanotechnology (AREA)
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Abstract

L'invention concerne un procédé pour façonner au moins une petite ouverture (10) dans une couche d'un substrat (1), notamment dans un substrat semi-conducteur. La face supérieure (2) du substrat (1) est pourvue d'au moins un évidement (6) allongé et pointu comportant une partie pointue (4) et des côtés (5) et cette face supérieure (2) du substrat (1) comprend, au moins dans la zone de l'évidement (6), une couche (7) de matière pouvant être gravée. Selon l'invention, l'ouverture (10) est façonnée selon un procédé de gravure anisotrope par plasma adapté à la matière de la couche (7), à partir de la face supérieure (2) et par ouverture sélective de ladite couche (7). La matière, les gaz de gravure et les paramètres de gravure sont sélectionnés de manière à ce que la gravure soit plus profonde dans la zone d'une partie de la pointe (9) de la couche (7) recouvrant la partie de la pointe (4) du substrat (1) que dans la zone des côtés (8) de la couche (7) recouvrant les côtés (5) du substrat (1). La présente invention porte également sur des étalons de calibrage, des barres de flexion et d'autres éléments de construction fabriqués selon ledit procédé.
EP03783954A 2002-08-05 2003-08-04 Procede pour fa onner au moins une petite ouverture dans une couche d'un substrat et elements de construction fabriques selon ce procede Withdrawn EP1527012A2 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10236150 2002-08-05
DE10236150A DE10236150A1 (de) 2002-08-05 2002-08-05 Verfahren zur Herstellung wenigstens einer kleinen Öffnung in einer Schicht auf einem Substrat und damit hergestellte Bauelemente
PCT/DE2003/002626 WO2004014785A2 (fr) 2002-08-05 2003-08-04 Procede pour façonner au moins une petite ouverture dans une couche d'un substrat et elements de construction fabriques selon ce procede

Publications (1)

Publication Number Publication Date
EP1527012A2 true EP1527012A2 (fr) 2005-05-04

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EP03783954A Withdrawn EP1527012A2 (fr) 2002-08-05 2003-08-04 Procede pour fa onner au moins une petite ouverture dans une couche d'un substrat et elements de construction fabriques selon ce procede

Country Status (5)

Country Link
US (1) US20060165957A1 (fr)
EP (1) EP1527012A2 (fr)
JP (1) JP2005535137A (fr)
DE (1) DE10236150A1 (fr)
WO (1) WO2004014785A2 (fr)

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RU2540000C1 (ru) * 2013-10-01 2015-01-27 Федеральное государственное бюджетное учреждение науки Институт физики полупроводников им. А.В. Ржанова Сибирского отделения Российской академии наук (ИФП СО РАН) Способ изготовления ступенчатого высотного калибровочного стандарта для профилометрии и сканирующей зондовой микроскопии
US9975761B2 (en) 2016-02-25 2018-05-22 Smarttip Bv Method of manufacturing a plurality of through-holes in a layer of first material
EP3210935B1 (fr) 2016-02-25 2023-09-13 Cytosurge AG Procédé de fabrication d'une pluralité de trous traversants dans une couche de matériau
RU2649058C1 (ru) * 2017-02-15 2018-03-29 Федеральное государственное бюджетное учреждение науки Институт физики полупроводников им. А.В. Ржанова Сибирского отделения Российской академии наук (ИФП СО РАН) Способ изготовления ступенчатого высотного калибровочного эталона и ступенчатый высотный калибровочный эталон
NL2026730B1 (en) 2020-10-22 2022-06-16 Cytosurge Ag A method of manufacturing a MEMS device

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US501893A (en) * 1893-07-18 Eraser-holder
US5221415A (en) * 1989-01-17 1993-06-22 Board Of Trustees Of The Leland Stanford Junior University Method of forming microfabricated cantilever stylus with integrated pyramidal tip
EP0413041B1 (fr) * 1989-08-16 1992-07-15 International Business Machines Corporation Méthode de production de détecteurs micromécaniques pour la profilométrie AFM/STM et tête micromécanique détectrice AFM/STM
JP3053456B2 (ja) * 1990-08-31 2000-06-19 オリンパス光学工業株式会社 走査型プローブ顕微鏡用カンチレバー及びその作製方法
DE4241045C1 (de) * 1992-12-05 1994-05-26 Bosch Gmbh Robert Verfahren zum anisotropen Ätzen von Silicium
US5770465A (en) * 1995-06-23 1998-06-23 Cornell Research Foundation, Inc. Trench-filling etch-masking microfabrication technique
JP3697034B2 (ja) * 1997-08-26 2005-09-21 キヤノン株式会社 微小開口を有する突起の製造方法、及びそれらによるプローブまたはマルチプローブ
EP1113980B1 (fr) * 1998-09-12 2018-11-07 WITec Wissenschaftliche Instrumente und Technologie GmbH Ouverture pratiquee dans un materiau semi-conducteur et realisation de cette ouverture et son utilisation

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Title
See references of WO2004014785A2 *

Also Published As

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WO2004014785A2 (fr) 2004-02-19
JP2005535137A (ja) 2005-11-17
DE10236150A1 (de) 2004-02-26
US20060165957A1 (en) 2006-07-27
WO2004014785A3 (fr) 2005-02-10

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