EP1516240A1 - Procede et unite puce pour faire reagir ou activer un participant a un bus de donnees serie - Google Patents

Procede et unite puce pour faire reagir ou activer un participant a un bus de donnees serie

Info

Publication number
EP1516240A1
EP1516240A1 EP03732771A EP03732771A EP1516240A1 EP 1516240 A1 EP1516240 A1 EP 1516240A1 EP 03732771 A EP03732771 A EP 03732771A EP 03732771 A EP03732771 A EP 03732771A EP 1516240 A1 EP1516240 A1 EP 1516240A1
Authority
EP
European Patent Office
Prior art keywords
unit
application
assigned
data bus
controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03732771A
Other languages
German (de)
English (en)
Inventor
Matthias c/o Philips Intellectual Muth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Philips Intellectual Property and Standards GmbH
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Intellectual Property and Standards GmbH, Koninklijke Philips Electronics NV filed Critical Philips Intellectual Property and Standards GmbH
Publication of EP1516240A1 publication Critical patent/EP1516240A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • H04L12/40039Details regarding the setting of the power status of a node according to activity on the bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3209Monitoring remote activity, e.g. over telephone lines or network connections
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3287Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • H04L12/12Arrangements for remote connection or disconnection of substations or of equipment thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40208Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215Controller Area Network CAN
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40267Bus for use in transportation systems
    • H04L2012/40273Bus for use in transportation systems the transportation system being a vehicle
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/50Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Definitions

  • the present invention relates to a method for addressing and / or activating at least one subscriber assigned to at least one serial data bus, in particular at least one controller, which is intended for executing at least one application.
  • the present invention further relates to a chip unit, in particular a system chip unit, for addressing and / or activating at least one at least one serial data bus, in particular at least one controller assigned to a [rea] N [approximately] bus, for execution of an intended application.
  • a chip unit in particular a system chip unit, for addressing and / or activating at least one at least one serial data bus, in particular at least one controller assigned to a [rea] N [approximately] bus, for execution of an intended application.
  • each telegram on the bus is analyzed by special hardware in order to decide whether the message is relevant for the node that is sleeping and thus switched off.
  • the application is only woken and started when the message is successfully compared with a previously defined message.
  • a second permanently supplied bus protocol controller is required, which monitors the bus with a complex message filter and searches for relevant messages.
  • Fig. 1 shows a for C [ontroller] A [rea] N [approximately] applications in the
  • the system chip B analyzes the data traffic on the serial CAN bus A by means of a CAN transceiver Bl and by means of its own CAN controller (including quartz) B.2, while the application microcontroller (including quartz) C.2 and the application hardware D are switched off can to save electricity in the system.
  • the object of the present invention is to develop a method of the type mentioned at the beginning and a chip unit of the type mentioned at the outset in such a way that individual participants in the network, that is to say individual participants can be selectively and selectively woken up on the data bus in order to be able to create individual subnetworks if necessary, without having to wake up the entire network.
  • the present invention is therefore based on the principle of sub-network operation by selective waking.
  • the duplication of the protocol controller hardware which is obligatory in the prior art, can be avoided by using in the application controller (hereinafter also
  • Protocol controller unit already used protocol controller (hereinafter also called protocol controller unit) used and partially supplied by the system chip or by other hardware only when there is traffic in the serial data bus system.
  • Application controllers use the existing connections, so that no additional external effort is required.
  • the voltage supply to the protocol controller is provided by at least one upstream transceiver (hereinafter also referred to as transceiver unit) or by the system chip (also referred to above and hereinafter as chip unit or system chip unit) whenever messages are pending on the data bus (the term “messages” is intended to include messages and / or telegrams pending on the data bus in addition to messages).
  • transceiver unit also referred to as transceiver unit
  • the system chip also referred to above and hereinafter as chip unit or system chip unit
  • Protocol controller for example based on C [ontroller] A [rea] N [approximately], can be supplied separately within the application according to the system; the protocol controller itself can be designed separately (“stand alone”) or can also be integrated in the microcontroller.
  • the separately supplied protocol controller which can expediently have its own clocking that meets the requirements, can carry out a comparison of the incoming messages with stored reference messages, at least one message filter unit being available for this message comparison within the protocol controller.
  • the protocol controller then only provides feedback to the upstream
  • the present invention further relates to a transceiver unit for performing the method according to the above-described type; the transceiver unit is connected to the data bus, is connected to the protocol controller unit and is connected to the application controller unit. According to a preferred development of the present invention, the transceiver unit is connected to the data bus, is connected to the protocol controller unit and is connected to the application controller unit.
  • At least one control logic is assigned to the transceiver unit and / or at least one control logic is implemented in the transceiver unit.
  • the present invention further relates to a first voltage regulator connected to at least one battery unit and connected to at least one transceiver unit, in particular in accordance with the type set out above, for supplying voltage to at least one protocol controller unit assigned to at least one subscriber provided for executing at least one application an incoming message pending on at least one serial data bus, in particular on at least one controller A [rea] N [approximately] bus.
  • the present invention further relates to at least one
  • Battery unit connected, connected to at least one transceiver unit, in particular in accordance with the above-described type, second voltage regulator for supplying voltage to at least one application controller unit assigned to at least one subscriber provided for executing at least one application in the event of correspondence and / or correspondence from at least one to at least one a serial data bus, in particular on at least one controller A [rea] N [approximately] bus, incoming message pending and at least one reference message stored in at least one protocol controller unit and assigned to the application.
  • the chip unit in particular system chip unit, according to the present
  • the invention comprises: at least one transceiver unit according to the type set out above; at least one first voltage regulator of the type set out above; and - at least one second voltage regulator according to that set out above
  • the present invention further relates to a protocol controller unit for comparing at least one incoming message pending on at least one data bus with at least one stored, at least one by at least one Reference message assigned to subscribers to be executed, in particular by means of at least one message comparator and / or message filter, in accordance with the type set out above; In the case of one or more incoming messages, the protocol controller unit must first be supplied with voltage. According to a preferred development of the present invention, the
  • Protocol controller unit has at least one clock generator unit, in particular quartz unit, so that the protocol controller unit can be suitably equipped with its own clocking, in particular quartz clocking.
  • the present invention further relates to an application controller unit according to the type set out above;
  • Application controller unit is to be supplied with voltage only in the event of correspondence and / or correspondence of at least one incoming message pending on at least one data bus and at least one stored reference message assigned to at least one application to be executed by at least one subscriber. According to a preferred development of the present invention, the
  • Application controller unit can be activated by at least one transceiver unit, in particular in accordance with the type set out above.
  • the present invention further relates to a subscriber assigned to at least one data bus and provided for executing at least one application in accordance with the type set out above, with: at least one protocol controller unit in accordance with the type set out above; and at least one application controller unit of the type set forth above.
  • the present invention further relates to a system of the type set forth above, comprising: at least one chip unit of the type set forth above; and at least one subscriber according to the type set out above, the chip unit and the subscriber being connected to one another.
  • the present invention relates to the use of a
  • FIG. 1 is a schematic block diagram of an exemplary embodiment of a system with a chip unit and with a microcontroller unit according to the prior art
  • FIG. 2 is a schematic block diagram of an exemplary embodiment of a system based on the method according to the present invention with a chip unit and with a microcontroller unit according to the present invention.
  • a system 100 is schematically shown in FIG. 2, by means of which a subscriber 40, provided for executing an application and connected to a node 12 of a serial controller A [rea] N [approximately] data bus 10, is addressed and / or can be activated.
  • the principle of operation of the system 100 is as follows: If message traffic is detected and is pending on the CAN data bus line 10, a transceiver unit 34 connected to the data bus 10 and equipped with control logic or the transceiver unit 34 receiving it switches
  • System chip unit 30 which is permanently supplied from the battery unit 20, has a first voltage regulator 32, which is connected to the transceiver unit 34 and is connected 92, 94, and which serves to provide a protocol controller unit 42, which is assigned to the application subscriber 40 and has its own clocking that meets the requirements to energize a connecting line 62.
  • the first voltage regulator 32 is connected to the battery unit 20 via a feed line 22.
  • the Protocol controller unit 42 uses a message comparator or message filter to compare the received messages, messages or telegrams with stored reference messages, messages or telegrams.
  • the availability of the quartz clock ( ⁇ --> quartz unit in the protocol controller unit 42) and the protocol hardware make it possible to recognize certain ones
  • a transceiver unit 34 which is also connected to the battery unit 20 via a feed line 26, is connected to the transceiver unit 34 96 the second voltage regulator 36 is switched on and the application is completely started via the connecting line 82, in that the application controller unit 44 assigned to the subscriber 40 is supplied with voltage by the second voltage regulator 36;
  • a reset line 84 also runs between the second voltage regulator 36 and the application microcontroller unit 44.
  • the second message becomes the second Voltage regulator 36 not switched on.
  • the first voltage regulator 32 is also switched off and in this way maximum power is saved.
  • the system chip unit 30 or the transceiver unit 34 now only lives from the battery unit 20 and waits for incoming messages from the CAN data bus 10 in order to then switch on the first voltage regulator 32 again.
  • the system 100 can be configured and controlled via a mode control interface 70 between the transceiver unit 34 (or the system chip unit 30) and the application controller unit 44.
  • System 100 is designed for addressing and activating subscribers 40 assigned to a serial data bus system 10 and each intended for executing an application, so that individual subscribers 40 in the network, that is to say individual subscribers 40 on data bus 10, can be selectively and specifically woken up to to be able to create individual subnetworks if necessary, without having to wake up the entire network.
  • the protocol controller unit 42 is advantageously used within the application for the response / activation analysis of the current bit stream.
  • a separate power supply concept for the protocol controller unit 42 and for the application controller unit 44 enables a significant reduction in the power consumption of the system 100.
  • a simple "handshake mechanism" between the physical connection to the data bus 10 of the serial protocol controller unit 42 is used to make the decision whether the local system should wake up, that is to say be activated and activated or not.
  • controller A [rea] N [approximately] bus
  • transceiver unit of chip unit 30 36 second voltage regulator of chip unit 30
  • Protocol controller unit 42 Connection between the first voltage regulator 32 and
  • Protocol controller unit 42 70 Interface between transceiver unit 34 and application controller unit
  • Transceiver unit 34 96 Connection between transceiver unit 34 and second voltage regulator 36

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Small-Scale Networks (AREA)
  • Power Sources (AREA)

Abstract

L'invention concerne un procédé et une unité puce (30) servant à faire réagir ou à activer au moins un participant (40) affecté à au moins un bus de données série (10), notamment à au moins un bus CAN (Controller Area Network), et prévu pour exécuter au moins une application. L'invention vise à améliorer ce procédé et cette unité puce de sorte que des participants individuels (40) du réseau, c'est-à-dire des participants individuels (40) au bus de données (10), peuvent être réveillés de manière sélective et ciblée afin de former de cette manière, en cas de besoin, des sous-réseaux individuels sans devoir réveiller tout le réseau. A cet effet, on ne met d'abord sous tension qu'au moins une unité contrôleur de protocole (42) affectée au participant (40) si au moins un message entrant est en attente sur le bus de données (10).
EP03732771A 2002-06-10 2003-06-05 Procede et unite puce pour faire reagir ou activer un participant a un bus de donnees serie Withdrawn EP1516240A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10225578A DE10225578A1 (de) 2002-06-10 2002-06-10 Verfahren und Chipeinheit zum Ansprechen und/oder Aktivieren eines Teilnehmers
DE10225578 2002-06-10
PCT/IB2003/002115 WO2003104959A1 (fr) 2002-06-10 2003-06-05 Procede et unite puce pour faire reagir ou activer un participant a un bus de donnees serie

Publications (1)

Publication Number Publication Date
EP1516240A1 true EP1516240A1 (fr) 2005-03-23

Family

ID=29557701

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03732771A Withdrawn EP1516240A1 (fr) 2002-06-10 2003-06-05 Procede et unite puce pour faire reagir ou activer un participant a un bus de donnees serie

Country Status (7)

Country Link
US (1) US20060168378A1 (fr)
EP (1) EP1516240A1 (fr)
JP (1) JP2005529393A (fr)
CN (1) CN1659498B (fr)
AU (1) AU2003240156A1 (fr)
DE (1) DE10225578A1 (fr)
WO (1) WO2003104959A1 (fr)

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DE102009041434A1 (de) * 2009-09-16 2011-03-24 Robert Bosch Gmbh Verfahren und Vorrichtung zum Aufwecken von Teilnehmern eines Bussystems und entsprechender Teilnehmer
EP2424174A1 (fr) * 2010-08-27 2012-02-29 ELMOS Semiconductor AG Procédé de fonctionnement d'un système de bus
JP5113229B2 (ja) * 2010-09-02 2013-01-09 株式会社日本自動車部品総合研究所 通信システム、トランシーバ、ノード
JP5732836B2 (ja) * 2010-12-08 2015-06-10 株式会社オートネットワーク技術研究所 制御システム及び制御装置
JP5397390B2 (ja) * 2011-01-31 2014-01-22 株式会社デンソー 通信装置
JP5662188B2 (ja) * 2011-02-08 2015-01-28 株式会社日本自動車部品総合研究所 通信システム、トランシーバ、ノード
US8907774B2 (en) 2011-03-01 2014-12-09 Bendix Commercial Vehicle Systems Llc System and method for monitoring tire condition
DE102011079412A1 (de) 2011-07-19 2013-01-24 Robert Bosch Gmbh Verfahren und Vorrichtung zum Abspeichern einer Weckinformation in Teilnehmern eines CAN-Bussystems
US9049660B2 (en) * 2011-09-09 2015-06-02 Microsoft Technology Licensing, Llc Wake pattern management
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Also Published As

Publication number Publication date
CN1659498A (zh) 2005-08-24
CN1659498B (zh) 2010-05-12
US20060168378A1 (en) 2006-07-27
DE10225578A1 (de) 2003-12-18
JP2005529393A (ja) 2005-09-29
WO2003104959A1 (fr) 2003-12-18
AU2003240156A1 (en) 2003-12-22

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