EP1502308A4 - Silizium-germanium-transistor mit erweiterter grenzfrequenz - Google Patents
Silizium-germanium-transistor mit erweiterter grenzfrequenzInfo
- Publication number
- EP1502308A4 EP1502308A4 EP02734064A EP02734064A EP1502308A4 EP 1502308 A4 EP1502308 A4 EP 1502308A4 EP 02734064 A EP02734064 A EP 02734064A EP 02734064 A EP02734064 A EP 02734064A EP 1502308 A4 EP1502308 A4 EP 1502308A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- sige layer
- sige
- concentration
- value
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 229910000577 Silicon-germanium Inorganic materials 0.000 title claims abstract description 124
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title claims description 5
- 239000000758 substrate Substances 0.000 claims description 20
- 238000002955 isolation Methods 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 230000007423 decrease Effects 0.000 claims description 5
- 239000002019 doping agent Substances 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 4
- 238000006731 degradation reaction Methods 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000002050 diffraction method Methods 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 229910008310 Si—Ge Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000013213 extrapolation Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical group [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 230000000135 prohibitive effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005382 thermal cycling Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66242—Heterojunction transistors [HBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1004—Base region of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
- H01L29/7378—Vertical transistors comprising lattice mismatched active layers, e.g. SiGe strained layer transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/0328—Inorganic materials including, apart from doping materials or other impurities, semiconductor materials provided for in two or more of groups H01L31/0272 - H01L31/032
Definitions
- the invention relates to silicon germanium (SiGe) heterojunction bipolar transistors
- This bandgap offset provides the unique advantages of the SiGe HBT by creating a grading field in the base to enhance carrier diffusion across the base and thus improve transistor speed.
- SiGe HBTs have been used as transistors for small signal amplifiers (i.e. switching approximately 5 volts or less) to provide the switching speeds (above 1GHz) necessary for current wireless communications devices.
- One of the difficulties encountered by the inventors in utilizing SiGe HBTs for small signal amplifiers is that the common emitter output characteristics (i.e. the collector current versus the collector-emitter voltage) for such amplifiers generally exhibit poor Early voltage.
- Fig. la (Prior Art) illustrates the Early voltage for SiGe HBTs without use of the invention. The individual curves indicate the output characteristics for different applied base voltages; the higher the curve, the higher the applied base voltage. Note that as applied base current increases, the slope of the curves become more vertical.
- N A is a key indicator of the current gain cutoff frequency (f ⁇ ) for a SiGe HBT.
- f ⁇ current gain cutoff frequency
- the invention is a SiGe HBT comprising a SiGe layer having a thickness and Ge concentration greater than the SiGe stability limit, and a plurality of misfit dislocations therein that do not create appreciable charge trapping sites.
- the invention is a SiGe HBT with an SiGe layer that has a thickness of at least approximately 70nm and a Ge concentration of at least 10% on a plurality of isolation structures, a base/collector junction above the isolation structures, and a plurality of misfit dislocations that do not appreciably extend above the base/collector junction.
- the invention is a bipolar transistor for a small signal amplifier that has a cutoff frequency of at least approximately 19 GHz, a SiGe layer having a thickness and a Ge content that is greater than the SiGe stability limit, a plurality of isolation regions abutting said collector region, and a base region formed on said collector region, said SiGe layer having a plurality of misfit dislocations therein adjacent said plurality of isolation regions and extending into said collector region without substantially extending into said base region.
- the invention is a method of forming a bipolar transistor, comprising the steps of forming a plurality of isolation regions in a silicon substrate; forming a SiGe layer on said substrate and said isolation regions, said SiGe layer having a thickness and a Ge content that is greater than the SiGe stability limit; and doping said SiGe layer and the substrate with a first dopant to form a collector region, wherein said collector region comprises a plurality of misfit dislocations that do not substantially extend beyond said collector region into other portions of the bipolar transistor.
- Fig. la is plot of IC versus NCE for an experimental SiGe HBT
- Fig. lb is plot of IC versus VCE for an SiGe HBT of the present invention
- Figure 2 shows a plot of collector current density versus cutoff frequency for ⁇ P ⁇ s shown with the Early voltages shown in Figs, la and lb, respectively;
- Fig. 3 is a plot of SiGe concentration versus thickness, showing various experimental data points that include those of the invention, superimposed on the SiGe stability curves reported by prior art articles;
- Fig. 4 is a cross-sectional view of a SiGe HBT constructed in accordance with the teachings of a first embodiment of the invention;
- Fig. 5 shows the Gummel plots (IC, IB vs NCE) of the ⁇ P ⁇ s shown with the Early voltages shown in Figs, la and lb, respectively;
- Fig. 6 is a plot of normalized yield data for SiGe HBTs of the thicknesses shown by the data points in Fig. 3;
- Fig. 7 is a graph illustrating three embodiments of Ge concentration versus layer thickness for the SiGe layer of the invention. Best Mode For Carrying Out The Invention The present inventors found that Early voltage (and hence cutoff frequency) can be substantially enhanced by increasing the thickness of the SiGe layer. While in the prior art it is known to increase SiGe thickness for other purposes, thicker SiGe layers are generally avoided for fear of creating misfit dislocations. As will be explained in more detail below, the present inventors have found that when managed properly, misfit dislocations do not adversely affect the performance or yield of the resulting SiGe HBTs.
- SiGe enhances charge mobility by introducing mechanical strain due to the lattice mismatches inherent in the Si-Ge compound.
- the accepted wisdom in the art is that the resulting crystal dislocations will reduce both performance and yield.
- the performance penalty would be due to dislocations relieving the mechanical stresses that create the bandgap offsets that SiGe provides.
- the yield penalty would be due to the defects disturbing the crystallography of the substrate.
- SiGe stability limits The different SiGe stability limits reported by Matthews-Blakesley and Stiffler are plotted in Fig. 3, which shows the reported optimal relationships between SiGe thickness and Ge concentration.
- the SiGe HBT of the invention is formed on a monocrystalline silicon substrate 10 having shallow trench isolation regions (STI) 12 therein.
- An SiGe layer 14 is epitaxially grown using conventional techniques on the substrate 10, to a thickness t of at least 40nm and a Ge concentration of at least approximately 10%.
- the SiGe layer is insitu doped during growth with boron to form a base region 14B (not shown to scale laterally). Note that as a practical matter boron from the base region can diffuse deeper into the SiGe layer during various processing thermal cycles, from a depth X to a depth Y into the SiGe layer 14. As such, the resulting base/collector junction can be at JA or JB.
- Figure 2 shows a plot of collector current density versus cutoff frequency for (a) an NPN with Early voltages as shown in Fig. la (indicated by the dashed line); and (b) the NPN with the Early voltages shown in Fig. lb (indicated by the solid line).
- An aspect of the invention is that these gains in Early voltage and cutoff frequency do not come at the expense of dislocations that decrease performance (by charge trapping) or yield (by crystal dislocations).
- Fig. 5 shows the Gummel plots (IC, IB vs VCE) of the NPNs shown with the Early ⁇ voltages shown in Figs, la and lb, respectively. Note that the IB and IC curves in the Gummel plots have ideal slopes (n ⁇ l (n is a measure of ideality) or 60 mV/decade at room temperature) which indicates that there was no substantial charge trapping induced by the misfit dislocations formed as part of the thicker SiGe layer.
- Fig. 6 shows a plot of normalized yields for SiGe HBTs of the invention, for different SiGe thicknesses.
- the first region shown thickness of 300 angstroms, Ge concentration of 10%
- Fig. 2 shows the upper limit of the SiGe stability curves (see Fig. 2).
- Fig. 7 is a plot of Ge concentration percentage versus depth of a 70nm thick SiGe layer, for three embodiments of the present invention.
- the Ge concentration in the SiGe layer of the invention is approximately 10% throughout the thickness of the 40nm-thick SiGe film.
- This embodiment produced the collector current versus the collector-emitter voltage plot of the invention as shown by the solid lines of Fig. 3.
- the Ge concentration in the SiGe layer of the invention is approximately 10% throughout the thickness of the 70nm-thick film.
- the first and second embodiments produced the yield data shown in Fig. 6.
- the ideal Gummel plots indicate that the resulting dislocations did not establish appreciable charge trapping sites.
- the inventors have found that SiGe layers that have misfit dislocations can improve performance without degrading yield.
- the inventors have found that the large numbers of misfit dislocations, in and of themselves, are not determinative of performance or yield. Rather, the key is that the dislocations do not create appreciable charge trapping, and do not extend in large numbers past the base/collector junction.
- the invention has applicability to electrical circuits and devices, especially those used in communication systems.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2002/013315 WO2003092079A1 (en) | 2002-04-26 | 2002-04-26 | Enhanced cutoff frequency silicon germanium transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1502308A1 EP1502308A1 (de) | 2005-02-02 |
EP1502308A4 true EP1502308A4 (de) | 2009-03-18 |
Family
ID=29268423
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP02734064A Withdrawn EP1502308A4 (de) | 2002-04-26 | 2002-04-26 | Silizium-germanium-transistor mit erweiterter grenzfrequenz |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP1502308A4 (de) |
JP (1) | JP4223002B2 (de) |
KR (1) | KR100754561B1 (de) |
CN (1) | CN1625811A (de) |
AU (1) | AU2002305254A1 (de) |
WO (1) | WO2003092079A1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7544577B2 (en) * | 2005-08-26 | 2009-06-09 | International Business Machines Corporation | Mobility enhancement in SiGe heterojunction bipolar transistors |
JP4829566B2 (ja) * | 2005-08-30 | 2011-12-07 | 株式会社日立製作所 | 半導体装置及びその製造方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4102888A1 (de) * | 1990-01-31 | 1991-08-01 | Toshiba Kawasaki Kk | Verfahren zur herstellung eines miniaturisierten heterouebergang-bipolartransistors |
US5266504A (en) * | 1992-03-26 | 1993-11-30 | International Business Machines Corporation | Low temperature emitter process for high performance bipolar devices |
EP1065728A2 (de) * | 1999-06-22 | 2001-01-03 | Matsushita Electric Industrial Co., Ltd. | Heteroübergangsbipolartransistor und Verfahren zu dessen Herstellung |
EP1139407A1 (de) * | 2000-03-27 | 2001-10-04 | STMicroelectronics SA | Verfahren zur Herstellung eines selbstjustierten Bipolartransistors mit zwei Polysiliziumschichten und Heteroübergangbasis und Transistor durch dieses Verfahren hergestellt |
US20020024061A1 (en) * | 1998-08-19 | 2002-02-28 | Hitachi, Ltd. | Bipolar transistor |
US20020038874A1 (en) * | 2000-09-29 | 2002-04-04 | Kabushiki Kaisha Toshiba | Hetero-bipolar transistor and method of manufacture thereof |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5198689A (en) * | 1988-11-30 | 1993-03-30 | Fujitsu Limited | Heterojunction bipolar transistor |
US5225371A (en) * | 1992-03-17 | 1993-07-06 | The United States Of America As Represented By The Secretary Of The Navy | Laser formation of graded junction devices |
US5461243A (en) * | 1993-10-29 | 1995-10-24 | International Business Machines Corporation | Substrate for tensilely strained semiconductor |
EP1070341A1 (de) * | 1998-04-10 | 2001-01-24 | Massachusetts Institute Of Technology | Ätzstopsystem aus silizium-germanium-schichten |
US6346453B1 (en) * | 2000-01-27 | 2002-02-12 | Sige Microsystems Inc. | Method of producing a SI-GE base heterojunction bipolar device |
US6552406B1 (en) * | 2000-10-03 | 2003-04-22 | International Business Machines Corporation | SiGe transistor, varactor and p-i-n velocity saturated ballasting element for BiCMOS peripheral circuits and ESD networks |
-
2002
- 2002-04-26 CN CNA028287622A patent/CN1625811A/zh active Pending
- 2002-04-26 EP EP02734064A patent/EP1502308A4/de not_active Withdrawn
- 2002-04-26 WO PCT/US2002/013315 patent/WO2003092079A1/en active Application Filing
- 2002-04-26 KR KR1020047016720A patent/KR100754561B1/ko not_active IP Right Cessation
- 2002-04-26 AU AU2002305254A patent/AU2002305254A1/en not_active Abandoned
- 2002-04-26 JP JP2004500339A patent/JP4223002B2/ja not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4102888A1 (de) * | 1990-01-31 | 1991-08-01 | Toshiba Kawasaki Kk | Verfahren zur herstellung eines miniaturisierten heterouebergang-bipolartransistors |
US5266504A (en) * | 1992-03-26 | 1993-11-30 | International Business Machines Corporation | Low temperature emitter process for high performance bipolar devices |
US20020024061A1 (en) * | 1998-08-19 | 2002-02-28 | Hitachi, Ltd. | Bipolar transistor |
EP1065728A2 (de) * | 1999-06-22 | 2001-01-03 | Matsushita Electric Industrial Co., Ltd. | Heteroübergangsbipolartransistor und Verfahren zu dessen Herstellung |
EP1139407A1 (de) * | 2000-03-27 | 2001-10-04 | STMicroelectronics SA | Verfahren zur Herstellung eines selbstjustierten Bipolartransistors mit zwei Polysiliziumschichten und Heteroübergangbasis und Transistor durch dieses Verfahren hergestellt |
US20020038874A1 (en) * | 2000-09-29 | 2002-04-04 | Kabushiki Kaisha Toshiba | Hetero-bipolar transistor and method of manufacture thereof |
Non-Patent Citations (2)
Title |
---|
See also references of WO03092079A1 * |
YUKI K ET AL: "BANDGAP AND STRAIN ENGINEERING IN SIGEC HETEROJUNCTION BIPOLAR TRANSISTORS", JAPANESE JOURNAL OF APPLIED PHYSICS, JAPAN SOCIETY OF APPLIED PHYSICS, TOKYO,JP, vol. 40, no. 4B, PART 01, 1 April 2001 (2001-04-01), pages 2633 - 2636, XP001078188, ISSN: 0021-4922 * |
Also Published As
Publication number | Publication date |
---|---|
JP2005524233A (ja) | 2005-08-11 |
KR20040103974A (ko) | 2004-12-09 |
KR100754561B1 (ko) | 2007-09-05 |
EP1502308A1 (de) | 2005-02-02 |
WO2003092079A1 (en) | 2003-11-06 |
CN1625811A (zh) | 2005-06-08 |
JP4223002B2 (ja) | 2009-02-12 |
AU2002305254A1 (en) | 2003-11-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5656514A (en) | Method for making heterojunction bipolar transistor with self-aligned retrograde emitter profile | |
CN1322564C (zh) | 硅锗双极型晶体管 | |
US5637889A (en) | Composite power transistor structures using semiconductor materials with different bandgaps | |
US7135721B2 (en) | Heterojunction bipolar transistor having reduced driving voltage requirements | |
US7538004B2 (en) | Method of fabrication for SiGe heterojunction bipolar transistor (HBT) | |
US6423990B1 (en) | Vertical heterojunction bipolar transistor | |
US6861324B2 (en) | Method of forming a super self-aligned hetero-junction bipolar transistor | |
CN101390216A (zh) | 氧化增强的亚稳态硅锗膜层 | |
US5912481A (en) | Heterojunction bipolar transistor having wide bandgap, low interdiffusion base-emitter junction | |
US7170112B2 (en) | Graded-base-bandgap bipolar transistor having a constant—bandgap in the base | |
US6642096B2 (en) | Bipolar transistor manufacturing | |
EP1502308A1 (de) | Silizium-germanium-transistor mit erweiterter grenzfrequenz | |
Vook et al. | Double-diffused graded SiGe-base bipolar transistors | |
JP5964829B2 (ja) | 表面パッシベーションのための半導体レッジ層を有する電子デバイス構造 | |
JP4691224B2 (ja) | 注入ステップを使用して半導体デバイスを製造する方法およびこの方法により製造されるデバイス | |
JPH0344937A (ja) | バイポーラトランジスタ及びその製造方法 | |
JPH0744185B2 (ja) | 半導体装置及びその製造方法 | |
JP2646856B2 (ja) | バイポーラトランジスタの製造方法 | |
JPH02152239A (ja) | 半導体装置の製造方法 | |
JPH03292740A (ja) | バイポーラトランジスタ及びその製造方法 | |
Zhang et al. | On the intrinsic spacer layer in Si/SiGe heterojunction bipolar transistor grown by ultra high vacuum chemical vapor deposition | |
Ghannam et al. | Trends in Heterojunction Silicon Bipolar Transistors | |
JP2003045883A (ja) | ヘテロ接合型バイポーラトランジスタとその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20041112 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
|
AX | Request for extension of the european patent |
Extension state: AL LT LV MK RO SI |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: LANZEROTTI, LOUIS D.IBM UNITED KINGDOM LTD Inventor name: JOHNSON, ROBB ALLEN |
|
A4 | Supplementary search report drawn up and despatched |
Effective date: 20090217 |
|
17Q | First examination report despatched |
Effective date: 20090415 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20090826 |