EP1472699A2 - Schaltungsanordnung mit einer mit einem programmierbaren speicherelement bestückten leiterplatte - Google Patents
Schaltungsanordnung mit einer mit einem programmierbaren speicherelement bestückten leiterplatteInfo
- Publication number
- EP1472699A2 EP1472699A2 EP03704211A EP03704211A EP1472699A2 EP 1472699 A2 EP1472699 A2 EP 1472699A2 EP 03704211 A EP03704211 A EP 03704211A EP 03704211 A EP03704211 A EP 03704211A EP 1472699 A2 EP1472699 A2 EP 1472699A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- memory element
- circuit board
- arrangement according
- circuit arrangement
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- Circuit arrangement with a circuit board equipped with a programmable memory element
- the invention relates to a circuit arrangement with a printed circuit board which is equipped with a programmable memory element.
- circuit arrangements are used in circuit technology to perform certain functions.
- the functions are determined by the data stored in the memory elements and can be changed by reprogramming the memory elements. A modification of the saved
- the invention is therefore based on the object of specifying a circuit arrangement with a programmable memory element which has a high level of security against an unauthorized modification of its mode of operation.
- the circuit arrangement according to the invention has a circuit board equipped with a programmable memory element, the memory element having at least one connection via which it is programmable and which is connected to at least one conductor track of the circuit board. This at least one
- connection and each interconnect connected to it are arranged so that they are not accessible without destroying the circuit arrangement and can not be contacted.
- the circuit board is preferably glued to a circuit board carrier and the memory element is arranged on the adhesive side of the circuit board between the circuit board and the circuit board carrier.
- the conductor tracks of the circuit board, via which the memory element can be programmed, are advantageously also arranged on the adhesive side of the circuit board or are located on an intermediate layer within the circuit board.
- the storage element is preferably designed such that its connections are arranged on its side facing the printed circuit board, so that they are no longer accessible after soldering.
- a microcontroller or microprocessor is preferably provided for programming the memory element, the connections of which are concealed, as in the case of the memory element, and which are not accessible from the outside without destroying the circuit arrangement.
- the circuit arrangement according to the invention is ideally suited for use as a control device in a motor vehicle and inexpensively prevents unauthorized tuning of the engine.
- FIG. 1 shows an exploded view of the circuit arrangement according to the invention
- FIG. 2 shows a basic illustration of a memory element from the circuit arrangement according to FIG. 1.
- the circuit arrangement according to FIG. 1 is used in a motor vehicle as a control unit for engine control. It comprises a printed circuit board 2, which is equipped with components on both sides, and a printed circuit board carrier 4.
- One of the components is designed as a memory element 10 with non-volatile memory (flash memory). This has a number of connections via which data can be written into its memory and which are connected to a microprocessor 11 via conductor tracks 30, 31, 32.
- the memory element 10, the conductor tracks 30, 31, 32 connected to the connections of the memory element 10 and the microprocessor 11 are arranged on the side of the circuit board 2 facing the circuit board carrier 4. After the components have been soldered, the circuit board 2 is glued to the circuit board carrier 4 in such a way that the memory element 10, the microprocessor 11 and the conductor tracks
- the printed circuit board carrier 4 has corresponding bulges or depressions for receiving the memory element 10 and the microprocessor 11.
- the adhesive connection is made so firm that a non-destructive separation of the printed circuit board 2 from the printed circuit board support 4 is no longer possible. After gluing, non-destructive contacting of the connections of the memory element 1 0 is no longer possible. It is therefore also no longer possible to reprogram the memory element 10 by directly contacting its connections or by contacting its connections via the conductor tracks 30, 31, 32 or via the connections of the microprocessor 11.
- Figure 2 shows a perspective view of a component with a BGA housing. According to the figure, this component has on its lower side a multiplicity of connections arranged in a matrix, on which solder in the form of small balls is applied. During the soldering process, these balls are melted and connect to corresponding connection surfaces provided on the printed circuit board.
- the memory element 10 is designed as a component with a BGA housing or as a CSP component, then it can also be arranged on the side of the printed circuit board 2 opposite the printed circuit board carrier 4.
- the conductor tracks 30, 31, 32, via which the memory element 10 can be programmed, are then through-plated-through holes with the corresponding connections of the memory element 1 0 connected, the plated-through holes below the saliva element 10 and thus to be provided at a point not accessible from the outside.
- the microprocessor 11 is designed as a component with a BGA housing or as a CSP component. However, since in such an arrangement manipulation of the memory content by unsoldering the memory element 10,
- Reading out and modifying the memory content writing the modified memory content into the memory element 10 or into a new memory element and soldering the memory element 10 or the new memory element onto the printed circuit board 2 would still be conceivable, but this would involve considerable work and the risk of the conductor tracks 30 being destroyed, 31, 32 would be connected during the unsoldering process, it is recommended to arrange the memory element 10 and the microprocessor 11 as shown in FIG. 1 on the adhesive side of the printed circuit board 2. Access to the content of the memory element 1 0 is then no longer possible without destroying the assembly.
- the measures described are only intended to prevent unauthorized programming of the memory element 10.
- the manufacturer of the circuit arrangement is authorized to program the memory element 10 and he can also do this by programming the memory element 10 or the corresponding conductor tracks while still freely accessible during the manufacturing process before the circuit board 2 is glued to the circuit board carrier 4. After gluing, on the other hand, programming is only possible via the microprocessor 11, but only if appropriate algorithms have been implemented.
- a passwor ⁇ is then tausêt made to prevent an unauthorized reprogramming of the memory element 10th
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Storage Device Security (AREA)
Abstract
Description
Claims
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10205208 | 2002-02-08 | ||
DE10205208A DE10205208A1 (de) | 2002-02-08 | 2002-02-08 | Schaltungsanordnung mit einer mit einem programmierbaren Speicherelement bestückten Leiterplatte |
PCT/DE2003/000100 WO2003067604A2 (de) | 2002-02-08 | 2003-01-16 | Schaltungsanordnung mit einer mit einem programmierbaren speicherelement bestückten leiterplatte |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1472699A2 true EP1472699A2 (de) | 2004-11-03 |
Family
ID=27634809
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP03704211A Withdrawn EP1472699A2 (de) | 2002-02-08 | 2003-01-16 | Schaltungsanordnung mit einer mit einem programmierbaren speicherelement bestückten leiterplatte |
Country Status (4)
Country | Link |
---|---|
US (1) | US7218529B2 (de) |
EP (1) | EP1472699A2 (de) |
DE (1) | DE10205208A1 (de) |
WO (1) | WO2003067604A2 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8351213B2 (en) * | 2006-05-26 | 2013-01-08 | Brian Gorrell | Electrical assembly |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001093275A1 (en) * | 2000-05-30 | 2001-12-06 | Hitachi,Ltd | Semiconductor device and mobile communication terminal |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4604644A (en) * | 1985-01-28 | 1986-08-05 | International Business Machines Corporation | Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making |
JPH07121635B2 (ja) * | 1989-09-09 | 1995-12-25 | 三菱電機株式会社 | Icカード |
US5072331A (en) * | 1991-04-26 | 1991-12-10 | Hughes Aircraft Company | Secure circuit structure |
US5233505A (en) * | 1991-12-30 | 1993-08-03 | Yeng-Ming Chang | Security device for protecting electronically-stored data |
DE19512266C2 (de) * | 1994-09-23 | 1998-11-19 | Rainer Jacob | Diebstahlschutzsystem für Fahrzeuge |
JP3400877B2 (ja) * | 1994-12-14 | 2003-04-28 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
DE19511775C1 (de) * | 1995-03-30 | 1996-10-17 | Siemens Ag | Trägermodul, insb. zum Einbau in einen kartenförmigen Datenträger, mit Schutz gegen die Untersuchung geheimer Bestandteile |
US5824571A (en) * | 1995-12-20 | 1998-10-20 | Intel Corporation | Multi-layered contacting for securing integrated circuits |
US5760478A (en) * | 1996-08-20 | 1998-06-02 | International Business Machines Corporation | Clock skew minimization system and method for integrated circuits |
JP3440763B2 (ja) * | 1996-10-25 | 2003-08-25 | 富士ゼロックス株式会社 | 暗号化装置、復号装置、機密データ処理装置、及び情報処理装置 |
US5909056A (en) * | 1997-06-03 | 1999-06-01 | Lsi Logic Corporation | High performance heat spreader for flip chip packages |
JPH1131784A (ja) * | 1997-07-10 | 1999-02-02 | Rohm Co Ltd | 非接触icカード |
US6448665B1 (en) * | 1997-10-15 | 2002-09-10 | Kabushiki Kaisha Toshiba | Semiconductor package and manufacturing method thereof |
US6191360B1 (en) * | 1999-04-26 | 2001-02-20 | Advanced Semiconductor Engineering, Inc. | Thermally enhanced BGA package |
US6273339B1 (en) * | 1999-08-30 | 2001-08-14 | Micron Technology, Inc. | Tamper resistant smart card and method of protecting data in a smart card |
US6366467B1 (en) * | 2000-03-31 | 2002-04-02 | Intel Corporation | Dual-socket interposer and method of fabrication therefor |
US6566748B1 (en) * | 2000-07-13 | 2003-05-20 | Fujitsu Limited | Flip-chip semiconductor device having an improved reliability |
-
2002
- 2002-02-08 DE DE10205208A patent/DE10205208A1/de not_active Ceased
-
2003
- 2003-01-16 EP EP03704211A patent/EP1472699A2/de not_active Withdrawn
- 2003-01-16 WO PCT/DE2003/000100 patent/WO2003067604A2/de active Application Filing
- 2003-02-07 US US10/359,819 patent/US7218529B2/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001093275A1 (en) * | 2000-05-30 | 2001-12-06 | Hitachi,Ltd | Semiconductor device and mobile communication terminal |
Also Published As
Publication number | Publication date |
---|---|
US7218529B2 (en) | 2007-05-15 |
DE10205208A1 (de) | 2003-09-18 |
WO2003067604A3 (de) | 2003-12-11 |
US20030151138A1 (en) | 2003-08-14 |
WO2003067604A2 (de) | 2003-08-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20040603 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT SE SI SK TR |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: KUHN, MATHIAS Inventor name: GUTBROD, WOLFGANG Inventor name: HEINKE, FRIEDHELM Inventor name: BREU, GUNTHER Inventor name: DIEHM, HANS-JOACHIM |
|
17Q | First examination report despatched |
Effective date: 20061208 |
|
17Q | First examination report despatched |
Effective date: 20061208 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20080815 |