EP1405413B1 - Multiplier circuit - Google Patents

Multiplier circuit Download PDF

Info

Publication number
EP1405413B1
EP1405413B1 EP02752994A EP02752994A EP1405413B1 EP 1405413 B1 EP1405413 B1 EP 1405413B1 EP 02752994 A EP02752994 A EP 02752994A EP 02752994 A EP02752994 A EP 02752994A EP 1405413 B1 EP1405413 B1 EP 1405413B1
Authority
EP
European Patent Office
Prior art keywords
input
current
output
multiplier circuit
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP02752994A
Other languages
German (de)
French (fr)
Other versions
EP1405413A2 (en
Inventor
Martin Simon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1405413A2 publication Critical patent/EP1405413A2/en
Application granted granted Critical
Publication of EP1405413B1 publication Critical patent/EP1405413B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/16Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
    • G06G7/163Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division using a variable impedance controlled by one of the input signals, variable amplification or transfer function

Definitions

  • the present invention relates to a multiplier circuit.
  • Analog multiplier circuits for multiplication two input signals that is determination of their Sum and difference frequencies are usually in transmitters and receivers used in high-frequency applications.
  • each an emitter node is ever a load terminal of a differential amplifier whose control inputs have a second, to be multiplied signal is fed, which is usually that to be implemented on a different frequency level or the carrier frequency modulating input useful signal is.
  • the differential amplifier in its linear Working area, are the transistors of the transistor pairs, where the control input side, the local oscillator signal can be fed, operated switched and form quadrature modulators of the mixer.
  • the control inputs of the differential amplifier are accordingly controlled by low pass filtered baseband signals, wherein These control inputs are powered by digital / analog converters the output side of a digital baseband module are connected.
  • a relatively large Be set working current To have sufficiently good linearity properties and to achieve a sufficiently large reinforcement, must be in the differential amplifiers a relatively large Be set working current.
  • the local oscillator signal providing oscillator also the relatively high working current and the usual provided feedback resistors of the differential amplifier to a relatively high noise level at Modulator output.
  • the system requirements GSM standard, Global System for Mobile Communication It is customary at the output of the modulator to use a surface acoustic wave filter.
  • Document EP 1 160 717 A1 discloses an analog multiplier circuit specified. Both inputs are for feeding Voltage signals designed. The emitter nodes of the differential amplifier are connected to one of the inputs via current mirrors. To convert the voltage signal into a current signal are a total of four resistors between the current mirror and Ground switched.
  • the document EP 0 365 085 A2 discloses a circuit for Setting the amplitude of a signal specified. Of the two coupled differential amplifiers is only one designed for useful signal amplification of an unbalanced signal, while the other only a DC component of the single-ended signal processed.
  • the present invention relates to a multiplier circuit, designed for processing differential signals is and has a first input for feeding a first Input signal, a second input for supplying a second input signal, an output to provide a from the first and second input signal derived output signal, a first and a second transistor pair with Control inputs coupled to the first input, and with controlled routes, on the one hand with the exit the multiplier circuit are coupled and the other each form a current input has.
  • Such Multiplier circuit is described in Coue D. et al: "A Four-quadrant Subthreshold Mode Multiplier for Analog Neural Network Applications "IEEE TRANSACTIONS ON NEURAL NETWORKS, IEEE INC, NEW YORK, US, Vol. 7, No. 5, September 1, 1996 (1996-09-01), Pages 1212-1219, XP000635147 ISSN: 1045-9227.
  • the object of the present invention is a multiplier circuit specify that for use in vector modulators is suitable and improved in a simple structure Has noise properties.
  • multiplier circuit comprising the features of the present claim 1.
  • At least a current mirror for feeding the to be transmitted Use signal provided. This allows the at the beginning Gilbert's described multiplier cell Differential amplifier, with the useful signal to be transmitted is controlled, omitted.
  • Power sources connectable on the input side to the current mirror have a much higher compared to differential amplifiers Linearity with significantly lower supply current on.
  • the feedback resistances of the differential amplifier can be used be dispensed so that the noise properties the present mixer circuit significantly improved are.
  • a further reduction in the noise of the present multiplier circuit can by reducing the Kanalweitezu Channel length ratio of the current mirror transistors achieved become.
  • a filter circuit for filtering the second Input of the multiplier circuit feedable second input signal provided with a current output connected to the Input of the at least one current mirror is connected.
  • the output side anyway usually have a current output. hereby can with advantage this current output of the low-pass filter with coupled to the inputs of the current mirror of the multiplier be such that a conversion of the output current of the filter in a voltage, which then the conventional Gilbert multiplier cell can be fed, can be avoided. hereby can the noise characteristics, the electricity needs as well the linearity properties are further improved.
  • the filter circuit comprises a low-pass filter.
  • the power source for supplying the second signal input of the mixer namely the linear Input, which in any case preferred in the output stage of the baseband low-pass filter provided power source.
  • Invention is provided a voltage controlled current source, the current output to the input of the at least one Current mirror is coupled.
  • the control voltage which can be supplied to the voltage-controlled current source for example, represents a mixer feedable Baseband signal in a mobile radio transmitter. If this Signal is present as a voltage signal, can with the described Voltage-controlled current source, which is a voltage-current converter with downstream current mirror for formation represents the second input of the analog multiplier, under Maintaining improved linearity and noise properties as well as the lower power requirement of the present Multiplier circuit a voltage input high Input resistance may be provided at the second input.
  • the at least one current mirror as Diode switched input transistor, which has a current mirror output transistor is downstream.
  • the Channel width to channel length ratios of the current mirror transistors may be a desired current gain, that is a desired transmission ratio of the current mirror achieved become.
  • Invention is between input and output transistor provided a low-pass filter of the current mirror, which input coupled with output transistor.
  • Invention is the multiplier circuit for processing formed differential signals.
  • Figure 1 shows a multiplier circuit with one for feeding a differential signal formed first Input 1, 2, the preferred one provided by an oscillator Local oscillator signal with one to be modulated Carrier frequency can be fed.
  • the first input 1, 2 is with each connected to a control input of each of a transistor 3, 4, 5, 6, in each case two transistors 3, 4; 5, 6 pairs interconnected with each other.
  • the high frequency output 9, 10 is for providing formed differential output signals.
  • the current input 7, 8 of the transistor pairs 3, 4; 5, 6 is over each a current mirror 11, 12; 13, 14 with a second entrance 15, 16 for supplying a second, to be multiplied Input signal connected.
  • the current mirrors 11, 12; 13, 14 each comprise a diode-connected input current mirror transistor 11, 13 and an output transistor 12, 14, with its control input to the control input of the Input current mirror transistor 11, 13 is connected.
  • the Current mirror transistors 11 to 14 are connected to a reference potential terminal 17 coupled via one load connection.
  • the output stage of a low-pass filter 18, which with his Output for carrying differential signals to the second Input 15, 16 of the multiplier circuit is connected.
  • the low-pass filter 18 is preceded by a digital / analog converter 19, which are usually called digital signals present, to be sent useful signals or components thereof to be sent useful signals, which for example from a Baseband processing chain are fed into analog signals transforms.
  • a digital / analog converter 19 which are usually called digital signals present, to be sent useful signals or components thereof to be sent useful signals, which for example from a Baseband processing chain are fed into analog signals transforms.
  • unwanted spectral components which before a Frequency mixing of the useful signal with a local oscillator signal filtered out with a carrier frequency with low-pass filter 18 can be.
  • FIG. 2 shows a further embodiment of the present invention Multiplier. It is at the second entrance 15, 16 for providing a current source for the current mirror transistors 11 to 14 instead of that provided in accordance with Figure 1 Low-pass filter 18 in Figure 2 each one with an operational amplifier formed voltage / current converter provided.
  • the construction of the multiplier circuit between the first Input 1, 2, second input 15, 16 and output 9, 10 corresponds in interconnection and function that already for Figure 1 explained and should therefore not at this point again be repeated.
  • At the second input 15, 16 is ever one driven by an associated operational amplifier 20, 21 Transistor 22, 23 each connected to a load terminal. Depending on a further load connection of the operational amplifier 20, 21 driven transistors 22, 23 is over a resistor 24 with a reference potential terminal 25th connected.
  • the resistors 24 operate as a power source and each serve to adjust the of the current mirrors 11th to 13 to be amplified electricity.
  • the inverting Inputs of the operational amplifiers 20, 21 are each for Forming a feedback with the load terminal of the Transistors 22, 23 connected to the resistor 24, 25 connected.
  • FIG. 3 shows a development of the multiplier circuit with voltage / current conversion according to Figure 2 in a realization the operational amplifier for voltage / current conversion and the rest of the circuit with MOS field effect transistors.
  • Structure and function of the multiplier circuit between first input 1, 2, output 9, 10, transistor pairs 3 to 6, as well as current input 15, 16 correspond to it apart from the Realization in MOS circuit technology the embodiments according to Figures 1 and 2 and are therefore intended at this point not be repeated again.
  • the current mirror branches 11 to 14 a development is provided to that between input current mirror transistors 11, 13 and output current mirror transistors 12, 14 each have an RC element as Low pass filter is interposed with a series resistor 28 and a reference potential terminal 17 to the resistance 28 downstream capacity 30.
  • FIG. 2 shows an embodiment in FIG the operational amplifier shown schematically in Figure 2 20, 21 shown with MOS field effect transistors.
  • the additional low-pass filters 29, 30 in the current mirrors 11, 12; 13, 14 lead advantageously to another Improvement of the noise characteristics of the multiplier circuit.
  • FIG. 4 shows the application per one of the invention Multiplier circuit 42, 43 each in an inphase and a quadrature branch I, Q of a transmission arrangement with complex-valued signal processing.
  • the transmission arrangement comprises a baseband module 44, with a block for digital signal processing 45, the digital, Baseband signals to be transmitted are of complex value, that is divided into an in-phase and a quadrature component I, Q, provides.
  • digital Signal is a low-pass filter 47 in each case in each case in the inphase and quadrature branch I, Q provided digital to analog converter 48 connected.
  • the low pass filter 47 are with their Outputs in turn to the useful signal inputs of the mixer 42, 43 connected.
  • the frequency mixer 42, 43 are for Formation of a vector modulator, each with a further Input, the local oscillator input, via a common Frequency divider 49 to a voltage controlled oscillator 50th connected, which provides the local oscillator signal.
  • the multipliers 42, 43 are common Summing node 51 for summing the high-frequency Output signals of the multiplier circuits 42, 43 linked, wherein the summing node 51, for example via a not shown antenna to be transmitted, high-frequency Signal provides.
  • the output at the summing node 51 has provided high-frequency signal a particularly large Signal-to-noise ratio on.
  • a longer battery or Akkumulator Screte-to-noise ratio

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Amplitude Modulation (AREA)
  • Transmitters (AREA)
  • Amplifiers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

Die vorliegende Erfindung betrifft eine Multipliziererschaltung.The present invention relates to a multiplier circuit.

Analog aufgebaute Multiplizierer-Schaltkreise zur Multiplikation zweier Eingangssignale, das heißt Bestimmung von deren Summen- und Differenzfrequenzen, werden üblicherweise in Sendern und Empfängern in Hochfrequenzanwendungen eingesetzt.Analog multiplier circuits for multiplication two input signals, that is determination of their Sum and difference frequencies are usually in transmitters and receivers used in high-frequency applications.

In dem Dokument Gray, Meyer: Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, Third Edition 1993, ISBN 0-471-57495-3 ist in Figur 10.9 eine in bipolarer Schaltungstechnik aufgebaute Gilbert-Multipliziererzelle angegeben. Dort wird einem ersten Eingang, der mit Steuereingängen von zwei Transistorpaaren gekoppelt ist, ein erstes Eingangssignal, beispielsweise ein Lokaloszillator-Signal, zugeführt, welches eine Trägerfrequenz aufweist. Die Lastanschlüsse der Transistoren dieser Transistorpaare sind einerseits mit einem Stromausgang des Mischers verbunden und andererseits jeweils paarweise in einem gemeinsamen Emitterknoten verbunden. An je einen Emitterknoten ist je ein Lastanschluß eines Differenzverstärkers angeschlossen, dessen Steuereingängen ein zweites, zu multiplizierendes Signal zuführbar ist, welches üblicherweise das auf eine andere Frequenzebene umzusetzende beziehungsweise das die Trägerfrequenz modulierende Eingangs-Nutzsignal ist. Während der Differenzverstärker in seinem linearen Bereich arbeitet, sind die Transistoren der Transistorpaare, denen steuereingangsseitig das Lokaloszillatorsignal zuführbar ist, geschaltet betrieben und bilden Quadraturmodulatoren des Mischers.In the document Gray, Meyer: Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, Third Edition 1993, ISBN 0-471-57495-3 is a bipolar circuit in Figure 10.9 constructed Gilbert multiplier cell indicated. There is a first entrance, with control inputs is coupled by two transistor pairs, a first input signal, for example, a local oscillator signal, fed, which has a carrier frequency. The load connections of the Transistors of these transistor pairs are on the one hand with a Current output of the mixer connected and on the other hand respectively connected in pairs in a common emitter node. At each an emitter node is ever a load terminal of a differential amplifier whose control inputs have a second, to be multiplied signal is fed, which is usually that to be implemented on a different frequency level or the carrier frequency modulating input useful signal is. While the differential amplifier in its linear Working area, are the transistors of the transistor pairs, where the control input side, the local oscillator signal can be fed, operated switched and form quadrature modulators of the mixer.

Bei Einsatz einer derartigen Gilbert-Mischerzelle in einem Mobilfunksender werden zur Bildung eines Vektormodulators, dem eingangsseitig ein Inphase- und ein Quadraturpfad zur Übertragung komplexwertiger Basisbandsignale zuführbar sind, zwei Gilbert-Zellen eingesetzt, deren Ausgänge in einem Summierknoten miteinander verknüpft sind.When using such a Gilbert mixer cell in one Mobile radio transmitters are used to form a vector modulator, on the input side, an in-phase and a quadrature path to Transmission of complex-valued baseband signals can be supplied, two Gilbert cells are used, their outputs in a summing node linked together.

Die Steuereingänge des Differenzverstärkers werden demnach von tiefpaßgefilterten Basisbandsignalen gesteuert, wobei diese Steuereingänge von Digital/Analog-Wandlern gespeist werden, die ausgangsseitig an einem digitalen Basisbandbaustein angeschlossen sind. Um ausreichend gute Linearitätseigenschaften und eine genügend große Verstärkung zu erreichen, muß in den Differenzverstärkern ein verhältnismäßig großer Arbeitsstrom eingestellt sein. Neben dem Phasenrauschen des das Lokaloszillatorsignal bereitstellenden Oszillators führen auch der verhältnismäßig hohe Arbeitsstrom sowie die üblicherweise vorgesehenen Rückkopplungswiderstände der Differenzverstärker zu einem verhältnismäßig hohen Rauschpegel am Modulatorausgang. Um den Systemanforderungen beispielsweise des Mobilfunkstandards GSM, Global System for Mobile Communication, zu genügen, ist es üblich, am Ausgang des Modulators ein Oberflächenwellenfilter einzusetzen.The control inputs of the differential amplifier are accordingly controlled by low pass filtered baseband signals, wherein These control inputs are powered by digital / analog converters the output side of a digital baseband module are connected. To have sufficiently good linearity properties and to achieve a sufficiently large reinforcement, must be in the differential amplifiers a relatively large Be set working current. In addition to the phase noise of lead the local oscillator signal providing oscillator also the relatively high working current and the usual provided feedback resistors of the differential amplifier to a relatively high noise level at Modulator output. For example, the system requirements GSM standard, Global System for Mobile Communication, It is customary at the output of the modulator to use a surface acoustic wave filter.

In dem Dokument EP 1 160 717 A1 ist eine Analogmultipliziererschaltung angegeben. Beide Eingänge sind zum Zuführen von Spannungssignalen ausgelegt. Die Emitterknoten der Differenzverstärker sind über Stromspiegel an einen der Eingänge gelegt. Zur Konversion des Spannungssignals in ein Stromsignal sind insgesamt vier Widerstände zwischen die Stromspiegel und Masse geschaltet.Document EP 1 160 717 A1 discloses an analog multiplier circuit specified. Both inputs are for feeding Voltage signals designed. The emitter nodes of the differential amplifier are connected to one of the inputs via current mirrors. To convert the voltage signal into a current signal are a total of four resistors between the current mirror and Ground switched.

In der Druckschrift EP 0 365 085 A2 ist eine Schaltung zur Einstellung der Amplitude eines Signals angegeben. Von den beiden gekoppelten Differenzverstärkern ist lediglich einer zur Nutzsignalverstärkung eines unsymmetrischen Signals ausgelegt, während der andere nur einen Gleichanteil des Eintaktsignals verarbeitet. The document EP 0 365 085 A2 discloses a circuit for Setting the amplitude of a signal specified. Of the two coupled differential amplifiers is only one designed for useful signal amplification of an unbalanced signal, while the other only a DC component of the single-ended signal processed.

Die vorliegende Erfindung betrifft eine Multipliziererschaltung, die zur Verarbeitung differentieller Signale ausgelegt ist und die einen ersten Eingang zum Zuführen eines ersten Eingangssignals, einen zweiten Eingang zum Zuführen eines zweiten Eingangssignals, einen Ausgang zum Bereitstellen eines von erstem und zweitem Eingangssignal abgeleiteten Ausgangssignals, ein erstes und ein zweites Transistorpaar mit Steuereingängen, die mit dem ersten Eingang gekoppelt sind, und mit gesteuerten Strecken, die einerseits mit dem Ausgang der Multipliziererschaltung gekoppelt sind und die andererseits je einen Stromeingang bilden, aufweist. Eine derartige Multipliziererschaltung ist in Coue D. et al: "A Four-Quadrant Subthreshold Mode Multiplier for Analog Neural Network Applications" IEEE TRANSACTIONS ON NEURAL NETWORKS, IEEE INC, NEW YORK, US, Bd. 7, Nr. 5, 1. September 1996 (1996-09-01), Seiten 1212-1219, XP000635147 ISSN: 1045-9227, beschrieben. The present invention relates to a multiplier circuit, designed for processing differential signals is and has a first input for feeding a first Input signal, a second input for supplying a second input signal, an output to provide a from the first and second input signal derived output signal, a first and a second transistor pair with Control inputs coupled to the first input, and with controlled routes, on the one hand with the exit the multiplier circuit are coupled and the other each form a current input has. Such Multiplier circuit is described in Coue D. et al: "A Four-quadrant Subthreshold Mode Multiplier for Analog Neural Network Applications "IEEE TRANSACTIONS ON NEURAL NETWORKS, IEEE INC, NEW YORK, US, Vol. 7, No. 5, September 1, 1996 (1996-09-01), Pages 1212-1219, XP000635147 ISSN: 1045-9227.

Aufgabe der vorliegenden Erfindung ist es, eine Multipliziererschaltung anzugeben, die für den Einsatz in Vektormodulatoren geeignet ist und bei einfachem Aufbau verbesserte Rauscheigenschaften aufweist.The object of the present invention is a multiplier circuit specify that for use in vector modulators is suitable and improved in a simple structure Has noise properties.

Erfindungsgemäß wird die Aufgabe gelöst durch eine Multiplizererschaltung, aufweisend die Merkmale des vorliegenden Patentanspruchs 1.According to the invention the object is achieved by a multiplier circuit, comprising the features of the present claim 1.

Zum Speisen eines Stroms in die Transistorpaare des Multiplizierers, die Transistoren umfassen, die üblicherweise geschaltet betrieben werden, ist bei vorliegender Erfindung zumindest ein Stromspiegel zum Einspeisen des zu übertragenden Nutzsignals vorgesehen. Hierdurch kann der bei der eingangs beschriebenen Multipliziererzelle nach Gilbert vorgesehene Differenzverstärker, der mit dem zu übertragenden Nutzsignal angesteuert wird, entfallen.For feeding a current into the transistor pairs of the multiplier, comprise the transistors, which are usually switched operated, is in the present invention, at least a current mirror for feeding the to be transmitted Use signal provided. This allows the at the beginning Gilbert's described multiplier cell Differential amplifier, with the useful signal to be transmitted is controlled, omitted.

Eingangsseitig am Stromspiegel anschließbare Stromquellen weisen im Vergleich zu Differenzverstärkern eine deutlich höhere Linearität bei signifikant geringerem Versorgungsstrom auf. Zudem kann auf die Rückkopplungswiderstände des Differenzverstärkers verzichtet werden, so daß die Rauscheigenschaften der vorliegenden Mischerschaltung deutlich verbessert sind.Power sources connectable on the input side to the current mirror have a much higher compared to differential amplifiers Linearity with significantly lower supply current on. In addition, the feedback resistances of the differential amplifier can be used be dispensed so that the noise properties the present mixer circuit significantly improved are.

Eine weitere Verringerung des Rauschens der vorliegenden Multipliziererschaltung kann durch Verringerung des Kanalweitezu Kanallängeverhältnisses der Stromspiegeltransistoren erzielt werden.A further reduction in the noise of the present multiplier circuit can by reducing the Kanalweitezu Channel length ratio of the current mirror transistors achieved become.

In einer bevorzugten Ausführungsform der vorliegenden Erfindung ist eine Filterschaltung zum Filtern des dem zweiten Eingang der Multipliziererschaltung zuführbaren zweiten Eingangssignals vorgesehen mit einem Stromausgang, der mit dem Eingang des zumindest einen Stromspiegels verbunden ist. In a preferred embodiment of the present invention is a filter circuit for filtering the second Input of the multiplier circuit feedable second input signal provided with a current output connected to the Input of the at least one current mirror is connected.

Zur Vermeidung unerwünschter Störeffekte durch Mischen höherer harmonischer Frequenzanteile des Nutzsignals sind eingangsseitig an Frequenzmischern oder Multipliziererschaltungen üblicherweise Tiefpaßfilter vorgesehen, die ausgangsseitig ohnehin meist einen Stromausgang aufweisen. Hierdurch kann mit Vorteil dieser Stromausgang der Tiefpaßfilter mit den Eingängen der Stromspiegel des Multiplizierers gekoppelt werden, so daß eine Umsetzung des Ausgangsstroms des Filters in eine Spannung, welche dann der herkömmlichen Gilbert-Multiplizierzelle zuführbar ist, vermieden werden kann. Hierdurch können die Rauscheigenschaften, der Strombedarf sowie die Linearitätseigenschaften weiter verbessert werden.To avoid unwanted spurious effects by mixing higher harmonic frequency components of the useful signal are input side at frequency mixers or multiplier circuits Usually provided low-pass filter, the output side anyway usually have a current output. hereby can with advantage this current output of the low-pass filter with coupled to the inputs of the current mirror of the multiplier be such that a conversion of the output current of the filter in a voltage, which then the conventional Gilbert multiplier cell can be fed, can be avoided. hereby can the noise characteristics, the electricity needs as well the linearity properties are further improved.

In einer weiteren, bevorzugten Ausführung der vorliegenden Erfindung umfaßt die Filterschaltung ein Tiefpaßfilter.In a further preferred embodiment of the present invention In the invention, the filter circuit comprises a low-pass filter.

Im vorliegenden Fall ist die Stromquelle zum Versorgen des zweiten Signaleingangs des Mischers, nämlich des linearen Eingangs, bevorzugt die ohnehin in der Ausgangsstufe des Basisbandtiefpaßfilters vorgesehene Stromquelle.In the present case, the power source for supplying the second signal input of the mixer, namely the linear Input, which in any case preferred in the output stage of the baseband low-pass filter provided power source.

In einer weiteren, bevorzugten Ausführungsform der vorliegenden Erfindung ist eine spannungsgesteuerte Stromquelle vorgesehen, deren Stromausgang mit dem Eingang des zumindest einen Stromspiegels gekoppelt ist.In a further preferred embodiment of the present invention Invention is provided a voltage controlled current source, the current output to the input of the at least one Current mirror is coupled.

Die der spannungsgesteuerten Stromquelle zuführbare Steuerspannung repräsentiert beispielsweise ein dem Mischer zuführbares Basisband-Signal in einem Mobilfunksender. Falls dieses Signal als Spannungssignal vorliegt, kann mit der beschriebenen spannungsgesteuerten Stromquelle, welche einen Spannungs-Strom-Konverter mit nachgeschaltetem Stromspiegel zur Bildung des zweiten Eingangs des Analogmultiplizierers darstellt, unter Beibehaltung der verbesserten Linearitäts- und Rauscheigenschaften sowie des geringeren Strombedarfs der vorliegenden Multipliziererschaltung ein Spannungseingang mit hohem Eingangswiderstand am zweiten Eingang bereitgestellt sein. The control voltage which can be supplied to the voltage-controlled current source for example, represents a mixer feedable Baseband signal in a mobile radio transmitter. If this Signal is present as a voltage signal, can with the described Voltage-controlled current source, which is a voltage-current converter with downstream current mirror for formation represents the second input of the analog multiplier, under Maintaining improved linearity and noise properties as well as the lower power requirement of the present Multiplier circuit a voltage input high Input resistance may be provided at the second input.

In einer weiteren, bevorzugten Ausführungsform der vorliegenden Erfindung weist der zumindest eine Stromspiegel einen als Diode geschalteten Eingangstransistor auf, dem ein Stromspiegel-Ausgangstransistor nachgeschaltet ist. Durch Anpassen der Kanalweiten- zu Kanallängenverhältnisse der Stromspiegeltransistoren kann eine gewünschte Stromverstärkung, das heißt ein gewünschtes Übersetzungsverhältnis des Stromspiegels, erzielt werden.In a further preferred embodiment of the present invention Invention, the at least one current mirror as Diode switched input transistor, which has a current mirror output transistor is downstream. By adjusting the Channel width to channel length ratios of the current mirror transistors may be a desired current gain, that is a desired transmission ratio of the current mirror achieved become.

In einer weiteren, bevorzugten Ausführungsform der vorliegenden Erfindung ist zwischen Eingangs- und Ausgangstransistor des Stromspiegels ein Tiefpaßfilter vorgesehen, welches Eingangs- mit Ausgangstransistor koppelt.In a further preferred embodiment of the present invention Invention is between input and output transistor provided a low-pass filter of the current mirror, which input coupled with output transistor.

Mit einem Tiefpaßfilter im Stromspiegel, welches bevorzugt zwischen jeweilige Steueranschlüsse der Stromspiegeltransistoren geschaltet ist, ist eine weitere Verringerung des Rauschens der vorliegenden Multipliziererschaltung erzielt.With a low-pass filter in the current mirror, which is preferred between respective control terminals of the current mirror transistors is switched, is a further reduction of noise achieved the present multiplier circuit.

In einer weiteren, bevorzugten Ausführungsform der vorliegenden Erfindung ist die Multipliziererschaltung zur Verarbeitung differentieller Signale ausgebildet.In a further preferred embodiment of the present invention Invention is the multiplier circuit for processing formed differential signals.

Weitere Einzelheiten und Ausführungsformen der Erfindung sind Gegenstand der Unteransprüche.Further details and embodiments of the invention are Subject of the dependent claims.

Die Erfindung wird nachfolgend an mehreren Ausführungsbeispielen anhand der Zeichnungen näher erläutert.The invention will be described below in several embodiments explained in more detail with reference to the drawings.

Es zeigen:

Figur 1
ein erstes Ausführungsbeispiel der vorliegenden Erfindung mit einem Tiefpaßfilter als Stromquelle,
Figur 2
ein zweites Ausführungsbeispiel der Erfindung anhand eines vereinfachten Schaltbildes mit spannungsgesteuerter Stromquelle,
Figur 3
eine Weiterbildung der Ausführungsform gemäß Figur 2 und
Figur 4
ein Anwendungsbeispiel der Multipliziererschaltungen gemäß Figuren 1 bis 3 in einem Modulator eines Mobilfunksenders anhand eines vereinfachten Blockschaltbilds.
Show it:
FIG. 1
A first embodiment of the present invention with a low-pass filter as the power source,
FIG. 2
A second embodiment of the invention with reference to a simplified circuit diagram with voltage-controlled current source,
FIG. 3
a development of the embodiment according to Figure 2 and
FIG. 4
an application example of the multiplier circuits according to figures 1 to 3 in a modulator of a mobile radio transmitter based on a simplified block diagram.

Figur 1 zeigt eine Multipliziererschaltung mit einem zum Zuführen eines differentiellen Signals ausgebildeten ersten Eingang 1, 2, dem bevorzugt ein von einem Oszillator bereitgestelltes Lokaloszillator-Signal mit einer zu modulierenden Trägerfrequenz zuführbar ist. Der erste Eingang 1, 2 ist mit je einem Steuereingang je eines Transistors 3, 4, 5, 6 verbunden, wobei jeweils zwei Transistoren 3, 4; 5, 6 paarweise miteinander verschaltet sind. Hierfür sind je ein Lastanschluß der Transistoren 3, 4, welche ein erstes Transistorpaar bilden, sowie je ein Lastanschluß der Transistoren 5, 6, welche ein zweites Transistorpaar bilden, miteinander zur Bildung je eines Stromeingangs 7, 8 verbunden. Weiterhin weisen die gesteuerten Strecken der Transistoren 3 bis 6, welche im vorliegenden Ausführungsbeispiel als FeldeffektTransistoren ausgebildet sind, je einen weiteren Lastanschluß auf, wobei die weiteren Lastanschlüsse der Transistoren der Transistorpaare miteinander zur Bildung eines Hochfrequenzausgangs 9, 10 der Multipliziererschaltung verschaltet sind. Der Hochfrequenz-Ausgang 9, 10 ist zum Bereitstellen differentieller Ausgangssignale ausgebildet.Figure 1 shows a multiplier circuit with one for feeding a differential signal formed first Input 1, 2, the preferred one provided by an oscillator Local oscillator signal with one to be modulated Carrier frequency can be fed. The first input 1, 2 is with each connected to a control input of each of a transistor 3, 4, 5, 6, in each case two transistors 3, 4; 5, 6 pairs interconnected with each other. For this are ever a load connection the transistors 3, 4, which a first transistor pair form, and depending on a load terminal of the transistors 5, 6, which form a second transistor pair, to each other Formation of each current input 7, 8 connected. Continue to point the controlled paths of the transistors 3 to 6, which in the present embodiment as field effect transistors are formed, depending on a further load connection on, wherein the further load terminals of the transistors of the Transistor pairs together to form a high frequency output 9, 10 of the multiplier circuit interconnected are. The high frequency output 9, 10 is for providing formed differential output signals.

Der Stromeingang 7, 8 der Transistorpaare 3, 4; 5, 6 ist über je einen Stromspiegel 11, 12; 13, 14 mit einem zweiten Eingang 15, 16 zum Zuführen eines zweiten, zu multiplizierenden Eingangssignals verbunden. Die Stromspiegel 11, 12; 13, 14 umfassen jeweils einen als Diode geschalteten Eingangs-Stromspiegeltransistor 11, 13 sowie einen Ausgangstransistor 12, 14, der mit seinem Steuereingang an den Steuereingang des Eingangsstromspiegeltransistors 11, 13 angeschlossen ist. Die Stromspiegeltransistoren 11 bis 14 sind mit einem Bezugspotentialanschluß 17 über je einen Lastanschluß gekoppelt.The current input 7, 8 of the transistor pairs 3, 4; 5, 6 is over each a current mirror 11, 12; 13, 14 with a second entrance 15, 16 for supplying a second, to be multiplied Input signal connected. The current mirrors 11, 12; 13, 14 each comprise a diode-connected input current mirror transistor 11, 13 and an output transistor 12, 14, with its control input to the control input of the Input current mirror transistor 11, 13 is connected. The Current mirror transistors 11 to 14 are connected to a reference potential terminal 17 coupled via one load connection.

Als Stromquelle zum Speisen der Stromspiegel 11 bis 14 dient die Ausgangsstufe eines Tiefpaßfilters 18, welches mit seinem Ausgang zum Führen differentieller Signale an den zweiten Eingang 15, 16 der Multipliziererschaltung angeschlossen ist. Dem Tiefpaßfilter 18 ist ein Digital/Analog-Konverter 19 vorgeschaltet, welcher die üblicherweise als digitale Signale vorliegenden, zu sendenden Nutzsignale oder Komponenten dieser zu sendenden Nutzsignale, welche beispielsweise aus einer Basisbandverarbeitungskette zuführbar sind, in analoge Signale umwandelt. Unter anderem bei der Digital/Analog-Wandlung können unerwünschte Spektralanteile entstehen, welche vor einem Frequenzmischen des Nutzsignals mit einem Lokaloszillatorsignal mit einer Trägerfrequenz mit Tiefpaßfilter 18 herausgefiltert werden können.As a power source for supplying the current mirror 11 to 14 is used the output stage of a low-pass filter 18, which with his Output for carrying differential signals to the second Input 15, 16 of the multiplier circuit is connected. The low-pass filter 18 is preceded by a digital / analog converter 19, which are usually called digital signals present, to be sent useful signals or components thereof to be sent useful signals, which for example from a Baseband processing chain are fed into analog signals transforms. Among other things in the digital / analog conversion can arise unwanted spectral components, which before a Frequency mixing of the useful signal with a local oscillator signal filtered out with a carrier frequency with low-pass filter 18 can be.

Mit den Stromspiegeltransistoren 11 bis 14 kann eine gewünschte Stromverstärkung durch Einstellen des Übersetzungsverhältnisses der Stromspiegel durch geeignete Einstellung des Kanalweiten- zu Kanallängenverhältnisses der Transistoren erzielt werden. Die Transistorpaare 3 bis 6, welche im vorliegenden Ausführungsbeispiel als Quadraturmodulatoren arbeiten, sind geschaltet betrieben.With the current mirror transistors 11 to 14, a desired Current gain by setting the gear ratio the current mirror by appropriate adjustment the channel width to channel length ratio of the transistors be achieved. The transistor pairs 3 to 6, which in the present Embodiment work as quadrature modulators, are operated switched.

Da der üblicherweise bei Gilbert-Mischern vorgesehene Differenzverstärker zum Zuführen des zweiten Eingangssignals bei vorliegender Schaltung entfallen und durch Stromquellen mit deutlich höherer Linearität ersetzt werden kann, arbeitet die vorliegende Multipliziererschaltung mit deutlich geringerem Strombedarf. Zudem sind deren Rauscheigenschaften verbessert. Since the usual provided with Gilbert mixers differential amplifier for supplying the second input signal This circuit omitted and by power sources with significantly higher linearity can be replaced, the works present multiplier circuit with significantly lower Power requirements. In addition, their noise properties are improved.

Figur 2 zeigt ein weiteres Ausführungsbeispiel der vorliegenden Multipliziererschaltung. Dabei ist an dem zweiten Eingang 15, 16 zur Bereitstellung einer Stromquelle für die Stromspiegeltranistoren 11 bis 14 anstelle des gemäß Figur 1 vorgesehenen Tiefpaßfilters 18 in Figur 2 je ein mit einem Operationsverstärker gebildeter Spannungs-/Strom-wandler vorgesehen. Der Aufbau der Multipliziererschaltung zwischen erstem Eingang 1, 2, zweitem Eingang 15, 16 und Ausgang 9, 10 entspricht in Verschaltung und Funktion dem bereits für Figur 1 erläuterten und soll deshalb an dieser Stelle nicht noch einmal wiederholt werden. An den zweiten Eingang 15, 16 ist je ein von einem zugeordneten Operationsverstärker 20, 21 angesteuerter Transistor 22, 23 mit je einem Lastanschluß angeschlossen. Je ein weiterer Lastanschluß der vom Operationsverstärker 20, 21 angesteuerten Transistoren 22, 23 ist über einen Widerstand 24 mit einem Bezugspotentialanschluss 25 verbunden. Die Widerstände 24 arbeiten als Stromquelle und dienen jeweils zum Einstellen des von den Stromspiegeln 11 bis 13 zu verstärkenden Stroms. An den nicht-invertierenden Eingängen der Operationsverstärker 20, 21, die einen Eingang zum Zuführen eines differentiellen Spannungssignal bilden, der mit Bezugszeichen 26, 27 versehen ist, ist beispielsweise ein symmetrisches Inphase- oder ein symmetrisches Quadratursignal in einem Mobilfunksender zuführbar. Die invertierenden Eingänge der Operationsverstärker 20, 21 sind jeweils zur Bildung einer Rückkopplung mit demjenigen Lastanschluß des Transistors 22, 23 verbunden, der an den Widerstand 24, 25 angeschlossen ist.FIG. 2 shows a further embodiment of the present invention Multiplier. It is at the second entrance 15, 16 for providing a current source for the current mirror transistors 11 to 14 instead of that provided in accordance with Figure 1 Low-pass filter 18 in Figure 2 each one with an operational amplifier formed voltage / current converter provided. The construction of the multiplier circuit between the first Input 1, 2, second input 15, 16 and output 9, 10 corresponds in interconnection and function that already for Figure 1 explained and should therefore not at this point again be repeated. At the second input 15, 16 is ever one driven by an associated operational amplifier 20, 21 Transistor 22, 23 each connected to a load terminal. Depending on a further load connection of the operational amplifier 20, 21 driven transistors 22, 23 is over a resistor 24 with a reference potential terminal 25th connected. The resistors 24 operate as a power source and each serve to adjust the of the current mirrors 11th to 13 to be amplified electricity. At the non-inverting Inputs of the operational amplifiers 20, 21, which have an input for supplying a differential voltage signal, which is provided with reference numerals 26, 27, for example a symmetric in-phase or a balanced quadrature signal can be fed in a mobile radio transmitter. The inverting Inputs of the operational amplifiers 20, 21 are each for Forming a feedback with the load terminal of the Transistors 22, 23 connected to the resistor 24, 25 connected.

Mit den Stromquellen 24 und den Transistoren 22, 23, welche von den Operationsverstärkern 20, 21 angesteuert sind, ist eine spannungsgesteuerte Stromquelle, das heißt eine Spannungs-/Strom-Konversion bereitgestellt, welche gegenüber den bei Gilbert-Multiplizierern ohnehin vorgesehenen Spannungseingängen mit nachgeschaltetem Differenzverstärker den Vorteil hat, daß die Linearitäts-, Rausch- und Strombedarfseigenschaften des Multiplizierers verbessert sind. With the current sources 24 and the transistors 22, 23, which are driven by the operational amplifiers 20, 21, is a voltage controlled current source, that is, a voltage / current conversion provided, which in relation to the in Gilbert multipliers anyway provided voltage inputs with downstream differential amplifier the advantage has the linearity, noise and power requirements of the multiplier are improved.

Figur 3 zeigt eine Weiterbildung der Multipliziererschaltung mit Spannungs-/Strom-Konversion gemäß Figur 2 in einer Realisierung der Operationsverstärker zur Spannungs-/Strom-Wandlung sowie der übrigen Schaltung mit MOS-Feldeffekttransistoren. Aufbau und Funktion der Multipliziererschaltung zwischen erstem Eingang 1, 2, Ausgang 9, 10, Transistorpaaren 3 bis 6, sowie Stromeingang 15, 16 entsprechen dabei abgesehen von der Realisierung in MOS-Schaltungstechnik den Ausführungsbeispielen gemäß Figuren 1 und 2 und sollen daher an dieser Stelle nicht noch einmal wiederholt werden. In den Stromspiegelzweigen 11 bis 14 ist eine Weiterbildung dahingehend vorgesehen, daß zwischen Eingangsstromspiegeltransistoren 11, 13 und Ausgangsstromspiegeltransistoren 12, 14 jeweils ein RC-Glied als Tiefpaßfilter zwischengeschaltet ist mit einem Serienwiderstand 28 und einer gegen Bezugspotentialanschluß 17 dem widerstand 28 nachgeschalteten Kapazität 30.FIG. 3 shows a development of the multiplier circuit with voltage / current conversion according to Figure 2 in a realization the operational amplifier for voltage / current conversion and the rest of the circuit with MOS field effect transistors. Structure and function of the multiplier circuit between first input 1, 2, output 9, 10, transistor pairs 3 to 6, as well as current input 15, 16 correspond to it apart from the Realization in MOS circuit technology the embodiments according to Figures 1 and 2 and are therefore intended at this point not be repeated again. In the current mirror branches 11 to 14 a development is provided to that between input current mirror transistors 11, 13 and output current mirror transistors 12, 14 each have an RC element as Low pass filter is interposed with a series resistor 28 and a reference potential terminal 17 to the resistance 28 downstream capacity 30.

Die Spannungs-/Strom-Wandler mit dem Spannungseingang 26, 27, den Operationsverstärkern 20, 21, den Stromquellenwiderständen 24, die an eine Versorgungsspannungsquelle 25 angeschlossen sind sowie den von den Operationsverstärkern 20, 21 angesteuerten Transistoren 22, 23 entsprechen in Aufbau und Funktion den bereits in Figur 2 erläuterten Wandlern und werden deshalb an dieser Stelle nicht noch einmal erläutert. Im Unterschied zu Figur 2 ist in Figur 3 jedoch eine Ausführung der in Figur 2 schematisch dargestellten Operationsverstärker 20, 21 mit MOS-Feldeffekttransistoren dargestellt. Diese weisen jeweils einen den +Eingang bildenden Eingangstransistor 28, 29 auf, dessen Steuereingang jeweils mit dem nicht-invertierenden Eingang 26, 27 des Operationsverstärkers 20, 21 verbunden ist und der jeweils mit einem seiner Lastanschlüsse mit dem Lastanschluß eines den -Eingang des Operationsverstärkers bildenden Transistors 30, 31 verbunden ist, der gemäß Figur 3 an den Knoten zwischen Stromquellenwiderstand 24 und vom Operationsverstärker angesteuerten Transistoren 22, 23 angeschlossen ist. Ein bezugspotentialseitiger, gemeinsamer Lastanschlußknoten der Transistoren 28, 30; 27, 29 ist über je einen Stromspiegel 32, 33; 34, 35 mit je einem Anschluß zur Zuführung eines Referenzstroms 36, 37 verbunden. Die weiteren, versorgungspotentialseitigen Lastanschlüsse der Operationsverstärker-Eingangstransistoren 28, 30; 29, 31 sind über je einen weiteren Stromspiegel 38, 39 beziehungsweise 40, 41 miteinander und mit Versorgungsspannungsanschluß 25 verbunden.The voltage / current converters with the voltage input 26, 27, the operational amplifiers 20, 21, the power source resistors 24, which is connected to a supply voltage source 25 are as well as the driven by the operational amplifiers 20, 21 Transistors 22, 23 correspond in construction and function already explained in Figure 2 converters and therefore not explained again at this point. In difference however, FIG. 2 shows an embodiment in FIG the operational amplifier shown schematically in Figure 2 20, 21 shown with MOS field effect transistors. These wise one input transistor each forming the + input 28, 29, whose control input respectively to the non-inverting Input 26, 27 of the operational amplifier 20, 21 is connected and each with one of its load terminals with the load terminal of the input of the operational amplifier forming transistor 30, 31 is connected, the according to Figure 3 at the node between power source resistance 24 and driven by the operational amplifier transistors 22, 23 is connected. A reference potential side, common load connection node of the transistors 28, 30; 27 29 is each a current mirror 32, 33; 34, 35 with one each Connected to the supply of a reference current 36, 37. The other, supply potential side load connections of Operational amplifier input transistors 28, 30; 29, 31 are via a respective further current mirror 38, 39 or 40, 41 with each other and with supply voltage terminal 25th connected.

Die zusätzlichen Tiefpaßfilter 29, 30 in den Stromspiegeln 11, 12; 13, 14 führen vorteilhafterweise zu einer weiteren Verbesserung der Rauscheigenschaften der Multipliziererschaltung.The additional low-pass filters 29, 30 in the current mirrors 11, 12; 13, 14 lead advantageously to another Improvement of the noise characteristics of the multiplier circuit.

Figur 4 schließlich zeigt die Anwendung je einer erfindungsgemäßen Multipliziererschaltung 42, 43 jeweils in einem Inphase- und einem Quadratur-Zweig I, Q einer Sendeanordnung mit komplexwertiger Signalverarbeitung.Finally, FIG. 4 shows the application per one of the invention Multiplier circuit 42, 43 each in an inphase and a quadrature branch I, Q of a transmission arrangement with complex-valued signal processing.

Dabei umfaßt die Sendeanordnung einen Basisband-Baustein 44, mit einem Block zur digitalen Signalverarbeitung 45, der digitale, zu sendende Basisbandsignale komplexwertig, das heißt zerlegt in eine Inphase- und eine Quadraturkomponente I, Q, bereitstellt. Zur Verarbeitung des komplexwertigen, digitalen Signals ist ein Tiefpaßfilter 47 jeweils an je einen im Inphase- und Quadratur-Zweig I, Q vorgesehenen Digital/Analog-Konverter 48 angeschlossen. Die Tiefpaßfilter 47 sind mit ihren Ausgängen wiederum an die Nutzsignaleingänge der Mischer 42, 43 angeschlossen. Die Frequenzmischer 42, 43 sind zur Bildung eines Vektormodulators mit jeweils einem weiteren Eingang, dem Lokaloszillator-Eingang, über einen gemeinsamen Frequenzteiler 49 an einen spannungsgesteuerten Oszillator 50 angeschlossen, der das Lokaloszillatorsignal bereitstellt. Ausgangsseitig sind die Multiplizierer 42, 43 mit einem gemeinsamen Summierknoten 51 zum Aufsummieren der hochfrequenten Ausgangssignale der Multipliziererschaltungen 42, 43 verknüpft, wobei der Summierknoten 51 ein beispielsweise über eine nicht eingezeichnete Antenne zu sendendes, hochfrequentes Signal bereitstellt.In this case, the transmission arrangement comprises a baseband module 44, with a block for digital signal processing 45, the digital, Baseband signals to be transmitted are of complex value, that is divided into an in-phase and a quadrature component I, Q, provides. To process the complex-valued, digital Signal is a low-pass filter 47 in each case in each case in the inphase and quadrature branch I, Q provided digital to analog converter 48 connected. The low pass filter 47 are with their Outputs in turn to the useful signal inputs of the mixer 42, 43 connected. The frequency mixer 42, 43 are for Formation of a vector modulator, each with a further Input, the local oscillator input, via a common Frequency divider 49 to a voltage controlled oscillator 50th connected, which provides the local oscillator signal. On the output side, the multipliers 42, 43 are common Summing node 51 for summing the high-frequency Output signals of the multiplier circuits 42, 43 linked, wherein the summing node 51, for example via a not shown antenna to be transmitted, high-frequency Signal provides.

Da mit der erfindungsgemäßen Multipliziererschaltung, die auf den Differenzverstärker einer üblichen Gilbert-Zelle verzichtet, deutlich verbesserte Rauscheigenschaften der Multiplizierer erzielt sind, weist das am Summierknoten 51 ausgangsseitig bereitgestellte Hochfrequenzsignal ein besonders großes Signal-Rausch-Verhältnis auf. Zudem kann aufgrund des verringerten Strombedarfs der angegebenen Multiplizierer 42, 43 eine längere Batterie- oder Akkumulatorbetriebsdauer zwischen zwei Aufladezyklen bei Anwendung der Multiplizierer in Mobilfunk-Sendern in Mobilstationen erzielt werden. As with the multiplier circuit according to the invention, which dispenses with the differential amplifier of a conventional Gilbert cell, significantly improved noise characteristics of the multipliers are achieved, the output at the summing node 51 has provided high-frequency signal a particularly large Signal-to-noise ratio on. In addition, due to the reduced power consumption of the indicated multipliers 42, 43 a longer battery or Akkumulatorbetriebsdauer between two charging cycles when using the multipliers in Mobile stations are achieved in mobile stations.

BezugszeichenlisteLIST OF REFERENCE NUMBERS

11
erster Eingangfirst entrance
22
erster Eingangfirst entrance
33
Transistortransistor
44
Transistortransistor
55
Transistortransistor
66
Transistortransistor
77
Stromeingangcurrent input
88th
Stromeingangcurrent input
99
Ausgangoutput
1010
Ausgangoutput
1111
Stromspiegelcurrent mirror
1212
Stromspiegelcurrent mirror
1313
Stromspiegelcurrent mirror
1414
Stromspiegelcurrent mirror
1515
zweiter Eingangsecond entrance
1616
zweiter Eingangsecond entrance
1717
BezugspotentialanschlußReference potential connection
1818
Tiefpaßfilterlow pass filter
1919
DA-WandlerDA converter
2020
Operationsverstärkeroperational amplifiers
2121
Operationsverstärkeroperational amplifiers
2222
Transistortransistor
2323
Transistortransistor
2424
Widerstandresistance
2525
VersorgungspotentialanschlußSupply potential connection
2626
Spannungseingangvoltage input
2727
Spannungseingangvoltage input
2828
Transistortransistor
2929
Transistortransistor
3030
Transistortransistor
3131
Transistortransistor
3232
Stromspiegelcurrent mirror
3333
Stromspiegelcurrent mirror
3434
Stromspiegelcurrent mirror
3535
Stromspiegel current mirror
3636
ReferenzstromeingangReference current input
3737
ReferenzstromeingangReference current input
3838
Stromspiegelcurrent mirror
3939
Stromspiegelcurrent mirror
4040
Stromspiegelcurrent mirror
4141
Stromspiegelcurrent mirror
4242
Multiplizierermultipliers
4343
Multiplizierermultipliers
4444
BasisbandbausteinBaseband module
4545
digitale Signalverarbeitungdigital signal processing
4747
Tiefpaßlowpass
4848
DA-WandlerDA converter
4949
Frequenzteilerfrequency divider
5050
VCOVCO
5151
Summierknotensumming
II
Inphase-SignalpfadIn-phase signal path
QQ
Quadratur-SignalpfadQuadrature signal path

Claims (7)

  1. A multiplier circuit, having
    a first input (1, 2) for feeding in a first input signal,
    a second input (15, 16) designed for feeding in a second input signal in the form of a current signal,
    an output (9, 10) for providing an output signal derived from the first and second input signal,
    a first and a second transistor pair (3, 4; 5, 6) having control inputs coupled to the first input (1, 2), and having controlled paths which, on the one hand, are coupled to the output (9, 10) of the multiplier circuit and, on the other hand, form a respective current input (7, 8), the multiplier circuit being designed to process differential signals, characterized by
    at least one current mirror (11, 12), which is coupled, on the output side, to a respective current input (7, 8) of a transistor pair (3, 4; 5, 6) and, on the input side, to the second input of the multiplier circuit (15, 16).
  2. The multiplier circuit according to Claim 1,
    characterized in that
    provision is made of a filter circuit (18) for filtering the second input signal that can be fed to the second input (15, 16) of the multiplier circuit, having a current output connected to the input of the at least one current mirror (11, 12).
  3. The multiplier circuit according to Claim 2,
    characterized in that
    the filter circuit (18) comprises a low-pass filter with a current source on the output side.
  4. The multiplier circuit according to Claim 1,
    characterized in that
    a voltage-controlled current source (20, 22) is provided, having a current output coupled to the input of the at least one current mirror (11, 12).
  5. The multiplier circuit according to one of Claims 1 to 4,
    characterized in that
    the at least one current mirror (11, 12) has an input transistor (11) connected as a diode, the control terminal of which input transistor is coupled to a control terminal of an output transistor (12) of the current mirror (11, 12).
  6. The multiplier circuit according to Claim 5,
    characterized in that
    a low-pass filter (29, 30) is provided, having an input coupled to the input transistor (11) and having an output coupled to the output transistor (12) of the at least one current mirror (11, 12).
  7. The multiplier circuit according to either of Claims 5 or 6,
    characterized in that
    the input transistor (11) and the output transistor (12) are directly connected to a reference potential (17) by a respective terminal of their controlled paths.
EP02752994A 2001-07-06 2002-07-03 Multiplier circuit Expired - Lifetime EP1405413B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10132802A DE10132802A1 (en) 2001-07-06 2001-07-06 Multiplier circuit for processing differential signals, e.g. for use in mobile phone systems, is suitable for use in vector modulators, has a simple design and improved noise properties
DE10132802 2001-07-06
PCT/DE2002/002427 WO2003005582A2 (en) 2001-07-06 2002-07-03 Multiplier circuit

Publications (2)

Publication Number Publication Date
EP1405413A2 EP1405413A2 (en) 2004-04-07
EP1405413B1 true EP1405413B1 (en) 2005-02-02

Family

ID=7690837

Family Applications (1)

Application Number Title Priority Date Filing Date
EP02752994A Expired - Lifetime EP1405413B1 (en) 2001-07-06 2002-07-03 Multiplier circuit

Country Status (4)

Country Link
US (1) US20040174199A1 (en)
EP (1) EP1405413B1 (en)
DE (2) DE10132802A1 (en)
WO (1) WO2003005582A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101989835B (en) * 2009-07-30 2013-04-03 晨星软件研发(深圳)有限公司 Signal processing circuit

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003016379A (en) * 2001-06-29 2003-01-17 A&Cmos Communication Device Inc Analog multiplying circuit
DE10334805B4 (en) * 2003-07-30 2005-07-07 Fachhochschule Karlsruhe-Hochschule für Technik, Anstalt des öffentlichen Rechts Analog multiplier circuit
DE10351606B3 (en) * 2003-11-05 2005-05-25 Infineon Technologies Ag High frequency mixer arrangement, e.g. for use in vector modulation, has capacitance(s) in feedback path between differential amplifier output, input of operational amplifier, which is configured as anti-aliasing filter
US7049882B2 (en) * 2004-02-03 2006-05-23 Broadcom Corporation Transmitter IF section and method enabling IF output signal amplitude that is less sensitive to process, voltage, and temperature
US7221300B2 (en) * 2004-05-21 2007-05-22 Texas Instruments Incorporated Digital-to-analog converter data rate reduction by interleaving and recombination through mixer switching
DE102005005332A1 (en) * 2005-01-28 2006-08-10 Atmel Germany Gmbh Mixing stage and method for mixing signals of different frequencies
TWI326965B (en) * 2007-01-30 2010-07-01 Mstar Semiconductor Inc Mixer
US8344803B2 (en) * 2007-11-09 2013-01-01 Hittite Microwave Norway As Variable gain amplifier
EP2218176B1 (en) * 2007-11-12 2013-07-03 Hittite Microwave Norway AS Low noise amplifier
WO2009141696A1 (en) * 2008-05-19 2009-11-26 Artic Silicon Devices, As Multiple input variable gain amplifier
CN101873102A (en) * 2010-04-30 2010-10-27 北京利云技术开发公司 Up-conversion frequency mixer with high linearity and suitable for low-voltage work
GB2539457A (en) * 2015-06-16 2016-12-21 Nordic Semiconductor Asa Voltage regulators
US10700640B2 (en) * 2018-06-11 2020-06-30 The Regents Of The University Of California Harmonic-based nonlinearity factorization scheme to facilitate up-conversion mixer linearity
US10852182B2 (en) * 2018-06-29 2020-12-01 Osram Opto Semiconductors Gmbh Ambient light detector, detector array and method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3835499A1 (en) * 1988-10-19 1990-04-26 Philips Patentverwaltung CIRCUIT ARRANGEMENT FOR ADJUSTING THE AMPLITUDE OF A SIGNAL
JP3300534B2 (en) * 1993-09-13 2002-07-08 株式会社東芝 Electronic circuit
JP2891297B2 (en) * 1996-09-30 1999-05-17 日本電気株式会社 Voltage-current converter
FR2769388B1 (en) * 1997-10-07 2001-08-03 Korea Telecomm Authority NEURONAL NETWORK MULTIPLIER AND SYNAPSE USING A CURRENT MIRROR HAVING LOW POWER MOS FIELD EFFECT TRANSISTORS
FI107656B (en) * 1998-10-30 2001-09-14 Nokia Mobile Phones Ltd Low pass filter in a transmitter and a mobile station
JP2001344559A (en) * 2000-05-30 2001-12-14 Matsushita Electric Ind Co Ltd Analog multiplying circuit and variable gain amplifier circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101989835B (en) * 2009-07-30 2013-04-03 晨星软件研发(深圳)有限公司 Signal processing circuit

Also Published As

Publication number Publication date
WO2003005582A2 (en) 2003-01-16
EP1405413A2 (en) 2004-04-07
DE10132802A1 (en) 2002-11-14
DE50202182D1 (en) 2005-03-10
US20040174199A1 (en) 2004-09-09
WO2003005582A3 (en) 2003-03-13

Similar Documents

Publication Publication Date Title
EP1405413B1 (en) Multiplier circuit
DE4420447C2 (en) Phase shifter circuit and quadrature network
DE4126080C2 (en) Mixer system for a direct implementation recipient
DE69834875T2 (en) FREQUENCY CIRCUIT IMPLEMENTATION
DE10351606B3 (en) High frequency mixer arrangement, e.g. for use in vector modulation, has capacitance(s) in feedback path between differential amplifier output, input of operational amplifier, which is configured as anti-aliasing filter
DE69934020T2 (en) PLL-CIRCUIT AND RADIO COMMUNICATION TRANSMITTER WITH A PHASE RULE LOOP
DE69623292T2 (en) BIPOLAR ANALOG MULTIPLIER FOR LOW VOLTAGE APPLICATIONS
EP0341531A2 (en) Controllable wide band amplifier
DE3875713T2 (en) OSCILLATOR CIRCUIT AND SQUARE NETWORK FOR RADIO RECEIVERS.
DE10245609B4 (en) mixing device
DE69802158T2 (en) Double push-pull modulator and four-phase modulation device
EP1481487B1 (en) Transmission system
EP1407543A2 (en) Power-controlled transmitter arrangement
DE10344876B3 (en) Signal processing device, in particular for mobile communications
EP1119903A1 (en) Circuit for mixing an input signal and an oscillator signal with each other
DE3412191A1 (en) Integrable receiver circuit
DE10210708B4 (en) Mobile device with a circuit arrangement for frequency conversion
EP1407416B1 (en) Multiplier circuit
DE2646035A1 (en) Amplifier for AC voltages - has supply voltage which is switchable, so that amplifier can amplify in either direction
DE69509287T2 (en) Oscillator, synthesizer tuning circuit and AM synchronous detector circuit using the oscillator
EP1527524A1 (en) Transmission arrangement, especially for mobile telephony
DE2105431C3 (en) Reinforcing double push-pull mixer stage
EP1421677B1 (en) Transmitter system, especially for cellular telephony
DE102004002826B4 (en) Circuit for changing a frequency
DE3412190A1 (en) Integrable receiver circuit

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20040123

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LI LU MC NL PT SE SK TR

RIC1 Information provided on ipc code assigned before grant

Ipc: 7H 03J 1/00 B

Ipc: 7G 06F 7/52 A

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB

RBV Designated contracting states (corrected)

Designated state(s): DE FR GB

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

Free format text: GERMAN

REF Corresponds to:

Ref document number: 50202182

Country of ref document: DE

Date of ref document: 20050310

Kind code of ref document: P

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 20050412

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20050712

Year of fee payment: 4

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20050913

Year of fee payment: 4

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

ET Fr: translation filed
26N No opposition filed

Effective date: 20051103

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20060703

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20070201

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20060703

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20070330

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20060731