Classifications

• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B32—LAYERED PRODUCTS
  • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
  • B32B9/00—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00
  • B32B9/04—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00 comprising such particular substance as the main or only constituent of a layer, which is next to another layer of the same or of a different material
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
  • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
  • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
  • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
  • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
  • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
  • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
  • H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
  • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
  • H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
  • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
  • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
  • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
  • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
  • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
  • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/03—Use of materials for the substrate
  • H05K1/0313—Organic insulating material

Definitions

• the field of the invention is semiconductor and electronic materials, components and applications. More specifically, the field of the invention is layered materials and components for semiconductor and electronic applications.
• Insulator materials having low dielectric constants are especially desirable, because they typically allow faster signal propagation, reduce capacitive effects and cross talk between conductor lines, and lower voltages to drive integrated circuits.
• One way of achieving low dielectric constants in the insulator material is to employ materials with inherently low dielectric constants.
• materials with inherently low dielectric constants Two different classes of low dielectric constant materials have been employed in recent years - inorganic oxides and organic polymers.
• Inorganic oxides which may be applied by chemical vapor deposition or spin-on techniques, have dielectric constants between about 3 and 4, and have been widely used in interconnects with design rule larger than 0.25 ⁇ m.
• materials with even lower dielectric constant become more desirable.
• One problem with incorporating low dielectric constant materials with other materials is that the effective dielectric constant of the component can increase if the dielectric constant of the other materials is measurably higher than that of the low dielectric constant materials.
• the dielectric layer may be applied by spinning the dielectric material onto a surface or substrate, and then an additional layer, such as a hardmask layer or etch stop layer, may be applied by a chemical vapor deposition (CVD) process.
• CVD chemical vapor deposition
• low dielectric constant layered materials In order to produce low dielectric constant layered materials that are relatively easy to make and cost efficient, individual layers will be spun-on to either a surface or another layer (or layers) that has (have) been previously spun-on to a surface. Generally, it is desirable that all of the low dielectric constant layers of a particular layered material or layered component be applied by spinning a material or materials on to a surface or substrate. It is further desirable that all of the layers of the component be applied by spinning the materials onto the component, but there may be an additional layer or layers that are applied by other means. For the most part, the low dielectric constant layered component will have at least two low dielectric constant layers that have been spun-on to become part of the component, regardless of any other additional layers or materials that are applied.
• Low dielectric constant layered materials and components are described herein that include a) a surface or substrate; b) at least one spin-on dielectric layer coupled to the surface; and c) at least one additional spin-on low dielectric constant layer coupled to the at least one spin-on dielectric layer.
• a barrier/Cu seed layer can also be added to this all-spin on scheme, along with the copper or metal via fill.
• the at least one additional spin-on low dielectric constant layer may comprise at least one spin-on stop layer and/or at least one spin-on cap layer. It is further contemplated that the at least one additional spin-on low dielectric constant layer comprises two or more layers or at least two additional spin-on layers.
• Methods of producing a low dielectric constant layered component include: a) providing a surface; b) spinning a dielectric material on to the surface; c) curing the dielectric material to form a dielectric layer; d) spinning a low dielectric constant material on to the dielectric layer; and e) curing the low dielectric constant material to form a low dielectric constant layer.
• Each layer can be spun-on to the layered component and subsequently cured before additional layers are added or all layers can be spun-on to the layered component and then the entire stack is cured at one time.
• Fig. 1 shows a prior art configuration of a layered stack/component.
• Fig. 2 shows a preferred embodiment of a layered component.
• Fig. 3 A shows a prior art method of producing a layered stack/component.
• Fig. 3B shows a preferred method of producing a layered stack/component.
• Fig. 4 shows a graphical depiction of the reproducibility of a TEL ACT 12 Coater.
• Fig. 5 shows a schematic depiction of several preferred stacked low-k strategies.
• Fig. 6 shows a graphical and table depiction of the k eff of two-layer stacks.
• Fig. 7 shows a preferred dual damascene setup along with graphical and table information related to the setup.
• Fig. 8 shows a schematic of a preferred manufacturing setup.
• the individual layers will be spun-on to either a surface or another layer (or layers) that has (have) been previously spun-on to a surface.
• the low dielectric constant layered component will have at least two low dielectric constant layers that have been spun-on to become part of the component, regardless of any other additional layers or materials that are applied.
• Prior Art Figure 1 shows a standard interlayer/interline dielectric (ILD) integration scheme (10) that combines chemical vapor deposition (CND) dielectrics as etch stops (15) and cap layers (25) with spin on low dielectric constant (low-k) dielectric materials (20).
• the interlayer dielectric (10) is integrated with a dielectric layer (30), a CVD barrier layer (40), a barrier/Cu seed layer (50) and a copper or metal via fill (60). All of these additional components may or may not be applied by spinning them on to a surface.
• ILD interlayer/interline dielectric
• Low dielectric constant layered materials and components are described herein and shown in Figure 2 that comprise a) a surface or substrate (110) (shown in Figure 2 as the Dielectric/CVD barrier combination); b) at least one spin-on dielectric layer coupled to the surface (120); and c) at least one additional spin-on low dielectric constant layer coupled to the at least one spin-on dielectric layer (130).
• a barrier/Cu seed layer (140) can also be added to this all-spin on scheme, along with the copper or metal via fill (150).
• the at least one additional spin-on low dielectric constant layer may comprise at least one spin-on stop layer and/or at least one spin-on cap layer.
• the at least one additional spin-on low dielectric constant layer comprises two or more layers or at least two additional spin-on layers.
• Surfaces contemplated herein may comprise any desirable substantially solid material, such as a substrate, wafer or other suitable surface. Particularly desirable substrate layers would comprise films, glass, ceramic, plastic, metal or coated metal, or composite material.
• the substrate comprises a silicon or germanium arsenide die or wafer surface, a packaging surface such as found in a copper, silver, nickel or gold plated leadframe, a copper surface such as found in a circuit board or package interconnect trace, a via-wall or stiffener interface ("copper” includes considerations of bare copper and it's oxides), a polymer-based packaging or board interface such as found in a polyimide-based flex package, lead or other metal alloy solder ball surface, glass and polymers such as polyimide, BT, and FR4.
• the substrate comprises a material common in the packaging and circuit board industries such as silicon, copper, glass, and another polymer.
• Suitable surfaces contemplated herein may also include another previously formed layered stack, other layered component, or other component altogether.
• An example of this may be where a dielectric material and CVD barrier layer are first laid down as a layered stack - which is considered the "surface" for the subsequently spun-on layered component.
• At least one spin-on dielectric layer is coupled to the surface or substrate.
• the term “coupled” means that the surface and layer or two layers are physically attached to one another or there's a physical attraction between two parts of matter or components, including bond forces such as covalent and ionic bonding, and non-bond forces such as Nan der Waals, electrostatic, coulombic, hydrogen bonding and/or magnetic attraction.
• the term coupled is meant to encompass a situation where the surface and spin-on layer or two spin-on layers are directly attached to one another, but the term is also meant to encompass the situation where the surface and spin-on layer or two spin-on layers are coupled to one another indirectly - such as the case where there's an adhesion promoter layer between the surface and spin-on layer or where there's another layer altogether between the surface and spin-on layer or two spin-on layers.
• the spin-on dielectric layer may comprise any suitable material that meets the following two requirements: a) the dielectric material is capable of being spun-on to a surface or other layer and b) the dielectric material forms a low dielectric constant layer or component after curing or other finishing treatment.
• the term "low dielectric constant” means a dielectric constant of 1 MHz to 2 GHz, unless otherwise inconsistent with context. It is contemplated that the value of the dielectric constant of a low dielectric constant material or layer is less than 3.0. In a preferred embodiment, the value of a low dielectric constant material or layer is less than 2.5. In a more preferred embodiment, the value of a dielectric constant material or layer is less than 2.0.
• Contemplated spin-on low dielectric materials comprise inorganic-based compounds, such as silicon-based, gallium-based, germanium-based, arsenic-based, boron-based compounds or combinations thereof, and organic-based compounds, such as polyethers, polyarylene ethers (such as FLARETM - manufactured by Honeywell Electronic Materials), polyimides, polyesters and adamantane-based or cage-based compounds.
• inorganic-based compounds such as silicon-based, gallium-based, germanium-based, arsenic-based, boron-based compounds or combinations thereof
• organic-based compounds such as polyethers, polyarylene ethers (such as FLARETM - manufactured by Honeywell Electronic Materials), polyimides, polyesters and adamantane-based or cage-based compounds.
• spin-on material As used herein, the phrases “spin-on material”, “spin-on organic material” (where the composition is substantially organic), “spin-on composition” and “spin-on inorganic composition” (where the composition is substantially inorganic) may be used interchangeable and refer to those solutions and compositions that can be spun-on to a substrate or surface. It is further contemplated that the phrase “spin-on-glass materials” refers to a subset of “spin-on inorganic materials”, in that spin-on glass materials refer to those spin-on materials that comprise silicon-based compounds and/or polymers in whole or in part.
• silicon- based compounds comprise siloxane compounds, such as methylsiloxane, methylsilsesquioxane, phenylsiloxane, phenylsilsesquioxane, methylphenylsiloxane, methylphenylsilsesquioxane, silazane polymers, silicate polymers and mixtures thereof.
• a contemplated silazane .polymer is perhydrosilazane, which has a "transparent" polymer backbone where chromophores can be attached.
• An example of a spin-on glass composition is NANOGLASSTM E - a nanoporous silicon-based composition manufactured by Honeywell Electronic Materials.
• SiLKTM manufactured by Dow is another example of a porous silicon- based dielectric material that would be appropriate to use as a spin-on dielectric material.
• spin-on-glass materials also includes siloxane polymers and blockpolymers, hydrogensiloxane polymers of the general formula (Ho- ⁇ .oSiO ⁇ .5-2.o)x and hydrogensilsesquioxane polymers, which have the formula (HSiO ⁇ . s) x , where x is greater than about four. Also included are copolymers of hydrogensilsesquioxane and an alkoxyhydridosiloxane or hydroxyhydridosiloxane. Spin-on glass materials additionally include organohydridosiloxane polymers of the general formula (H 0- ⁇ . 0 SiO ⁇ .5 .
• organohydridosilsesquioxane polymers of the general formula (HSi0 1 . 5 ) n (RSiO ⁇ . 5 ) m , where m is greater than zero and the sum of n and m is greater than about four and R is alkyl or aryl.
• organohydridosiloxane polymers have the sum of n and m from about four to about 5000 where R is a Ct ⁇ o alkyl group or a C 6 -C ⁇ 2 aryl group.
• organohydridosiloxane and organohydridosilsesquioxane polymers are alternatively denoted spin-on-polymers.
• Some specific examples include alkylhydridosiloxanes, such as methylhydridosiloxanes, ethylhydridosiloxanes, propylhydridosiloxanes, t-butylhydridosiloxanes, phenylhydridosiloxanes; and alkylhydridosilsesquioxanes, such as methylhydridosilsesquioxanes, ethylhydridosilsesquioxanes, propylhydridosilsesquioxanes, t-butylhydridosilsequioxanes, phenylhydridosilsesquioxanes, and combinations thereof.
• organohydridosiloxane and organosiloxane resins can be utilized for forming caged siloxane polymer films that are useful in the fabrication of a variety of electronic devices, micro-electronic devices, particularly semiconductor integrated circuits and various layered materials for electronic and semiconductor components, including hardmask layers, dielectric layers, etch stop layers and buried etch stop layers contemplated herein.
• organohydridosiloxane resin layers are quite compatible with other materials that might be used for layered materials and devices, such as adamantane-based compounds, diamantane-based compounds, silicon-core compounds, organic dielectrics, and nanoporous dielectrics.
• Organohydridosiloxane resins utilized herein have the following general formulas:
• R is selected from substituted and unsubstituted, normal and branched alkyls (methyl, ethyl, butyl, propyl, pentyl), alkenyl groups (vinyl, allyl, isopropenyl), cycloalkyls, cycloalkenyl groups, aryls (phenyl groups, benzyl groups, naphthalenyl groups, anthracenyl groups and phenanthrenyl groups), and mixtures thereof; and wherein the specific mole percent of carbon containing substituents is a function of the ratio of the amounts of starting materials.
• LOSP embodiments particularly favorable results are obtained with the mole percent of carbon containing substituents being in the range of between about 15 mole percent to about 25 mole percent. In some HOSP embodiments, favorable results are obtained with the mole percent of carbon containing substituents are in the range of between about 55 mole percent to about 75 mole percent.
• Nanoporous silica dielectric films with dielectric constants ranging from 1.5 to about 3.8 can be also as at least one of the spin-on layers.
• Nanoporous silica compounds contemplated herein are those compounds found in US Issued Patents: 6,022,812; 6,037,275; 6,042,994; 6,048,804; 6,090,448; 6,126,733; 6,140,254; 6,204,202; 6,208,041; 6,318,124 and 6,3119,855. These types of films are laid down as a silicon-based precursor, aged or condensed in the presence of water and heated sufficiently to remove substantially all of the porogen and to form voids in the film.
• the silicon-based precursor composition comprises monomers or prepolymers that have the formula: R x -Si-L y , wherein R is independently selected from alkyl groups, aryl groups, hydrogen and combinations thereof, L is an electronegative moiety, such as alkoxy, carboxy, amino, amido, halide, isocyanato and combinations thereof, x is an integer ranging from 0 to about 2, and y is an integer ranging from about 2 to about 4.
• cage structure refers to a molecule having at least 10 atoms arranged such that at least one bridge covalently connects two or more atoms of a ring system.
• a cage structure, cage molecule or cage compound comprises a plurality of rings formed by covalently bound atoms, wherein the structure, molecule or compound defines a volume, such that a point located with the volume can not leave the volume without passing through the ring.
• the bridge and/or the ring system may comprise one or more heteroatoms, and may be aromatic, partially saturated, or unsaturated.
• Further contemplated cage structures include fullerenes, and crown ethers having at least one bridge.
• an adamantane or diamantane is considered a cage structure, while a naphthalene or an aromatic spirocom- pound are not considered a cage structure under the scope of this definition, because a naphthalene or an aromatic spirocompound do not have one, or more than one bridge.
• Contemplated cage compounds need not necessarily be limited to being comprised solely of carbon atoms, but may also include heteroatoms such as N, S, O, P, etc. Heteroatoms may advantageously introduce non-tetragonal bond angle configurations.
• substituents and derivatizations of contemplated cage compounds it should be recognized that many substituents and derivatizations are appropriate. For example, where the cage compounds are relatively hydrophobic, hydrophihc substituents may be introduced to increase solubility in hydrophihc solvents, or vice versa. Alternatively, in cases where polarity is desired, polar side groups may be added to the cage compound. It.
• substituents may also include thermolabile groups, nucle- ophilic and electrophilic groups.
• functional groups may be employed in the cage compound (e.g., to facilitate crosslinking reactions, derivatization reactions, etc.) Where the cage compounds are derivatized, it is especially contemplated that derivatizations include halogenation of the cage compound, and a particularly preferred halogen is fluorine.
• Cage molecules or compounds, as described in detail herein, can also be groups that are attached to a polymer backbone, and therefore, can form nanoporous materials where the cage compound forms one type of void (intramolecular) and where the crosslinking of at least one part of the backbone with itself or another backbone can form another type of void (intermolecular). Additional cage molecules, cage compounds and variations of these molecules and compounds are described in detail in PCT/USOl/32569 filed on October 18, 2001, which is herein incorporated by reference in its entirety.
• Contemplated polymers may also comprise a wide range of functional or structural moieties, including aromatic systems, and halogenated groups. Furthermore, appropriate polymers may have many configurations, including a homopolymer, and a heteropolymer. Moreover, alternative polymers may have various forms, such as linear, branched, super- branched, or three-dimensional. The molecular weight of contemplated polymers spans a wide range, typically between 400 Dalton and 400000 Dalton or more.
• organic and inorganic materials described herein are similar in some respects to those which are described in U.S. Pat. No. 5,874,516 to Burgoyne et al. (Feb. 1999), incorporated herein by reference, and may be used in substantially the same manner as set forth in that patent.
• the organic and inorganic materials described herein may be employed in fabricating electronic chips, chips, and multichip modules, interlayer dielectrics, protective coatings, and as a substrate in circuit boards or printed wiring boards.
• films or coatings of the organic and inorganic materials described herein can be formed by solution techniques such as spraying, spin coating or casting, with spin coating being preferred.
• Preferred solvents are 2-ethoxyethyl ether, cyclohexanone, cyclopentanone, toluene, xylene, chlorobenzene, N-methyl pyrrolidinone, N,N-dimethylformamide, N,N-dimethylacetamide, methyl isobutyl ketone, 2-methoxyethyl ether, 5-methyl-2-hexanone, ⁇ -butyrolactone, and mixtures thereof.
• the coating thickness is between about 0.1 to about 15 microns. As a dielectric interlayer, the film thickness is less than 2 microns.
• Additives can also be used to enhance or impart particular target properties, as is conventionally known in the polymer art, including stabilizers, flame retardants, pigments, plasticizers, surfactants, and the like. Compatible or non-compatible polymers can be blended in to give a desired property. Adhesion promoters can also be used. Such promoters are typified by hexamethyidisilazane, which can be used to interact with available hydroxyl functionality that may be present on a surface, such as silicon dioxide, that was exposed to moisture or humidity. Polymers for microelectronic applications desirably contain low levels (generally less than 1 ppm, preferably less than 10 ppb) of ionic impurities, particularly for dielectric interlayers.
• crosslinking refers to a process in which at least two molecules, or two portions of a long molecule, are joined together by a chemical interaction. Such interactions may occur in many different ways including formation of a covalent bond, formation of hydrogen bonds, hydrophobic, hydrophihc, ionic or electrostatic interaction. Furthermore, molecular interaction may also be characterized by an at least temporary physical connection between a molecule and itself or between two or more molecules.
• some preferred embodiments comprise a plurality of voids in one or all of the spin-on dielectric layers or spin-on low dielectric constant layers.
• This plurality of voids can also be expressed by using the phrase "nanoporous layer".
• the term “nanoporous layer” refers to any suitable low dielectric material (i.e. ⁇ 3.0) that is composed of a plurality of voids and a non- volatile component.
• substantially means a desired component is present in a layer at a weight percent amount greater than 51%.
• void means a volume in which mass is replaced with a gas.
• the composition of the gas is generally not critical, and appropriate gases include relatively pure gases and mixtures thereof, including air.
• any one of the spin-on layers may comprise a plurality of voids.
• Voids may have any suitable shape. Voids are typically spherical, but may alternatively or additionally have tubular, lamellar, discoidal, or other shapes. It is also contemplated that voids may have any appropriate diameter. It is further contemplated that voids have some connections with adjacent voids to create a structure with a significant amount of connected or "open" porosity. In preferred embodiments, voids have a mean diameter of less than 1 micrometer.
• voids have a mean diameter of less than 100 nanometers. And in still more preferred embodiments, voids have a mean diameter of less than 10 nanometers. It is further contemplated that voids may be uniformly or randomly dispersed within any one of the spin- on layers. In a preferred embodiment, voids are uniformly dispersed within any of the spin- on layers.
• Typical solvents are also those solvents that are able to solvate the monomers, isomeric monomer mixtures and polymers.
• Contemplated solvents include any suitable pure or mixture of organic, organometalhc or inorganic molecules that are volatilized at a desired temperature, such as the critical temperature.
• the solvent may also comprise any suitable pure or mixture of polar and non- polar compounds.
• the solvent comprises water, ethanol, propanol, acetone, ethylene oxide, benzene, toluene, ethers, cyclohexanone, butyrolactone, methylethylketone, and anisole.
• no solvent is used and at least one liquid monomer is chosen to form a solventless formulation.
• the term “pure” means that component that has a constant composition. For example, pure water is composed solely of H 2 O.
• the term “mixture” means that component that is not pure, including salt water.
• the term “polar” means that characteristic of a molecule or compound that creates an unequal charge distribution at one point of or along the molecule or compound.
• the term “non-polar” means that characteristic of a molecule or compound that creates an equal charge distribution at one point of or along the molecule or compound.
• alternative low dielectric constant material may also comprise additional components.
• softeners or other protective agents may be added.
• adhesion promoters may advantageously employed.
• detergents or antifoam agents may be desirable.
• At least one spin-on low dielectric constant layer is coupled to the at least one spin-on dielectric layer.
• Any of the materials already described herein can be used to form the additional spin-on low dielectric constant layer. It is especially important to understand that the material used for the dielectric layer that is coupled to the surface can be completely different from the at least one spin-on low dielectric constant layer.
• the first spin-on layer may comprise an organic cage-based compound, such as GX-3TM (an adamantane-based compound) and a second spin-on layer may comprise an organosiloxane or organohydridosiloxane compound, such as HOSPTM (an organosiloxane polymer).
• the first spin-on layer may comprise an organosiloxane compound
• the second spin-on layer may comprise an adamantane-based compound
• the third spin-on layer may comprise another organosiloxane compound
• a fourth layer may comprise a spin-on glass material, such as NANOGLASS ETM.
• NANOGLASS ETM a spin-on glass material
• an effective dielectric constant can be measured for the stack that comprises the surface and the layer.
• the effective dielectric constant (k eff ) should remain the same or be slightly lowered with each additional spin-on low dielectric constant layer.
• the effective dielectric constant will be lowered with each additional spin-on low dielectric constant layer.
• the effective dielectric constant of the layered component will be less than 3.0. In more preferred embodiments, the effective dielectric constant of the layered component will be less than 2.5.
• Additional spin-on low dielectric constant layers may comprise layers such as etch- stop layers, cap layers, hardmask layers and the like. It is contemplated that these additional spin-on low dielectric constant layers will have an effective dielectric constant of less than 3.0. It is more contemplated that any additional spin-on low dielectric constant layers will have an effective dielectric constant of less than 2.5.
• At least one supplementary layer of material may be added to the layered stack or layered component.
• a supplementary layer of material is that layer of material or materials that is designed to add to the low dielectric constant layered component, but doesn't necessarily have to be spun-on to the layered component.
• Examples of supplementary layers of materials comprise metals (such as those which might be used to form via fills or printed circuits and also those included in US Patent No. 5,780,755; 6,113,781; 6,348,139 and 6,332,233 all of which are incorporated herein in their entirety), metal diffusion layers, mask layers, anti-reflective coatings layers, adhesion promoter layers and the like.
• the term "metal” means those elements that are in the d-block and f- block of the Periodic Chart of the Elements, along with those elements that have metal-like properties, such as silicon and germanium.
• d-block means those elements that have electrons filling the 3d, 4d, 5d, and 6d orbitals surrounding the nucleus of the element.
• f-block means those elements that have electrons filling the 4f and 5 f orbitals surrounding the nucleus of the element, including the lanthanides and the actinides.
• Preferred metals include titanium, silicon, cobalt, copper, nickel, zinc, vanadium, aluminum, chromium, platinum, gold, silver, tungsten, molybdenum, cerium, promethium, and thorium. More preferred metals include titanium, silicon, copper, nickel, platinum, gold, silver and tungsten. Most preferred metals include titanium, silicon, copper and nickel.
• metal also includes alloys, metal/metal composites, metal ceramic composites, metal polymer composites, as well as other metal composites.
• a layer of laminating material or cladding material may also be considered a supplementary layer of material and may be coupled to the layered component depending on the specifications required by the component.
• Laminates are generally considered fiber- reinforced resin dielectric materials.
• Cladding materials are a subset of laminates that are produced when metals and other materials, such as copper, are incorporated into the laminates. (Harper, Charles A., Electronic Packaging and Interconnection Handbook, Second Edition, McGraw-Hill (New York), 1997.)
• a method of producing a low dielectric constant layered component comprises: a) providing a surface; b) spinning a dielectric material on to the surface; c) curing the dielectric material to form a dielectric layer; d) spinning a low dielectric constant material on to the dielectric layer; and e) curing the low dielectric constant material to form a low dielectric constant layer.
• FIG. 3B which is a preferred embodiment - a NANOGLASSTM E layer is spun on to a surface and baked (200); an etch-stop layer is spun onto the NANOGLASSTM E layer and baked (210); another NANOGLASSTM E layer is spun-on and baked (220); a cap layer is spun on to the NANOGLASSTM E layer and baked (230) and finally, the layered stack or layered component is cured (240).
• each layer is cured subsequent to its deposition.
• each layer is spun-on to the layered component and then the entire stack is cured at one time.
• Prior Art Figure 3A shows a NANOGLASSTM E layer is spun-on to a surface and baked (310); the NANOGLASSTM E layer is then cured (320); a CVD etch stop layer is added to the NANOGLASSTM E layer (330); another NANOGLASSTM E layer is spun-on to the CVD- applied layer and baked (340); the NANOGLASSTM E layer is cured (350); and a CVD- applied cap is added (360) to the layered stack or component.
• any suitable coating mechanism or apparatus may be used to apply the spin-on layers and materials.
• a suitable coating apparatus include an FSI 300mm coater or a TEL ACT 12 Coater.
• Suitable coating mechanisms or apparatus should be able to a) reliably dispense spin-on materials at reproducible thicknesses; b) reliably dispense several different types of spin-on materials; c) easily integratable into an existing manufacturing process; and d) easy to use and operate.
• Figure 4 shows a graph of typical wafer-to-wafer spin-on uniformity measurements for FLARE (polyarylene ether) coatings using a TEL ACT 12 Coater.
• Figure 5 shows several embodiments of the present invention.
• Figure 5A shows a layered component comprising a layer of GX-3TM (510) coupled to a spin-on barrier/etch stop layer (520), which is coupled to a layer of ELK-HOSPTM or NANOGLASSTM E (530), which is coupled to a layer of GX-3TM (540), which is capped off by a spin-on cap layer (550). Copper is used as the via fill (560) for this particular layered stack.
• Figure 5B shows a layered component comprising a layer of ELK-HOSPTM or NANOGLASSTM E (505) coupled to a spin-on barrier/etch stop layer (515), which is coupled to a layer of GX-3TM (525), which is coupled to a layer of ELK-HOSPTM or NANOGLASSTM E (535), which is capped off by a spin-on cap layer (545). Copper is used as the via fill (555) for this particular layered stack.
• Figure 5C shows a layered component comprising a layer of GX-3TM (565) coupled to a spin-on copper barrier layer (570), which is coupled to a layer of GX-3TM (575), which is coupled to a layer of ELK-HOSPTM or NANOGLASSTM E (580), which is coupled to a layer of GX-3TM (585), which is capped off by a spin-on cap layer of ELK-HOSPTM or NANOGLASSTM E (590). Copper is used as the via fill (595) for this particular layered stack.
• Components, electronic components, and semiconductor components, as contemplated herein, are generally thought to comprise any single or layered component that can be utilized in an electronic-based product.
• layered electronic stack can be used interchangeably with the phrase “electronic component”, “layered component” or “layered stack” when the electronic component is a layered component.
• Contemplated electronic components comprise circuit boards, chip packaging, dielectric components of circuit boards, printed-wiring boards, and other components of circuit boards, such as capacitors, inductors, and resistors.
• Electronic component also means any device or part that can be used in a circuit to obtain some desired electrical action.
• Electronic components contemplated herein may be classified in many different ways, including classification into active components and passive components.
• Active components are electronic components capable of some dynamic function, such as amplification, oscillation, or signal control, which usually requires a power source for its operation. Examples are bipolar transistors, field- effect transistors, and integrated circuits.
• Passive components are electronic components that are basically static in operation, i.e., are ordinarily incapable of amplification or oscillation, and usually require no power for their characteristic operation. Examples are conventional resistors, capacitors, inductors, diodes, rectifiers and fuses.
• Electronic components contemplated herein may also be classified as conductors, semiconductors, or insulators.
• conductors are components that allow charge carriers (such as electrons) to move with ease among atoms as in an electric current.
• Examples of conductor components are circuit traces and vias comprising metals.
• Insulators are components where the function is substantially related to the ability of a material to be extremely resistant to conduction of current, such as a material employed to electrically separate other components
• semiconductors are components having a function that is substantially related to the ability of a material to conduct current with a natural resistivity between conductors and insulators. Examples of semiconductor components are transistors, diodes, some lasers, rectifiers, thyristors and photosensors.
• Power source components are typically used to power other components, and include batteries, capacitors, coils, and fuel cells.
• Power consuming components include resistors, transistors, ICs, sensors, and the like.
• Discreet components are devices that offer one particular electrical property concentrated at one place in a circuit. Examples are resistors, capacitors, diodes, and transistors.
• Integrated components are combinations of components that that can provide multiple electrical properties at one place in a circuit. Examples are ICs, i.e., integrated circuits in which multiple components and connecting traces are combined to perform multiple or complex functions such as logic.
• layered or “multilayered”, as applied to components, means that the functionality of the component arises from having juxtaposed layers of different materials.
• a typical P-N-P transistor is considered herein to be a multilayered component because its functions arise from the juxtaposition of P and N doped semiconductor layers.
• a conductive trace on a circuit board would not generally be considered to be multilayered by itself, even if the trace had been manufactured by successive deposits of the conductive material, because each successive layer merely increases the current carrying capacity, rather than altering the functionality of the trace.
• Electronic-based products can be "finished” in the sense that they are ready to be used in industry or by other consumers.
• finished consumer products are a television, a computer, a cell phone, a pager, a palm-type organizer, a portable radio, a car stereo, and a remote control.
• intermediate products such as circuit boards, chip packaging, and keyboards that are potentially utilized in finished products.
• Electronic products may also comprise a prototype component, at any stage of development from conceptual model to final scale-up mock-up.
• a prototype may or may not contain all of the actual components intended in a finished product, and a prototype may have some components that are constructed out of composite material in order to negate their initial effects on other components while being initially tested.
• Electronic products and components may comprise layered materials, layered components, and components that are laminated in preparation for use in the component or product. Layers that include or comprise electronic components can make up the finished layered component or product.
• Figure 6 shows the effective dielectric constant measured for a Two-layered stack comprising a silicon layer (600), a spin-on layer of NANOGLASSTM E (610), a spin-on cap layer (620), and a layer of aluminum (630).
• Graph 640 shows the effective dielectric constant of three different cap layers (620): CVD, FLARETM, and NANOGLASSTM E.
• FIG. 7 shows an Interline effective dielectric constant measurement for a Dual Damascene process.
• the layered stack (700) comprises a CVD barrier (710), a spin-on layer of NANOGLASSTM E (720), a spin-on etch stop layer (730), another spin-on layer of NANOGLASSTM E (740), a spin-on cap layer (750), a spin-on CVD barrier (760), and another spin-on NANOGLASSTM E layer (770).
• the etch stop layer and cap layer comprise CVD, FLARETM, and NANOGLASSTM E for the purposes of measurement of the Interline effective dielectric constant, shown in graph 780.
• FIG 8 shows a schematic of a Spin-on Dielectric Bulk Delivery System for Manufacturing.
• a spin-on material (SOM) (810) is directed through a pump (820), a filter (830) and into a reservoir (830).
• This first process (840) is refrigerated and directed by Chem. Managing Software (850).
• the SOM (810) is sent from the reservoir (830) into another reservoir (860), where the SOM (810) is directed through a second pump (870), a second filter (880) and on to the surface (890) by a spin-on process.

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