EP1206765A1 - Procede et dispositif d'affectation automatique d'adresses de detecteurs dans un systeme avertisseur de danger - Google Patents

Procede et dispositif d'affectation automatique d'adresses de detecteurs dans un systeme avertisseur de danger

Info

Publication number
EP1206765A1
EP1206765A1 EP00940321A EP00940321A EP1206765A1 EP 1206765 A1 EP1206765 A1 EP 1206765A1 EP 00940321 A EP00940321 A EP 00940321A EP 00940321 A EP00940321 A EP 00940321A EP 1206765 A1 EP1206765 A1 EP 1206765A1
Authority
EP
European Patent Office
Prior art keywords
detector
switch
detectors
control center
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP00940321A
Other languages
German (de)
English (en)
Other versions
EP1206765B1 (fr
Inventor
Gerhard Röpke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Job Lizenz GmbH and Co KG
Original Assignee
Job Lizenz GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Job Lizenz GmbH and Co KG filed Critical Job Lizenz GmbH and Co KG
Publication of EP1206765A1 publication Critical patent/EP1206765A1/fr
Application granted granted Critical
Publication of EP1206765B1 publication Critical patent/EP1206765B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B26/00Alarm systems in which substations are interrogated in succession by a central station
    • G08B26/001Alarm systems in which substations are interrogated in succession by a central station with individual interrogation of substations connected in parallel
    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B25/00Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems
    • G08B25/003Address allocation methods and details
    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B25/00Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems
    • G08B25/01Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems characterised by the transmission medium
    • G08B25/04Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems characterised by the transmission medium using a single signalling line, e.g. in a closed loop
    • G08B25/045Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems characterised by the transmission medium using a single signalling line, e.g. in a closed loop with sensing devices and central station in a closed loop, e.g. McCullough loop
    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B26/00Alarm systems in which substations are interrogated in succession by a central station
    • G08B26/005Alarm systems in which substations are interrogated in succession by a central station with substations connected in series, e.g. cascade

Definitions

  • the invention relates to a method for automatically assigning detector addresses in a hazard alarm system having a plurality of detectors according to claim 1.
  • Hazard detection systems e.g. Fire alarm systems generally have a larger number of hazard detectors connected to a two-wire alarm line. This can be designed as a branch line or as a ring line, via which the individual detectors communicate with a control center. Each detector has a sensor or the like, which produces measured values depending on parameters of its environment. The measured values are transmitted to the control center via the line, which usually polls the individual detectors cyclically. In order to be able to assign the measured values to the individual detectors, it is necessary to assign an identifier or an address to each detector. The address is stored in a non-volatile memory.
  • An evaluation device in the control center determines the respective increases in the line current, the detector address corresponding to the number of increases in the line current. Since it is not possible or sensible to process measured values from different detector types using a uniform method, it has also become known from DE 25 33 354 to assign time elements to the individual detectors, as is also the case with the prior art described above.
  • the timers are used to transmit control commands on the line to the individual detectors, whereby the detectors are only ready to receive during the running time of the individual timers. With control devices provided in the detector, only one timer can be switched on within the control line within a control cycle, the starting time of the individual timer being evaluated as an address in the control center.
  • the runtime of the timer is controlled with an output signal formed in a signal converter, which represents the sum of the detector measurement value and a detector detection signal, and in the control center, in addition to the detector address, the detector measurement value and the detector identification of the relevant detector are derived from the respective switching delay , So that a larger number of fire detectors can be connected to individual detection lines or to be able to send a higher current through a detection line, it has become known from EP 0 042 501 to close the detection line in a ring. If there are no signals on a detection line, the query direction is reversed. The measured value is transmitted either by a corresponding time delay until the subsequent detector is switched on or in the form of a coded pulse sequence that is forwarded to the control center.
  • EP 0 212 106 It is also known from EP 0 212 106 to assign the detectors in a chain-like line address memories which are assigned the addresses in a predetermined order from the control center. This is done in such a way that the next switch to the next detector does not take place until an address is locked in the previous detector. For this purpose, a switch is arranged in each detector, which short-circuits one wire for connection to the next detector.
  • detector type e.g. Detector type or detector state.
  • DE 32 1 1 550 provides a two-wire detection line in which each detector has a series resistance and a switch which is located between the wires of the detection line and is closed in the event of an alarm. If the detector responds, the total resistance of the detector line changes.
  • a measuring and evaluation device arranged in the control center has a window discriminator assigned to each detector. Triggering the detectors results in a corresponding measurement voltage with the characteristic resistance value. The window discriminator assigned to this measurement voltage then switches its output to the display device assigned to the alarmed detector.
  • DE 40 38 992 has disclosed a method for automatically assigning detector addresses in a hazard alarm system, in which a control center is connected to a two-wire alarm line to which individual detectors are connected in a chain. Each detector has a transmission device, a measured value memory, an address memory and a voltage measuring device and a switch.
  • the control center applies a quiescent voltage to the line, which supplies the detectors with energy by charging a capacitor.
  • a short-circuit voltage is applied to the line, causing all detectors whose address memory is empty to short-circuit the line using their switch.
  • a measurement current is impressed on the line, and the voltage drop across the first detector with the switch closed is determined by the voltage measurement device.
  • a fourth phase an interrogation voltage is applied to the line, whereby the detector, whose measured value memory is occupied, but whose address memory is empty, becomes capable of communication and is assigned an address by the control center, which is stored in the address memory.
  • the control center repeats this process until all detectors have been assigned addresses.
  • the end of the process can be recognized by the control center by the fact that no short-circuit current flows in the third phase.
  • the known solution described last requires a not inconsiderable amount of circuitry in the detectors. It also requires a longer period of time for addressing.
  • the phases 2 to 4 described above have to be repeated for each detector in a line, which takes a long time, especially with a larger number of detectors in a network.
  • the state of the art also includes other addressing and alarm detection methods. Such is described, for example, in EP 0 546 401, which consists in the fact that an identification module is present in a detector base of each detector, and an identification number which cannot be changed is provided for each individual detector base and which is different from that of the other detector bases. Means are provided in the detector which recognize the identification number.
  • the identification module installed in the detector base is either formed from a combination of resistors, a ROM, a PROM, an EPROM, an EEPROM or an optical line marking. The identification number is read via contacts or an optical transmission device.
  • the detector base is located either by inserting the detector in a predefined sequence when commissioning for the first time by first-time detector alarm, e.g.
  • EP 0 362 985 attempts to improve the problematic addressing method described above by pressing a mechanical device that can be manually adjusted to a binary code in the signal base on corresponding resilient elements of the inserted measuring head to transmit the detector address. This makes it easier to replace detectors for maintenance purposes. A time-consuming manual setting of the coding for the socket address is also required with this solution.
  • the unstable spring elements and contact points also represent a safety risk.
  • EP 0 485 878 has disclosed a method for determining the configuration of the detectors of a hazard detection system, in which each detector the manufacturer stores a binary serial number.
  • 12 sometimes very time-consuming and complex process steps are carried out to determine the number of detectors present in the system, their location or networking by determining their serial numbers. The more complex the networking of ring and stub lines, the longer the known method is.
  • the invention has for its object to provide a method for the automatic assignment of detector addresses in a hazard alarm system that requires little circuitry in the individual detectors, can be carried out within a short time and works correctly even with long transmission lines with a large number of detectors.
  • a voltage is applied to the line in the control center, through which the capacitors are charged. This ensures that the detectors are supplied with energy at short notice.
  • the control panel sends a switching signal to close the switches of all detectors. In accordance with an embodiment of the method according to the invention, this switching signal is formed by a voltage-modulated data word from the control center.
  • this switching signal is formed by a voltage-modulated data word from the control center.
  • constant currents with different levels of the line are impressed in a predetermined change immediately after the switches are closed.
  • the constant current with changing level generates changing voltage drops at the measuring resistor of all detectors whose switch is open, and thus at the detector to be addressed, which are converted by a pulse receiver in the detector into a digital signal forming a data word.
  • This digital signal is given as an address directly in the memory, provided that it is not already assigned an address.
  • the Logic circuit the switch and blocks the storage of another data word in the address memory.
  • the subsequent detectors do not receive any evaluable voltage pulses via their resistors and therefore also no communication address, since the switch of the addressed detector short-circuits the transmission line to the subsequent detectors. As mentioned, after the addressed detector has saved its address, its switch is opened.
  • the control center can let one of the impressed currents flow further.
  • the control panel registers the opening of the switch by a voltage jump at the terminals. This can be used as an acknowledgment signal that the first detector has received its communication address correctly.
  • the control center sends a further communication address, which is also formed by an impressed current-modulated serial signal from the two constant currents. Since the switch of the first detector is open, the second detector also receives evaluable voltage pulses via its measuring resistor. All other detectors receive no usable voltage pulses via their measuring resistors. After saving its address, the second detector opens its switch. For each additional detector, the control center repeats the last step described with a different data word.
  • a communication address is assigned to a large number of detectors by means of rapid transmission of the communication addresses.
  • the control center no longer receives a voltage jump.
  • the control center can view the automatic process as complete.
  • a circuit arrangement for solving the problem according to the invention provides for each detector connected to the two-wire signal line a capacitor connected in series with a diode, a controllable switch between the wires, a measuring resistor in the course of a wire, a pulse receiver Logic circuit and an address memory connected to the logic circuit.
  • the impressed constant currents at the measuring resistor generate voltage pulses which the pulse receiver evaluates.
  • the logic circuit ensures feeding into the address memory.
  • a simple standard amplifier with a fixed gain factor and a downstream transistor stage can be provided for the pulse receiver.
  • it is alternatively provided to use the microprocessor for this purpose, which is usually arranged in each detector for carrying out the measurements and for communication with the control center.
  • the A / D converter of the microprocessor and a corresponding program of the microprocessor are provided for the pulse receiver. Additional circuitry is therefore not required for the pulse receiver.
  • the injection of constant currents into the signaling line ensures that voltage drops of the same magnitude are generated at each measuring resistor of the detector, regardless of the number of detectors, the length of the signaling line and other line parameters.
  • the ratio of the resistance value from the measuring resistor to the resistance of the semiconductor switch which is switched through is greater than 10: 1.
  • the ratio of the resistance value from the measuring resistor to the resistance of the semiconductor switch which is switched through is greater than 10: 1.
  • the method according to the invention enables addresses to be assigned automatically within a short time, even with extensive hazard detection systems, with little circuit complexity. Because each detector takes little time to address, the capacitor can be designed to be relatively small, which further reduces the effort.
  • Fig. 1 shows schematically a circuit arrangement for performing the method according to the invention.
  • FIG. 2 shows another embodiment for an addressing circuit of a detector of the hazard alarm system according to FIG. 1.
  • the center has a power supply in the form of a power supply NT, a microprocessor ⁇ C, a constant current source K, a modulator M and a voltage measuring device VM. The function of the individual blocks will be discussed further below.
  • a large number of detectors are connected to the transmission line, for example 128. However, only two detectors M1 and M2 are shown in FIG. 1. Each of the detectors M1 and M2 has a resistance Rml or Rm2 in the course of a wire, a capacitor C1 or C2 in series with a diode D1 or D2 between the wires, a controllable switch SKI or SK2, a pulse receiver PE, a logic circuit L and an address memory SP. Each detector contains a number of other components that are required for its operation. However, since only the assignment of an address to each detector is described here, these modules are not shown and are also not described.
  • the center Z switches a supply voltage to the transmission line.
  • the supply voltage reaches all detectors Ml, M2 ... Mn via the identically dimensioned measuring resistors Rml, Rm2 ... Rmn.
  • Your capacitors Cl. C2 ... Cn charge via the diodes Dl, D2 ... Dn.
  • the charged capacitors supply the logic circuits L, the address memories SP and the pulse receivers PE with electrical energy during the addressing phase.
  • the switches SKI, SK2 ... SKn are open and have no current.
  • the central station Z uses the modulator M to send a voltage-modulated data word as a collective command “initialization” to all detectors Ml, M2 ... Mn.
  • the circuit required for this corresponds to the prior art and is not described further.
  • the demodulators in the detectors required for reception are not relevant for the address assignment to the detectors and are therefore not shown in FIG. 1.
  • all detectors Ml, M2 ... Mn switch on their switches SKI, SK2 ... SKn.
  • the control center uses the constant current source K and the microprocessor ⁇ C to send a data word to the transmission line.
  • the data word consists of a predetermined change of two impressed currents IkO and Ikl.
  • the two currents cause voltage pulses at the resistance Rml of the detector Ml, which are converted into digital signals with the aid of the pulse receiver PE.
  • the logic unit L forwards the data word interpreted as a communication address to the non-volatile address memory SP.
  • the detector M2 and all subsequent detectors receive no evaluable voltage pulses via their resistors Rm2 ... Rmn and therefore no communication address, since the switch SKI short-circuits the transmission line to the subsequent detectors M2 ... Mn.
  • SKI is opened. This can happen, for example, in that the control center sends a current-modulating logic signal immediately after the address from the control center Z has been stored and stored in the detector M1, which causes the logic L in the detector M1 to open its switch SKI. In this way, a voltage jump takes place at the output of the central station Z, which is evaluated as an acknowledgment for an address being assigned to the detector M1. The voltage jump is measured on the current measuring device VM, which is connected to the microprocessor ⁇ C.
  • the control center Z then sends a further address, which is likewise formed by an impressed current-modulated serial signal from the constant currents IkO and Ikl. Since the switch SKI is open, the second detector M2 also receives evaluable voltage pulses via its measuring resistor Rm2, which are evaluated by the pulse receiver PE. The logic circuit of the first detector Ml ignores this address signal since its address memory is already occupied. The addressing process then continues as already described for Ml. The control center repeats this step for each detector. A rapid transmission of the communication addresses means that a large number of detectors are included in a short time an address. When the assignment of addresses has been completed, the control center can determine that a voltage jump at its connections is no longer registered by the voltage measuring device VM.
  • FIG. 2 shows a detector with regard to its addressing circuit, which in some cases has the same components as the detectors M1 and M2 according to FIG. 1.
  • a logic circuit L with an integrated A / D converter is shown instead of the pulse receiver PE ,
  • These are "components" of a microprocessor usually installed in the detector, whose A / D converter and its program compare the voltages falling across the measuring resistor Rm with specified digital values. The resulting data word is interpreted as an address and stored in the address memory SP if it is empty. The remaining process steps are identical to those already described.

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  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Alarm Systems (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Selective Calling Equipment (AREA)
  • Fire Alarms (AREA)
EP00940321A 1999-08-27 2000-06-06 Procede et dispositif d'affectation automatique d'adresses de detecteurs dans un systeme avertisseur de danger Expired - Lifetime EP1206765B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19940700 1999-08-27
DE19940700A DE19940700C2 (de) 1999-08-27 1999-08-27 Verfahren und Vorrichtung zur automatischen Zuweisung von Melderadressen bei einer Gefahrenmeldeanlage
PCT/EP2000/005179 WO2001016911A1 (fr) 1999-08-27 2000-06-06 Procede et dispositif d'affectation automatique d'adresses de detecteurs dans un systeme avertisseur de danger

Publications (2)

Publication Number Publication Date
EP1206765A1 true EP1206765A1 (fr) 2002-05-22
EP1206765B1 EP1206765B1 (fr) 2003-01-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP00940321A Expired - Lifetime EP1206765B1 (fr) 1999-08-27 2000-06-06 Procede et dispositif d'affectation automatique d'adresses de detecteurs dans un systeme avertisseur de danger

Country Status (12)

Country Link
US (1) US6838999B1 (fr)
EP (1) EP1206765B1 (fr)
JP (1) JP2003517163A (fr)
CN (1) CN1138246C (fr)
AT (1) ATE230877T1 (fr)
AU (1) AU5529700A (fr)
DE (2) DE19940700C2 (fr)
ES (1) ES2190418T3 (fr)
MX (1) MXPA01005391A (fr)
PL (1) PL196162B1 (fr)
RU (1) RU2214000C2 (fr)
WO (1) WO2001016911A1 (fr)

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Also Published As

Publication number Publication date
WO2001016911A1 (fr) 2001-03-08
PL196162B1 (pl) 2007-12-31
PL350823A1 (en) 2003-02-10
CN1347543A (zh) 2002-05-01
EP1206765B1 (fr) 2003-01-08
US6838999B1 (en) 2005-01-04
AU5529700A (en) 2001-03-26
ATE230877T1 (de) 2003-01-15
MXPA01005391A (es) 2003-03-27
CN1138246C (zh) 2004-02-11
DE50001072D1 (de) 2003-02-13
RU2214000C2 (ru) 2003-10-10
ES2190418T3 (es) 2003-08-01
JP2003517163A (ja) 2003-05-20
DE19940700A1 (de) 2001-03-08
DE19940700C2 (de) 2003-05-08

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