EP1198913B1 - Procede pour empecher les erreurs dans un train de bits d'information - Google Patents

Procede pour empecher les erreurs dans un train de bits d'information Download PDF

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Publication number
EP1198913B1
EP1198913B1 EP00936639A EP00936639A EP1198913B1 EP 1198913 B1 EP1198913 B1 EP 1198913B1 EP 00936639 A EP00936639 A EP 00936639A EP 00936639 A EP00936639 A EP 00936639A EP 1198913 B1 EP1198913 B1 EP 1198913B1
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EP
European Patent Office
Prior art keywords
bits
code
data bit
bit stream
algorithm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP00936639A
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German (de)
English (en)
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EP1198913A1 (fr
Inventor
Wen Xu
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Siemens AG
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Siemens AG
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Publication of EP1198913B1 publication Critical patent/EP1198913B1/fr
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/007—Unequal error protection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0059—Convolutional codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L2001/0098—Unequal error protection

Definitions

  • the invention relates to a method for error protection the preamble of claim 1 and an apparatus for Implementation of this procedure.
  • Source signals such as voice, sound, picture and video include almost always statistical redundancy. By source coding This redundancy can be removed so that an efficient Transmission or storage of the source signal allows becomes. On the other hand, it is in signal transmission necessary to selectively add redundancy by channel coding again, to eliminate channel interference.
  • Source coding is usually only suboptimal feasible, i. in compressed data is still certain Redundancy available. This residual redundancy can in the so-called source-controlled or common channel decoding be used to correct further bit errors; see. DE 4224214 C2 and J. Hagenauer, "Source-controlled channel decoding, "IEEE Trans. Commun., Vol. 43, pp. 2449-2457, Sept.” 1995.
  • the decoding process of the channel decoder becomes both by the transmitted code bits as well as by APiorio / A posteriori information about the probable Value of some important source bits controlled.
  • VA Viterbi algorithm
  • bits generated by source coding are generally very differently sensitive against bit errors, e.g. with digital messaging / storage can arise, so that a unequal error protection (Unequal Error Protection, UEP) for different Bits is required, i. important bits have to be better be protected as least important.
  • UEP Unequal Error Protection
  • An example is the speech codec based on the code excited linear prediction (CELP), such as the Enhanced Full Rate (EFR) and Adaptive Multi Rate (AMR) speech codec in the GSM standard.
  • CELP code excited linear prediction
  • EFR Enhanced Full Rate
  • AMR Adaptive Multi Rate
  • the GSM EFR codec generates 244 bits (corresponding to 12.2 kbit / s) every 20 ms (corresponding to one frame). Errors in this bitstream have a very different effect on speech quality after decoding. Errors in some bits, eg bits of LPC (linear predictive coding) coefficients, lead to incomprehensibility or loud noises, but errors in other bits (eg bits of fixed codebooks) are barely perceptible.
  • LPC linear predictive coding
  • the Rate Matching is used to generate those generated by channel coding Code bits according to the quality of service and / or the possible (fixed) length of the data block within repeat a transport channel (if the code bits too are a little) or to punctuate (if the code bits too much are). All functional units (CRC, multiplexing, channel coding, Interleaving, rate matching, etc.) are allowed only on the whole data block (i.e., the complete input bit stream) applied but not to parts thereof.
  • This mode has 3 classes of bits: class A (81 bits), class B (103 bits) and class C (60 bits). If the 3 classes of bits are transmitted via 3 transport channels, then each class will first be e.g. 16 CRC bits (for block error detection) and then 8 tail bits (if as planned, the convolutional code with rate 1/3, constraint Length 9 is inserted) added.
  • the invention is therefore based on the object, an improved Method of the generic type with reduced Overhead and thus higher net information density and to provide a corresponding device.
  • the invention concludes the basic idea of a targeted Insertion of known bits before the step of channel coding one.
  • These known bits - also referred to as Dummy bits - are near the important information bits inserted, and that (differently than with the well-known Code termination, where a known bit group on the End of a data block) in a non-terminating manner and especially on both sides of the information bits. ever more important is an information bit, the closer you want to get Dummy bits lie to him and / or the more known bits are supposed to be inserted next to him.
  • decoding methods as the source-controlled channel decoding used be, where for the known bits the maximum (absolute) apriori knowledge (for Apri-VA algorithm the log likelihood Ratio) is set on the receiving side.
  • a finer graduated classification in at least three classes, associated with the insertion each of a plurality of successive dummy bits near information bits of higher significance and one Dummy bits near information bits of medium significance.
  • the encoder comprises means for insertion the previously known data bits (dummy bits) at positions near the positions of important information bits.
  • Such Device further comprises a classification device for classifying the information bits according to their significance, or it is at least equivalent to a source Classification signals, for example with a memory device an external classification device connected.
  • a Viterbi algorithm modified as follows may be used to decode the received (convolutionally coded) bit stream.
  • a trellis diagram of a convolutional code consists of branches (state transitions) and nodes, where each node can have several branches together.
  • a node represents a state of the convolutional code memory.
  • the normal Viterbi decoder can then be modified to reach only those branches. In other words, the paths that do not run on the 2 m sectors are discarded. This method can be extended for several dummy bits and other codes.
  • such a system comprises a flow control for Control the appropriate tests for those over several Paths in the trellis diagram use data bit streams the positions and values of the dummy bits and a decision unit, which is connected to the comparator unit and depending on the result of each executed Compare a decision to reject or confirm or selecting a path.
  • Such comprises Overall system a source-controlled channel decoder, in particular an Apri-Viterbi algorithm or MAP algorithm realized.
  • a source-controlled channel decoder in particular an Apri-Viterbi algorithm or MAP algorithm realized.
  • Such includes a database for the so-called. "L-values" (log-likelihood ratio values) of the inserted ones known bits.
  • the bits u 3 and u 4 should be better protected than u 8 and u 9 , which in turn are better protected than u 1 , u 6 , u 7 , .... Then one can use two known bits ("0" or “1") between u 3 and u 4 and a known bit (“0" or “1") between u 8 and u 9 . On the decoding side this apriori knowledge should be used, ie the two bits between u 3 and u 4 are "0" and the bit between u 8 and u 9 is "1".
  • the block length is 200 (bit 0 ... bit 199).
  • G 2 1 + D + D 2 + D 4
  • G 3 1 + D 2 + D 3 + D 4 .
  • the codes have a known initial state and are terminated at the end of the data block with m tail bits (4 bits equal to 0 in our case).
  • the proposed method is for systematic channel codes (e.g., the Recursive Systematic Convolutional / RSC codes, or Turbo Codes) are particularly attractive and efficient because of the inserted same dummy bits (e.g., "0's") into the Codewords (as systematic code bits) are reflected and do not need to be transferred.
  • systematic channel codes e.g., the Recursive Systematic Convolutional / RSC codes, or Turbo Codes
  • the two dummy bits 0 are known on the receiving side, we only need to transfer the bits aA-bB-cC- X - d D- X -eE-fF-gG -....
  • the non-transmitted dummy bits may be reset before decoding (with the highest reliability). This corresponds to a lower equivalent code rate.
  • the coded bits are generally in the form of AA-BB-CC-XX-DD-XX-EE-FF-GG, all of which should / should be transmitted.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Artificial Intelligence (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Mobile Radio Communication Systems (AREA)

Claims (15)

  1. Procédé pour la protection contre les erreurs d'un train de bits de données dans un système numérique de transmission d'information pour la réduction du taux d'erreur sur les bits,
    caractérisé en ce que,
    avant un codage du canal, une pluralité de Dummy-Bits déjà connus est insérée de façon non terminante sur des positions de bit prédéfinies du train primaire de bits de données à proximité de bits portant l'information, en particulier des deux côtés de ceux-ci.
  2. Procédé selon la revendication 1,
    caractérisé en ce que,
    par l'insertion des Dummy-Bits déjà connus, on forme à partir d'un code de facteur plus élevé un code de facteur plus bas.
  3. Procédé selon la revendication 1 ou 2,
    caractérisé par
    l'application à un code systématique, les Dummy-Bits n'étant pas transférés dans les bits de code.
  4. Procédé selon l'une quelconque des revendications précédentes,
    caractérisé en ce que
    les bits de code sont pointillés par la suite.
  5. Procédé selon l'une quelconque des revendications précédentes,
    caractérisé en ce que
    les bits d'information du train primaire de bits de données sont soumis à une classification de leur importance en au moins deux classes et que des Dummy-Bits proches de bits portant l'information de façon significative sont insérés.
  6. Procédé selon l'une quelconque des revendications précédentes,
    caractérisé par
    l'application dans un système de téléphonie mobile.
  7. Procédé selon l'une quelconque des revendications précédentes,
    caractérisé par
    l'application pour la transmission de signaux de sources, en particulier de signaux vocaux.
  8. Procédé selon l'une quelconque des revendications 4 à 7,
    caractérisé par
    l'application à un code de convolution.
  9. Procédé selon l'une quelconque des revendications précédentes,
    caractérisé en ce que,
    côté réception, une sélection de chemin, en particulier dans le cadre d'un algorithme de Viterbi, est réalisée sur la base du train de bits de données protégé, la concordance du train de bits d'information traité avec le train de bits de données protégé étant contrôlée aux emplacements des Dummy-Bits et le chemin correspondant étant rejeté dans le cas d'une non-concordance.
  10. Procédé selon l'une quelconque des revendications précédentes,
    caractérisé en ce qu'un décodage du train de bits de données protégé est réalisé en tant que décodage de canal commandé par source, en particulier au moyen d'un algorithme de Apri-Viterbi ou d'un algorithme de MAP.
  11. Procédé selon la revendication 9,
    caractérisé en ce que,
    pour un code de canal systématique, en particulier un Recursive Systematic Convolutional Code, une valeur L Apriori d'un bit d'information est ajoutée à une valeur d'entrée soft du bit de code systématique correspondant et un décodage est effectué ensuite au moyen d'un algorithme de Viterbi classique.
  12. Dispositif pour la mise en oeuvre du procédé selon l'une quelconque des revendications précédentes,
    caractérisé par
    un codeur comprenant des moyens pour l'insertion de bits de données déjà connus sur des positions de bit prédéfinies du train de bits de données primaire à coder.
  13. Dispositif selon la revendication 11,
    caractérisé par
    un dispositif de classification pour la classification de l'importance des bits d'information du train de bits de données primaire, leur sortie étant reliée aux moyens destinés à la commande de l'insertion de bits de données déjà connus.
  14. Dispositif selon la revendication 11 ou 12,
    caractérisé en ce que,
    pour le décodage de bits d'information, en particulier au moyen d'un algorithme de Viterbi, il est prévu une unité de commande séquentielle pour la commande du contrôle de plusieurs chemins pour le train de bits de données reçu,
    une unité de comparateur pour le contrôle des trains de bits de données traités sur plusieurs chemins à l'aide des positions et valeurs des Dummy-Bits et
    une unité de décision reliée à la sortie de l'unité de comparateur pour le rejet ou l'autorisation du chemin attribué au train de bits de données respectivement contrôlé en conclusion de la comparaison.
  15. Dispositif selon l'une quelconque des revendications 11 à 13,
    caractérisé par
    un décodeur de canal commandé par source, en particulier pour la mise en oeuvre d'un algorithme de Apri-Viterbi ou d'un algorithme de MAP.
EP00936639A 1999-07-22 2000-04-20 Procede pour empecher les erreurs dans un train de bits d'information Expired - Lifetime EP1198913B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19934505 1999-07-22
DE19934505 1999-07-22
PCT/DE2000/001253 WO2001008340A1 (fr) 1999-07-22 2000-04-20 Procede pour empecher les erreurs dans un train de bits d'information

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Publication Number Publication Date
EP1198913A1 EP1198913A1 (fr) 2002-04-24
EP1198913B1 true EP1198913B1 (fr) 2005-08-10

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US (1) US6973610B1 (fr)
EP (1) EP1198913B1 (fr)
JP (1) JP3638554B2 (fr)
KR (1) KR20020029429A (fr)
CN (1) CN1134131C (fr)
AU (1) AU767445B2 (fr)
BR (1) BR0012670B1 (fr)
DE (1) DE50010933D1 (fr)
HU (1) HUP0201902A2 (fr)
WO (1) WO2001008340A1 (fr)

Cited By (1)

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DE102008055139A1 (de) * 2008-12-23 2010-07-01 Secutanta Gmbh Verfahren zum Senden und Empfangen eines Datenblocks

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US7702986B2 (en) * 2002-11-18 2010-04-20 Qualcomm Incorporated Rate-compatible LDPC codes
WO2004098118A1 (fr) * 2003-04-29 2004-11-11 Siemens Aktiengesellschaft Procede, dispositif emetteur et dispositif recepteur pour transmission de donnees orientee paquets, a correction d'erreur heterogene
EP2521270A1 (fr) 2005-08-12 2012-11-07 Fujitsu Limited Appareil émetteur
US7987415B2 (en) 2006-02-15 2011-07-26 Samsung Electronics Co., Ltd. Method and system for application of unequal error protection to uncompressed video for transmission over wireless channels
JP4858312B2 (ja) * 2007-05-31 2012-01-18 日本電気株式会社 送信装置、受信装置、無線通信システム、送信方法、受信方法、通信方法、及びプログラム
CA2700674C (fr) * 2007-07-26 2013-10-01 Samsung Electronics Co., Ltd. Dispositif concu pour le traitement de flux et procede associe
US8259866B2 (en) 2008-01-04 2012-09-04 Qualcomm Incorporated Decoding scheme using A-priori information about transmitted messages
US8259867B2 (en) 2008-01-04 2012-09-04 Qualcomm Incorporated Methods and systems for turbo decoding in a wireless communication system
US8000411B2 (en) * 2008-01-04 2011-08-16 Qualcomm Incorporated Decoding scheme using multiple hypotheses about transmitted messages
US8392811B2 (en) * 2008-01-07 2013-03-05 Qualcomm Incorporated Methods and systems for a-priori decoding based on MAP messages
JP4450073B2 (ja) * 2008-01-08 2010-04-14 ソニー株式会社 送信装置、及び送信方法、情報処理装置、及び情報処理方法、並びにプログラム
KR100899781B1 (ko) * 2008-12-18 2009-05-28 주식회사 아나패스 클록 정보와 함께 데이터를 전송하는 방법 및 장치
KR100868299B1 (ko) * 2008-03-20 2008-11-11 주식회사 아나패스 클록 정보와 함께 데이터를 전송하는 방법 및 장치
JP5066121B2 (ja) 2008-03-20 2012-11-07 アナパス・インコーポレーテッド クロック情報とデータを伝送する装置及び方法
JP4922242B2 (ja) * 2008-06-05 2012-04-25 パナソニック株式会社 符号化装置、符号化方法、及びビタビ復号装置
US8406342B2 (en) * 2008-06-19 2013-03-26 Qualcomm Incorporated Methods and systems for improving frame decoding performance using known information
KR101272886B1 (ko) * 2008-10-09 2013-06-11 주식회사 아나패스 클록 정보와 함께 데이터를 전송하는 방법 및 장치
US8726137B2 (en) * 2009-02-02 2014-05-13 Telefonaktiebolaget L M Ericsson (Publ) Encoding and decoding methods for expurgated convolutional codes and convolutional turbo codes
CN102668612B (zh) * 2009-11-27 2016-03-02 高通股份有限公司 增加无线通信中的容量
JP4841684B2 (ja) * 2010-09-24 2011-12-21 富士通株式会社 送信装置及び送信方法
JP5195989B2 (ja) * 2011-09-09 2013-05-15 富士通株式会社 送信方法
WO2018163433A1 (fr) * 2017-03-10 2018-09-13 株式会社Ｎｔｔドコモ Dispositif de communication et procédé de décodage
CN114337690A (zh) * 2020-10-12 2022-04-12 瑞昱半导体股份有限公司 数据译码电路及方法

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008055139A1 (de) * 2008-12-23 2010-07-01 Secutanta Gmbh Verfahren zum Senden und Empfangen eines Datenblocks
DE102008055139B4 (de) * 2008-12-23 2010-12-09 Secutanta Gmbh Verfahren zum Empfangen eines Datenblocks

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Publication number Publication date
DE50010933D1 (de) 2005-09-15
US6973610B1 (en) 2005-12-06
KR20020029429A (ko) 2002-04-18
BR0012670B1 (pt) 2014-08-12
JP2003505975A (ja) 2003-02-12
JP3638554B2 (ja) 2005-04-13
CN1134131C (zh) 2004-01-07
HUP0201902A2 (en) 2002-10-28
EP1198913A1 (fr) 2002-04-24
WO2001008340A1 (fr) 2001-02-01
AU767445B2 (en) 2003-11-13
CN1364362A (zh) 2002-08-14
AU5207300A (en) 2001-02-13
BR0012670A (pt) 2002-04-09

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