Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/67005—Apparatus not specifically provided for elsewhere
  • H01L21/67011—Apparatus for manufacture or treatment
  • H01L21/67017—Apparatus for fluid treatment
  • H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
  • H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
  • H01L21/67046—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly scrubbing means, e.g. brushes
• • B08B1/32—
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B08—CLEANING
  • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
  • B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
  • B08B3/04—Cleaning involving contact with liquid
  • B08B3/08—Cleaning involving contact with liquid the liquid having chemical or dissolving effect

Definitions

• the field of the present invention pertains to a method and apparatus for cleaning a semiconductor wafer in the semiconductor fabrication processing. More particularly, the present invention relates to a post CMP (chemical mechanical planarization) wafer cleaning method and apparatus using vapor scrubbing.
• CMP chemical mechanical planarization
• IC integrated circuit
• the starting material for typical ICs is very high purity silicon.
• the material is grown as a.single crystal. It takes the shape of a solid cylinder. This crystal is then sawed (like a loaf of bread) to produce wafers typically 10 to 30 cm in diameter and 250 microns thick.
• the geometry of the features of the IC components are commonly defined photographically through a process known as photolithography. Very fine surface geometries can be reproduced accurately by this technique.
• the photolithography process is used to define component regions and build up components one layer on top of another. Complex ICs can often have many different built-up layers, each layer having components, each layer having differing interconnections, and each layer stacked on top of the previous layer. The resulting topography of these complex ICs often resemble familiar terrestrial "mountain ranges," with many "hills” and “valleys” as the IC components are built up on the underlying surface of the silicon wafer.
• a mask image, or pattern, defining the various components is focused onto a photosensitive layer using ultraviolet light.
• the image is focused onto the surface using the optical means of the photolithography tool and is imprinted into the photosensitive layer.
• optical resolution must increase.
• the depth of focus of the mask image correspondingly narrows. This is due to the narrow range in depth of focus imposed by the high numerical aperture lenses in the photolithography tool. This narrowing depth of focus is often the limiting factor in the degree of resolution obtainable and, thus, the smallest components obtainable using the photolithography tool.
• a precisely flat surface is desired.
• the precisely flat (e.g. fully planarized) surface will allow for extremely small depths of focus and, in turn, allow the definition and subsequent fabrication of extremely small components.
• CMP Chemical-mechanical planarization
• Figure 1 shows a down view of a typical prior art CMP machine 100 and Figure 2 shows a side cut away view of the CMP machine 100.
• the CMP machine 100 is fed wafers to be planarized.
• the CMP machine 100 picks up the wafers with an arm 101 and places them onto a rotating polishing pad 102.
• the polishing pad 102 is made of a resilient material and is typically textured, often with a plurality of predetermined groves
• the polishing pad 102 rotates on a platen
• the CMP machine 100 also includes a slurry dispense arm 107 extending across the radius of the polishing pad 102.
• the slurry dispense arm 107 dispenses a flow of slurry onto the polishing pad 102.
• the slurry is a mixture of de-ionized water and polishing agents designed to aid chemically the smooth and predictable planarization of the wafer.
• a constant and predictable removal rate is important to the uniformity and performance of the wafer fabrication process.
• the removal rate should be expedient, yet yield precisely planarized wafers, free from surface topography. If the removal rate is too slow, the number of planarized wafers produced in a given period of time decreases, degrading wafer through-put of the fabrication process. If the removal rate is too fast, the CMP planarization process will not be uniform across the surface of the wafers, degrading the yield of the fabrication process.
• the CMP machine 100 includes a conditioner assembly 120.
• the conditioner assembly 120 includes a conditioner arm 108, which extends across the radius of the polishing pad 102.
• An end effector 109 is connected to the conditioner arm 108.
• the end effector 109 includes an abrasive conditioning disk 110 which is used to roughen the surface of the polishing pad 102.
• the conditioning disk 110 is rotated by the conditioner arm 108 and is translationally moved towards the center of the polishing pad 102 and away from the center of the polishing pad 102, such that the conditioning disk 110 covers the radius of the polishing pad 102, thereby covering nearly the entire surface area of the polishing pad 102 as the polishing pad 102 rotates.
• a polishing pad having a roughened surface has an increased number of very small pits and gouges in its surface from the conditioner assembly 120 and, therefore, produces a faster removal rate via increased slurry transfer to the surface of the wafer and from more effective application of polishing down force. Without conditioning, the surface of polishing pad 102 is smoothed during the polishing process and removal rate decreases dramatically.
• the conditioner assembly 120 re-roughens the surface of the polishing pad 102, thereby improving the transport of slurry and improving the removal rate.
• the action of the rough surface of the polishing pad 102, the chemical softening action of the slurry, and the abrasive action of the slurry combine to polish the wafer 105 such that topography over millimeter scale planarization distances is nearly completely smoothed away.
• wafer 105 is removed from polishing pad 102 by arm 101 and is prepared for the next phase in the device fabrication process.
• wafer 105 must be cleansed of contaminants left over from the CMP process (e.g., particles of polishing pad 102, trace amounts of slurry /abrasives, metal ions, and the like).
• the surface of wafer 105 has to be cleaned in order to remove particles, metal ions, and other such contaminants.
• the contaminants left over from the CMP process be removed before wafer 105 proceeds through further fabrication processing.
• the presence of contaminant particles can disrupt subsequent lithography, which can lead to, for example, broken lines, shorts, and the like.
• DI deionized
• FIG. 3 A diagram of a scrubbing brush 300 being used on a semiconductor wafer 310 is shown in Figure 3. As depicted, scrubbing brush 300 rotates in the direction shown by arrow 301. As scrubbing brush 300 rotates, wafer 310 frictionally rotates (e.g., spins) beneath scrubbing brush 300 such that scrubbing brush 300 frictionally contacts the entire surface of wafer 310.
• the scrubbing brush 300 is advantageous in that it efficiently removes those contaminants which come within direct contact with scrubbing brush 300 as it frictionally moves across the surface of wafer 310.
• Scrubbing brush 300 may be a porous brush saturated with specifically tailored cleaning fluids. As illustrated in Figure 3, cleaning fluids flow into the scrubbing station 305 via inlet 320. The cleaning fluids are tailored in accordance with the materials comprising the surface of wafer 310 (e.g., metal lines covered with oxide, tungsten in oxide via plugs, copper, etc.). The chemicals contained within the cleaning fluid chemically interact with contaminants on the surface of wafer 310. The cleaning fluids react with the contaminants, yielding a reaction product. The reaction product is removed from the wafer surface by the wiping force of scrubbing brush 300 as well as the flow of the cleaning fluid.
• the present invention provides a method utilizing chemical cleaning solutions in gaseous form in conjunction with post- CMP scrubbing, thereby enhancing the cleaning efficiency of the chemicals. Usage of chemical solutions would also be reduced.
• a vapor generator introduces vapors of chemical cleaning solutions (e.g., hydrofluoric acid) into a sealed brush station during various cleaning steps for varying extents of time.
• the vapors interact with contaminants or defects on the wafer surface. Since defects of the semiconductor wafer offer preferential sites for reaction or condensation of the vapors, the vapors selectively interact with these defects and contaminants. Hence, the cleaning efficiency of the chemical is enhanced. Because the cleaning process is performed within a sealed brush station, it is also possible to conserve the amount of chemicals being used.
• a chemically and mechanically planarized semiconductor wafer that has a oxide surface is placed within a sealed brushing station. Then, hydrofluoric acid (HF) vapor is released into the sealed brushing station. The HF vapor then etches a thin layer ( ⁇ 50A) of oxide, which contains embedded contaminants, from the wafer surface. The vapor also interacts with the backside of the wafer, facilitating the removal of backside contaminants without directly dispensing chemicals to the backside. After a certain pre-determined period of time, the vapor generator is switched off. A predetermined amount of solution or deionized water is then introduced through the brush on to the wafer surface to remove the contaminants or their reaction products with the vapor. The flow of solution will also help in prevention of the brush loading. In one embodiment, the time of vapor on and vapor off may vary depending on specific process requirements.
• vapor of the chemical cleaning solution can also be introduced together with deionized water, if keeping the wafer surface wet is a requirement.
• the use of chemicals in a gaseous form also offer advantages from a flow control standpoint because precise control of chemical reaction on the wafer surface during post CMP cleaning can be easily accomplished.
• Prior art Figure 1 shows a down view of a conventional CMP machine.
• FIG. 1 shows a side view of the conventional CMP machine from Figure 1.
• Prior art Figure 3 shows a side view of a conventional scrubbing station.
• Figure 4 illustrates a wafer being cleaned according to the method of post CMP cleaning of the present invention.
• Figure 5 is a flow diagram illustrating steps of a post-CMP cleaning process according to an embodiment of the present invention.
• the present invention provides a combined etching and brush based semiconductor wafer cleaning method and system for efficiently removing CMP contaminants and byproducts from the surface of a wafer after the completion of CMP processing.
• the present invention provides for efficient post-CMP cleaning that does not risk damaging the surface of the wafer.
• the use of chemical vapors in removing a thin layer of the wafer surface effectively dislodges hard-to-remove contaminants, significantly reducing the amount of scrubbing that needs to be performed. As a result, the amount of chemical solution used and the cost of ownership of the CMP process, is lowered.
• Chemical-mechanical planarization (CMP) is the preferred method of obtaining full planarization of a semiconductor wafer containing devices for fabrication processing.
• the CMP process involves removing one or more layers of material (e.g., dielectric material, aluminum, tungsten, or copper layers, or the like) using both the frictional contact between the wafer and a moving polishing pad saturated with a polishing slurry and the chemical action of the slurry itself. Polishing through the CMP process flattens out height differences, since high areas of topography (hills) are removed faster than areas of low topography (valleys).
• the CMP process is the preferred technique with the capability of smoothing out topography over millimeter scale planarization distances leading to maximum angles of much less than one degree after polishing.
• the frictional contact with the surface of the polishing pad of the CMP machine, the chemical softening action of the slurry, and the abrasive action of the slurry that combine to polish a semiconductor wafer also combine to create large amounts of contaminants and polishing byproducts.
• These contaminants /byproducts e.g., particles of polishing pad 102, trace amounts of slurry /abrasives, metal ions, and the like
• the wafer prior to subsequent fabrication processing, the wafer must be cleansed of contaminants /byproducts left over from the CMP process. It is very important that the contaminants left over from the CMP process be removed before the wafer proceeds through further fabrication processing. For example, the presence of contaminants particles can disrupt subsequent lithography processes, which can lead to, for example, broken lines, shorts, and the like.
• Conventional scrubbing methods as depicted in Figure 3 is advantageous in that it efficiently removes those contaminants which come within direct contact with scrubbing brush as it frictionally moves across the surface of wafer 310.
• one disadvantage of these conventional scrubbing mehods is that used cleaning fluids cannot be reused or recycled as they contain contaminants and reaction products.
• the conventional post-CMP cleaning methods require a large amount of cleaning fluids. Further, removal of contaminants that are stuck on the wafer surface requires a significant amount of pressure to be applied to the brush, thus increasing the risk of damaging the wafer surface.
• FIG. 4 illustrates a scrubbing station 400 for cleaning a chemically and mechanically planarized semiconductor wafer 405 according to an embodiment of the present invention.
• wafer 405 is placed within a sealed chamber 440 of scrubbing station 400 that includes a scrubbing brush 430 and a cleaning fluid inlet 410.
• a scrubbing brush 430 As the brush 430 rotates, wafer 405 also frictionally spins beneath the scrubbing brush 430 such that the scrubbing action removes contaminants on the front surface 450a of the water 405.
• Cleaning fluids are introduced via the fluid inlet 410 and may be tailored according to the materials that make up the surface of wafer 405 (e.g., metal lines covered with oxide, tungsten in oxide via plugs, copper, etc.).
• scrubbing station 400 includes a vapor inlet 420 mounted within sealed chamber 440 through which vaporized cleaning fluid may be introduced at various stages of the scrubbing process for various periods of time. Vaporized cleaning fluid, in the present embodiment, is also tailored to the materials that make up the surface of the wafer 405.
• vaporized cleaning fluid e.g., vapor of hydrofluoric acid
• etching action of the vaporized cleaning fluid is capable of removing a very thin layer of deposition from the front surface 450a and back surface 450b of the wafer 405 as well as contaminants attached thereon to form easily removable or gaseous reaction products.
• the vaporized cleaning fluids interact with contaminants or defects found on the wafer surfaces 450a- 450b. Since these defects offer preferential sites for reaction or condensation of the vapors, the vapors selectively interact with these defects and contaminants. Hence, the cleaning efficiency of the chemical is enhanced.
• An additional advantage of the present invention is that vaporized cleaning fluids can easily interact with the back surface 450b of the wafer 405, so the removal of backside contaminants is made easier without directly dispensing chemicals to the back surface 450b.
• the use of cleaning fluids in a gaseous form also offer advantages from a flow control standpoint because precise control of chemical reaction on the wafer surfaces 450a-450b can be easily achieved with gases.
• FIG. 5 is a flow diagram illustrating steps of a post-CMP cleaning process according to an embodiment of the present invention.
• process 500 shows the steps involved in the operating process of a post oxide CMP cleaning system employing a scrubbing station (e.g., scrubbing station 400 of Figure 4).
• a scrubbing station e.g., scrubbing station 400 of Figure 4
• the present invention is only applicable to post oxide-CMP cleaning processes. Rather, it should be apparent to those skilled in the art that various chemical vapors can be similarly introduced for different post CMP cleaning processes or surface cleaning applications.
• Process 500 begins at step 510, where a wafer is received for cleaning after the wafer has been processed in a CMP machine.
• chemical mechanical planarization involves the use of slurries and frictional contact with a polishing pad.
• the CMP process leads to large amounts of contaminants which must be removed from the surface of the wafer.
• the wafer is placed within a sealed chamber of a scrubbing station (e.g., scrubbing station 400) of a post-CMP wafer cleaning system in accordance with the present invention.
• the scrubbing station preferably includes a scrubbing brush (e.g., brush 300), a cleaning fluid inlet (e.g., inlet 410) for introducing cleaning fluids, and a vapor inlet (e.g., inlet 420) for introducing vaporized cleaning fluids.
• vaporized cleaning fluid containing hydrofluoric acid (HF) is introduced into the sealed chamber of the scrubbing station.
• HF hydrofluoric acid
• the amount of vapor introduced and the time the wafer is exposed to the vapor is controlled by a vapor generator.
• Vaporized cleaning fluid containing HF is used in the present embodiment because HF vapor is capable of etching a thin layer (less than 50 Angstroms thick) of oxide on the wafer surface. Surface contaminants which are stuck on the wafer surface will also be etched away together with the thin layer of oxide.
• the HF vapor will also interact with the backside of the wafer and remove contaminants therefrom without the direct dispensing chemicals to the backside.
• chemical vapors of other cleaning solutions may be used depending on the surface composition of the wafer.
• the chemical vapors can also be introduced together with deionized water, if keeping the wafer surface wet is a requirement.
• cleaning fluid containing hyrdrofluoric acid is dispensed onto the wafer.
• cleaning fluid may be introduced through the brush on to the wafer surface.
• the flow of solution will also help in the prevention of brush loading.
• the cleaning fluid can include specialized cleaning solution containing various chemicals specifically tailored for the chemical makeup of the wafer surface or de-ionized water.
• the cleaning fluid and the vaporized cleaning fluids may have different chemical constituents.
• the surface of the wafer is brushed using the scrubbing brush mounted within the sealed chamber. As described above, the scrubbing brush uses a wiping action to remove the contaminants on the surface of the wafer.
• step 535 contaminants are removed from the surface the wafer by the combined action of the brush and the flow of the cleaning fluid.
• the wafer surface has been slightly etched with vaporized hydrofluoric acid to remove any contaminants that are stuck to the surface, less scrubbing action of the brush and a lower flowrate of cleaning fluid would be needed for effectively cleaning the wafer.
• the high efficiency cleaning action of the scrubbing station allows less pressure to be applied with the scrubbing brush in comparison to prior art cleaning methods.
• the surface of a wafer is rinsed with de-ionized water.
• the rinse is to remove any remaining cleaning fluid leftover after the cleaning process.
• the wafer is spun dry. Once the cleaning fluid has been rinsed away at step 507, the spin dry yields a completely clean wafer, free of all contaminants.
• the completely clean wafer is removed from the cleaning assembly and sent from the post-CMP cleaning tool to the next step in the device fabrication process.
• the present invention provides a method and system for efficiently removing CMP contaminants and byproducts from the surface of a wafer after the completion of CMP processing.
• the present invention provides for efficient post-CMP cleaning that does not risk damaging the surface of the wafer.
• the present invention effectively cleans a post-CMP wafer surface of contaminants /byproducts without causing damage.

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• 2000
  • 2000-09-13 JP JP2001534191A patent/JP2003513443A/ja active Pending
  • 2000-09-13 CN CN00804321A patent/CN1341276A/zh active Pending
  • 2000-09-13 WO PCT/US2000/025099 patent/WO2001031691A1/en not_active Application Discontinuation
  • 2000-09-13 KR KR1020017008231A patent/KR20010089722A/ko not_active Application Discontinuation
  • 2000-09-13 EP EP00964988A patent/EP1145287A1/en not_active Withdrawn

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