EP1122709A2 - Méthode d'affichage de signaux analogiques générés dans un processeur graphique - Google Patents

Méthode d'affichage de signaux analogiques générés dans un processeur graphique Download PDF

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Publication number
EP1122709A2
EP1122709A2 EP01101759A EP01101759A EP1122709A2 EP 1122709 A2 EP1122709 A2 EP 1122709A2 EP 01101759 A EP01101759 A EP 01101759A EP 01101759 A EP01101759 A EP 01101759A EP 1122709 A2 EP1122709 A2 EP 1122709A2
Authority
EP
European Patent Office
Prior art keywords
output
setpoint
signal
comparator
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP01101759A
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German (de)
English (en)
Other versions
EP1122709B1 (fr
EP1122709A3 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Grundig Multimedia BV
Original Assignee
Grundig AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Grundig AG filed Critical Grundig AG
Publication of EP1122709A2 publication Critical patent/EP1122709A2/fr
Publication of EP1122709A3 publication Critical patent/EP1122709A3/fr
Application granted granted Critical
Publication of EP1122709B1 publication Critical patent/EP1122709B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal

Definitions

  • the invention relates to a device for displaying in a Graphics processor generated graphics signals on a digital display.
  • television receivers are already known, in which the reproduced images can be shown on a plasma display.
  • Such television receivers are named by the applicant Planatron offered on the market.
  • the object of the invention based on showing a way as generated in a graphics processor analog graphic signals can be displayed on a digital display, without synchronization errors.
  • the advantages of the invention are in particular that the user the representation of graphics signals generated in a graphics processor a digital display using the input unit for operating commands Positioning the image on the display can be entered, ensuring is that there is no impermissibly wide image shift. Such impermissible Image shifts would result in image synchronization and thus Disrupt image playback.
  • the claimed output of a warning signal is particularly then advantageous if the microcomputer evaluating the operating commands only Control signals two bits wide for changing the setpoint of a counter outputs and in the case of transmission errors to the meter no exact Has knowledge of the setpoint. With such a transmission of only The two-bit control signals for changing the setpoint are the number of Output pins of the microcomputer are advantageously reduced.
  • a graphics processor 1 of a personal computer Graphic signals which are in analog form, are to be shown on a display 3, in particular, a digital display, which it is preferably around a plasma display or an LCD or a CRT unit acts.
  • a digital display which it is preferably around a plasma display or an LCD or a CRT unit acts.
  • those derived from the graphics processor 1 Graphics signals converted into digital signals in an analog-digital converter 2, which are forwarded to the digital display 3.
  • a Clock signal generator 4 is provided, which is formed by a PLL.
  • This PLL has a phase comparator 5, the output signal of which Clock signal CK for the analog-digital converter 2 is.
  • the output signal of the Phase comparator 5 is also fed to an actual value counter 6.
  • Its output signal is in a first comparator 7 with a setpoint compared, which is provided by a first setpoint counter 12.
  • the output signal of the comparator 7 is an input of the Phase comparator 5 supplied to the PLL, at whose other input 8 in the Graphics processor 1 generated horizontal synchronizing signals of the graphics signal issue.
  • the clock signal CK for the analog-to-digital converter 2 by a Phase comparison between that generated in the graphics processor Horizontal synchronizing signal and that provided by the first comparator 7 Horizontal synchronous signal determined, the latter of the total number of Corresponds to sampling pulses for each horizontal interval.
  • the output signal of the actual value counter 6 continues to be a second Comparator 15 and a third comparator 16 supplied, the Output signals are forwarded to a superimposition circuit 17, the provides a blanking pulse at its output 18.
  • a superimposition circuit 17 the provides a blanking pulse at its output 18.
  • a comparison of the actual value counter 6 takes place in the second comparator 15 provided actual value signal with a from a second setpoint counter 13 delivered setpoint. By changing this second setpoint, the The start time of the blanking impulse can be changed and thus the start of the image within the line ..
  • a comparison of the actual value counter 6 takes place in the third comparator 16 the actual value signal provided by a third setpoint counter 14 delivered setpoint. By changing this third setpoint, the End time of the blanking pulse can be changed and thus the end of the Image within the line.
  • a change of the setpoint provided by the setpoint counter 12 changes the clock signal CK for the analog-digital converter 2 and thus the horizontal image width of the graphic signal to be displayed on the display 3.
  • a change of the Setpoint counter 13 provided setpoint changes the beginning of Blanking impulse and thus the beginning of the image display within a Row.
  • a change in the setpoint provided by the setpoint counter 14 changes the end of the blanking impulse and thus the end of the Image display within a line.
  • a change in each of these setpoints can be made by the user who Display 3 viewed image viewed by means of the control unit 9 of the Display 3 having television set can be made.
  • This Control unit has either plus / minus keys or cursor control keys, those in a setting mode of the television for image positioning, i.e. for setting the image size and position of the displayed image, can be used.
  • the operating commands entered by means of the operating unit 9 become one Microcomputer 10 supplied and from this in two bits wide control signals implemented, which is only the instruction for the respective setpoint counter included, the respective setpoint by one counter level up or down change.
  • These control signals are from the microcomputer 10 via a Data bus 11 fed to the respective setpoint counter.
  • To a bigger one Change of a setpoint by repeated or longer pressing a button of the control unit 9 can be initiated by the Microcomputer 10 over the data bus 11 successively several two bits wide Transfer control signals to the affected setpoint counter.
  • the setpoint counter 12 and the setpoint counter 14 are for example, by an 11-bit counter, by an 8-bit counter for the setpoint counter 13 Since according to the invention from the microcomputer 10 to the respective counter only Control signals two bits wide are transmitted on the microcomputer only two output pins are required to transmit the control signals.
  • the device shown in the figure has a protective circuit 19 Output of a warning signal at output 22.
  • This warning signal will Microcomputer 10 fed by ignoring operator commands or a suitable influence on the setpoints of the setpoint counters for remedial action worries.
  • the protection circuit 19 assigns a first flip-flop 20 and one in series this arranged second flip-flop 21, at the output of which Warning signal is present if an impermissibly wide image shift is detected.
  • the protective circuit (19) has a one-bit output.
  • the Input of the first flip-flop 20 becomes the output signal of the third Comparator 16 supplied, which defines the end of the blanking pulse. This occurs at the Q output of the first flip-flop 20 and thus also at Input of the second flip-flop 21 delayed by one clock period.
  • the enable input of the second flip-flop 21 is that derived from the PLL Output signal of the first comparator 7 supplied.
  • the warning signal on Output 22 not generated.
  • said warning signal is generated so that the microcomputer 10th by suitably influencing the setpoint of the setpoint counter 14 this means that the blanking pulse generated at output 18 is in good time the occurrence of the output signal of the first comparator 7 has ended, which defines the beginning of the next line interval.
  • the advantages of the invention are in particular that by issuing a warning signal to the limits of a permissible Image shift is pointed out.
  • This warning signal can be used for this will automatically counteract another image shift. This prevents an image shift into the area of a subsequent sync pulse occurs, causing synchronization problems or image interference could be caused.
  • the output of a Warning signal when there are impermissibly large image shifts allows Setpoints for the existing setpoint counters are only two bits wide Change control signals. This requires the control signals generating microcomputer only two output pins for the above Control signals.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Processing Or Creating Images (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Alarm Systems (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
  • Electrophonic Musical Instruments (AREA)
EP01101759A 2000-02-03 2001-01-26 Méthode d'affichage de signaux analogiques générés dans un processeur graphique Expired - Lifetime EP1122709B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE20001953U DE20001953U1 (de) 2000-02-03 2000-02-03 Vorrichtung zur Darstellung von in einem Graphikprozessor generierten analogen Graphiksignalen auf einer Anzeige
DE20001953U 2000-02-03

Publications (3)

Publication Number Publication Date
EP1122709A2 true EP1122709A2 (fr) 2001-08-08
EP1122709A3 EP1122709A3 (fr) 2003-01-29
EP1122709B1 EP1122709B1 (fr) 2004-09-01

Family

ID=7936826

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01101759A Expired - Lifetime EP1122709B1 (fr) 2000-02-03 2001-01-26 Méthode d'affichage de signaux analogiques générés dans un processeur graphique

Country Status (5)

Country Link
EP (1) EP1122709B1 (fr)
AT (1) ATE275282T1 (fr)
DE (2) DE20001953U1 (fr)
ES (1) ES2225312T3 (fr)
TR (1) TR200402310T4 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0707305A2 (fr) * 1994-10-12 1996-04-17 Canon Kabushiki Kaisha Détecteur du mode d'affichage, synchronisateur d'horloge de pixel et interpolateur pour un affichage à cristaux liquides ferroélectriques
EP0805430A1 (fr) * 1996-04-26 1997-11-05 Matsushita Electric Industrial Co., Ltd. Adaptateur vidéo et appareil d'affichage d'image numérique
EP0806754A1 (fr) * 1995-11-24 1997-11-12 Nanao Corporation Systeme pour ajuster un moniteur video
US6005557A (en) * 1996-06-07 1999-12-21 Proxima Corporation Image display stabilization apparatus and method
EP1026654A2 (fr) * 1999-01-29 2000-08-09 Canon Kabushiki Kaisha Panneau plat de reproduction d'images avec ajustement de la position d'image

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0707305A2 (fr) * 1994-10-12 1996-04-17 Canon Kabushiki Kaisha Détecteur du mode d'affichage, synchronisateur d'horloge de pixel et interpolateur pour un affichage à cristaux liquides ferroélectriques
EP0806754A1 (fr) * 1995-11-24 1997-11-12 Nanao Corporation Systeme pour ajuster un moniteur video
EP0805430A1 (fr) * 1996-04-26 1997-11-05 Matsushita Electric Industrial Co., Ltd. Adaptateur vidéo et appareil d'affichage d'image numérique
US6005557A (en) * 1996-06-07 1999-12-21 Proxima Corporation Image display stabilization apparatus and method
EP1026654A2 (fr) * 1999-01-29 2000-08-09 Canon Kabushiki Kaisha Panneau plat de reproduction d'images avec ajustement de la position d'image

Also Published As

Publication number Publication date
TR200402310T4 (tr) 2004-12-21
EP1122709B1 (fr) 2004-09-01
DE20001953U1 (de) 2000-04-27
ATE275282T1 (de) 2004-09-15
DE50103431D1 (de) 2004-10-07
ES2225312T3 (es) 2005-03-16
EP1122709A3 (fr) 2003-01-29

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